2001-01-05 15:49:52 +03:00
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/*
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* Copyright (c) 1998, 1999, 2001 Martin Husemann <martin@duskware.de>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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2001-06-13 14:45:57 +04:00
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* derived from this software without specific prior written permission
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2001-01-05 15:49:52 +03:00
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_itk_ix1.c - ITK ix1 micro passive card driver for isdn4bsd
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* --------------------------------------------------------------
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*
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2001-11-13 11:01:09 +03:00
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* $Id: isic_isa_itk_ix1.c,v 1.6 2001/11/13 08:01:23 lukem Exp $
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2001-01-05 15:49:52 +03:00
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*
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* last edit-date: [Fri Jan 5 12:31:50 2001]
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*
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* mh - created
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* mh - fixed FreeBSD problems reported by Kevin Sheehan
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* mh - added probe routine
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*
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*---------------------------------------------------------------------------
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*
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* The ITK ix1 micro ISDN card is an ISA card with one region
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* of four io ports mapped and a fixed irq all jumpered on the card.
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* Access to the board is straight forward and simmilar to
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* the ELSA and DYNALINK cards. If a PCI version of this card
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* exists all we need is probably a pci-bus attachment, all
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* this low level routines should work imediately.
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*
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* To reset the card:
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* - write 0x01 to ITK_CONFIG
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* - wait >= 10 ms
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* - write 0x00 to ITK_CONFIG
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*
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* To read or write data:
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* - write address to ITK_ALE port
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* - read data from or write data to ITK_ISAC_DATA port or ITK_HSCX_DATA port
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* The two HSCX channel registers are offset by HSCXA (0x00) and HSCXB (0x40).
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*
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* The probe routine was derived by trial and error from a representative
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* sample of two cards ;-) The standard way (checking HSCX versions)
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2001-06-19 17:42:07 +04:00
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* was extended by reading a zero from a non existent HSCX register (register
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2001-01-05 15:49:52 +03:00
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* 0xff). Reading the config register gives varying results, so this doesn't
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* seem to be used as an id register (like the Teles S0/16.3).
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*
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* If the probe fails for your card use "options ITK_PROBE_DEBUG" to get
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* additional debug output.
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*
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*---------------------------------------------------------------------------*/
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2001-11-13 11:01:09 +03:00
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isic_isa_itk_ix1.c,v 1.6 2001/11/13 08:01:23 lukem Exp $");
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2001-01-05 15:49:52 +03:00
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#include "opt_isicisa.h"
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#ifdef ISICISA_ITKIX1
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#include <sys/param.h>
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#if defined(__FreeBSD__) && __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#if defined(__NetBSD__) && __NetBSD_Version__ >= 104230000
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#include <sys/callout.h>
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#endif
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#ifdef __FreeBSD__
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#include <sys/socket.h>
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#include <net/if.h>
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <netisdn/i4b_debug.h>
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#include <netisdn/i4b_ioctl.h>
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#endif
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2001-02-21 01:24:31 +03:00
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#include <dev/ic/isic_l1.h>
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#include <dev/ic/isac.h>
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#include <dev/ic/hscx.h>
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2001-01-05 15:49:52 +03:00
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#include <netisdn/i4b_global.h>
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/* Register offsets */
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#define ITK_ISAC_DATA 0
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#define ITK_HSCX_DATA 1
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#define ITK_ALE 2
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#define ITK_CONFIG 3
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/* Size of IO range to allocate for this card */
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#define ITK_IO_SIZE 4
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/* Register offsets for the two HSCX channels */
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#define HSCXA 0
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#define HSCXB 0x40
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/*
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* Local function prototypes
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*/
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#ifdef __FreeBSD__
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/* FreeBSD version */
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static void itkix1_read_fifo(void *buf, const void *base, size_t len);
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static void itkix1_write_fifo(void *base, const void *buf, size_t len);
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static void itkix1_write_reg(u_char *base, u_int offset, u_int v);
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static u_char itkix1_read_reg(u_char *base, u_int offset);
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#else
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/* NetBSD/OpenBSD version */
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static void itkix1_read_fifo(struct l1_softc *sc, int what, void *buf, size_t size);
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static void itkix1_write_fifo(struct l1_softc *sc, int what, const void *buf, size_t size);
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static void itkix1_write_reg(struct l1_softc *sc, int what, bus_size_t offs, u_int8_t data);
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static u_int8_t itkix1_read_reg(struct l1_softc *sc, int what, bus_size_t offs);
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#endif
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/*
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* Probe for card
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*/
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#ifdef __FreeBSD__
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int
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isic_probe_itkix1(struct isa_device *dev)
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{
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u_int8_t hd, hv1, hv2, saveale;
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int ret;
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/* save old value of this port, we're stomping over it */
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saveale = inb(dev->id_iobase + ITK_ALE);
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/* select invalid register */
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outb(dev->id_iobase + ITK_ALE, 0xff);
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/* get HSCX data for this non existent register */
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hd = inb(dev->id_iobase + ITK_HSCX_DATA);
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/* get HSCX version info */
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outb(dev->id_iobase + ITK_ALE, HSCXA + H_VSTR);
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hv1 = inb(dev->id_iobase + ITK_HSCX_DATA);
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outb(dev->id_iobase + ITK_ALE, HSCXB + H_VSTR);
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hv2 = inb(dev->id_iobase + ITK_HSCX_DATA);
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/* succeed if version bits are OK and we got a zero from the
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* non existent register. we found verison 0x05 and 0x04
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* out there... */
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ret = (hd == 0)
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&& (((hv1 & 0x0f) == 0x05) || ((hv1 & 0x0f) == 0x04))
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&& (((hv2 & 0x0f) == 0x05) || ((hv2 & 0x0f) == 0x04));
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/* retstore save value if we fail (if we succeed the old value
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* has no meaning) */
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if (!ret)
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outb(dev->id_iobase + ITK_ALE, saveale);
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#ifdef ITK_PROBE_DEBUG
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printf("\nITK ix1 micro probe: hscx = 0x%02x, v1 = 0x%02x, v2 = 0x%02x, would have %s\n",
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hd, hv1, hv2, ret ? "succeeded" : "failed");
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return 1;
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#else
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return ret;
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#endif
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}
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#else
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int
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isic_probe_itkix1(struct isic_attach_args *ia)
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{
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bus_space_tag_t t = ia->ia_maps[0].t;
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bus_space_handle_t h = ia->ia_maps[0].h;
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u_int8_t hd, hv1, hv2, saveale;
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int ret;
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/* save old value of this port, we're stomping over it */
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saveale = bus_space_read_1(t, h, ITK_ALE);
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/* select invalid register */
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bus_space_write_1(t, h, ITK_ALE, 0xff);
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/* get HSCX data for this non existent register */
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hd = bus_space_read_1(t, h, ITK_HSCX_DATA);
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/* get HSCX version info */
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bus_space_write_1(t, h, ITK_ALE, HSCXA + H_VSTR);
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hv1 = bus_space_read_1(t, h, ITK_HSCX_DATA);
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bus_space_write_1(t, h, ITK_ALE, HSCXB + H_VSTR);
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hv2 = bus_space_read_1(t, h, ITK_HSCX_DATA);
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ret = (hd == 0) && ((hv1 & 0x0f) == 0x05) && ((hv2 & 0x0f) == 0x05);
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/* succeed if version bits are OK and we got a zero from the
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* non existent register. we found verison 0x05 and 0x04
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* out there... */
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ret = (hd == 0)
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&& (((hv1 & 0x0f) == 0x05) || ((hv1 & 0x0f) == 0x04))
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&& (((hv2 & 0x0f) == 0x05) || ((hv2 & 0x0f) == 0x04));
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/* retstore save value if we fail (if we succeed the old value
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* has no meaning) */
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if (!ret)
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bus_space_write_1(t, h, ITK_ALE, saveale);
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#ifdef ITK_PROBE_DEBUG
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printf("\nITK ix1 micro probe: hscx = 0x%02x, v1 = 0x%02x, v2 = 0x%02x, would have %s\n",
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hd, hv1, hv2, ret ? "succeeded" : "failed");
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return 1;
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#else
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return ret;
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#endif
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}
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#endif
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/*
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* Attach card
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*/
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#ifdef __FreeBSD__
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int
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isic_attach_itkix1(struct isa_device *dev)
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{
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struct l1_softc *sc = &l1_sc[dev->id_unit];
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u_int8_t hv1, hv2;
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sc->sc_irq = dev->id_irq;
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dev->id_msize = 0;
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/* check if we got an iobase */
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sc->sc_port = dev->id_iobase;
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/* setup access routines */
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sc->clearirq = NULL;
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sc->readreg = itkix1_read_reg;
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sc->writereg = itkix1_write_reg;
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sc->readfifo = itkix1_read_fifo;
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sc->writefifo = itkix1_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_ITKIX1;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* setup ISAC and HSCX base addr */
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ISAC_BASE = (caddr_t) sc->sc_port;
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HSCX_A_BASE = (caddr_t) sc->sc_port + 1;
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HSCX_B_BASE = (caddr_t) sc->sc_port + 2;
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/* Read HSCX A/B VSTR. Expected value is 0x05 (V2.1) or 0x04 (V2.0). */
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hv1 = HSCX_READ(0, H_VSTR) & 0xf;
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hv2 = HSCX_READ(1, H_VSTR) & 0xf;
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if((hv1 != 0x05 && hv1 != 0x04) || (hv2 != 0x05 && hv2 != 0x04))
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{
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printf("isic%d: HSCX VSTR test failed for ITK ix1 micro\n",
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dev->id_unit);
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printf("isic%d: HSC0: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(0, H_VSTR));
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printf("isic%d: HSC1: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(1, H_VSTR));
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return (0);
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}
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outb((dev->id_iobase)+ITK_CONFIG, 1);
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DELAY(SEC_DELAY / 10);
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outb((dev->id_iobase)+ITK_CONFIG, 0);
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DELAY(SEC_DELAY / 10);
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return(1);
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}
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#else
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int isic_attach_itkix1(struct l1_softc *sc)
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{
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u_int8_t hv1, hv2;
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/* setup access routines */
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sc->clearirq = NULL;
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sc->readreg = itkix1_read_reg;
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sc->writereg = itkix1_write_reg;
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sc->readfifo = itkix1_read_fifo;
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sc->writefifo = itkix1_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_ITKIX1;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* Read HSCX A/B VSTR. Expected value is 0x05 (V2.1) or 0x04 (V2.0). */
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hv1 = HSCX_READ(0, H_VSTR) & 0xf;
|
2001-09-30 15:50:05 +04:00
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hv2 = HSCX_READ(1, H_VSTR) & 0xf;
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2001-01-05 15:49:52 +03:00
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if((hv1 != 0x05 && hv1 != 0x04) || (hv2 != 0x05 && hv2 != 0x04))
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{
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printf("%s: HSCX VSTR test failed for ITK ix1 micro\n",
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sc->sc_dev.dv_xname);
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printf("%s: HSC0: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(0, H_VSTR));
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printf("%s: HSC1: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(1, H_VSTR));
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return 0;
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}
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|
|
|
|
|
|
|
bus_space_write_1(sc->sc_maps[0].t, sc->sc_maps[0].h, ITK_CONFIG, 1);
|
|
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
bus_space_write_1(sc->sc_maps[0].t, sc->sc_maps[0].h, ITK_CONFIG, 0);
|
|
|
|
DELAY(SEC_DELAY / 10);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef __FreeBSD__
|
|
|
|
static void
|
|
|
|
itkix1_read_fifo(void *buf, const void *base, size_t len)
|
|
|
|
{
|
|
|
|
u_int port = (u_int)base & ~0x0003;
|
|
|
|
switch ((u_int)base & 3) {
|
|
|
|
case 0: /* ISAC */
|
|
|
|
outb(port+ITK_ALE, 0);
|
|
|
|
insb(port+ITK_ISAC_DATA, (u_char *)buf, (u_int)len);
|
|
|
|
break;
|
|
|
|
case 1: /* HSCXA */
|
|
|
|
outb(port+ITK_ALE, HSCXA);
|
|
|
|
insb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
|
|
|
|
break;
|
|
|
|
case 2: /* HSCXB */
|
|
|
|
outb(port+ITK_ALE, HSCXB);
|
|
|
|
insb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static void
|
|
|
|
itkix1_read_fifo(struct l1_softc *sc, int what, void *buf, size_t size)
|
|
|
|
{
|
|
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
|
|
bus_space_handle_t h = sc->sc_maps[0].h;
|
|
|
|
switch (what) {
|
|
|
|
case ISIC_WHAT_ISAC:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, 0);
|
|
|
|
bus_space_read_multi_1(t, h, ITK_ISAC_DATA, buf, size);
|
|
|
|
break;
|
|
|
|
case ISIC_WHAT_HSCXA:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXA);
|
|
|
|
bus_space_read_multi_1(t, h, ITK_HSCX_DATA, buf, size);
|
|
|
|
break;
|
|
|
|
case ISIC_WHAT_HSCXB:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXB);
|
|
|
|
bus_space_read_multi_1(t, h, ITK_HSCX_DATA, buf, size);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef __FreeBSD__
|
|
|
|
static void
|
|
|
|
itkix1_write_fifo(void *base, const void *buf, size_t len)
|
|
|
|
{
|
|
|
|
u_int port = (u_int)base & ~0x0003;
|
|
|
|
switch ((u_int)base & 3) {
|
|
|
|
case 0: /* ISAC */
|
|
|
|
outb(port+ITK_ALE, 0);
|
|
|
|
outsb(port+ITK_ISAC_DATA, (u_char *)buf, (u_int)len);
|
|
|
|
break;
|
|
|
|
case 1: /* HSCXA */
|
|
|
|
outb(port+ITK_ALE, HSCXA);
|
|
|
|
outsb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
|
|
|
|
break;
|
|
|
|
case 2: /* HSCXB */
|
|
|
|
outb(port+ITK_ALE, HSCXB);
|
|
|
|
outsb(port+ITK_HSCX_DATA, (u_char *)buf, (u_int)len);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static void itkix1_write_fifo(struct l1_softc *sc, int what, const void *buf, size_t size)
|
|
|
|
{
|
|
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
|
|
bus_space_handle_t h = sc->sc_maps[0].h;
|
|
|
|
switch (what) {
|
|
|
|
case ISIC_WHAT_ISAC:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, 0);
|
|
|
|
bus_space_write_multi_1(t, h, ITK_ISAC_DATA, (u_int8_t*)buf, size);
|
|
|
|
break;
|
|
|
|
case ISIC_WHAT_HSCXA:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXA);
|
|
|
|
bus_space_write_multi_1(t, h, ITK_HSCX_DATA, (u_int8_t*)buf, size);
|
|
|
|
break;
|
|
|
|
case ISIC_WHAT_HSCXB:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXB);
|
|
|
|
bus_space_write_multi_1(t, h, ITK_HSCX_DATA, (u_int8_t*)buf, size);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef __FreeBSD__
|
|
|
|
static void
|
|
|
|
itkix1_write_reg(u_char *base, u_int offset, u_int v)
|
|
|
|
{
|
|
|
|
u_int port = (u_int)base & ~0x0003;
|
|
|
|
switch ((u_int)base & 3) {
|
|
|
|
case 0: /* ISAC */
|
|
|
|
outb(port+ITK_ALE, offset);
|
|
|
|
outb(port+ITK_ISAC_DATA, (u_char)v);
|
|
|
|
break;
|
|
|
|
case 1: /* HSCXA */
|
|
|
|
outb(port+ITK_ALE, HSCXA+offset);
|
|
|
|
outb(port+ITK_HSCX_DATA, (u_char)v);
|
|
|
|
break;
|
|
|
|
case 2: /* HSCXB */
|
|
|
|
outb(port+ITK_ALE, HSCXB+offset);
|
|
|
|
outb(port+ITK_HSCX_DATA, (u_char)v);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static void itkix1_write_reg(struct l1_softc *sc, int what, bus_size_t offs, u_int8_t data)
|
|
|
|
{
|
|
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
|
|
bus_space_handle_t h = sc->sc_maps[0].h;
|
|
|
|
switch (what) {
|
|
|
|
case ISIC_WHAT_ISAC:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, offs);
|
|
|
|
bus_space_write_1(t, h, ITK_ISAC_DATA, data);
|
|
|
|
break;
|
|
|
|
case ISIC_WHAT_HSCXA:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXA+offs);
|
|
|
|
bus_space_write_1(t, h, ITK_HSCX_DATA, data);
|
|
|
|
break;
|
|
|
|
case ISIC_WHAT_HSCXB:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXB+offs);
|
|
|
|
bus_space_write_1(t, h, ITK_HSCX_DATA, data);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef __FreeBSD__
|
|
|
|
static u_char
|
|
|
|
itkix1_read_reg(u_char *base, u_int offset)
|
|
|
|
{
|
|
|
|
u_int port = (u_int)base & ~0x0003;
|
|
|
|
switch ((u_int)base & 3) {
|
|
|
|
case 0: /* ISAC */
|
|
|
|
outb(port+ITK_ALE, offset);
|
|
|
|
return (inb(port+ITK_ISAC_DATA));
|
|
|
|
case 1: /* HSCXA */
|
|
|
|
outb(port+ITK_ALE, HSCXA+offset);
|
|
|
|
return (inb(port+ITK_HSCX_DATA));
|
|
|
|
case 2: /* HSCXB */
|
|
|
|
outb(port+ITK_ALE, HSCXB+offset);
|
|
|
|
return (inb(port+ITK_HSCX_DATA));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static u_int8_t itkix1_read_reg(struct l1_softc *sc, int what, bus_size_t offs)
|
|
|
|
{
|
|
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
|
|
bus_space_handle_t h = sc->sc_maps[0].h;
|
|
|
|
switch (what) {
|
|
|
|
case ISIC_WHAT_ISAC:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, offs);
|
|
|
|
return bus_space_read_1(t, h, ITK_ISAC_DATA);
|
|
|
|
case ISIC_WHAT_HSCXA:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXA+offs);
|
|
|
|
return bus_space_read_1(t, h, ITK_HSCX_DATA);
|
|
|
|
case ISIC_WHAT_HSCXB:
|
|
|
|
bus_space_write_1(t, h, ITK_ALE, HSCXB+offs);
|
|
|
|
return bus_space_read_1(t, h, ITK_HSCX_DATA);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* ISICISA_ITKIX1 */
|