286 lines
7.9 KiB
C
286 lines
7.9 KiB
C
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/* $NetBSD: adv_cardbus.c,v 1.1 2001/03/08 06:55:38 thorpej Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* this file was brought from ahc_cardbus.c and adv_pci.c
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* and modified by YAMAMOTO Takashi.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/cardbus/cardbusvar.h>
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#include <dev/cardbus/cardbusdevs.h>
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#include <dev/ic/advlib.h>
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#include <dev/ic/adv.h>
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#define ADV_CARDBUS_IOBA CARDBUS_BASE0_REG
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#define ADV_CARDBUS_MMBA CARDBUS_BASE1_REG
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#define DEVNAME(sc) sc->sc_dev.dv_xname
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struct adv_cardbus_softc {
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struct asc_softc sc_adv; /* real ADV */
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/* CardBus-specific goo. */
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cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
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int sc_intrline; /* our interrupt line */
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cardbustag_t sc_tag;
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int sc_cbenable; /* what CardBus access type to enable */
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int sc_csr; /* CSR bits */
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bus_size_t sc_size;
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};
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int adv_cardbus_match __P((struct device *, struct cfdata *, void *));
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void adv_cardbus_attach __P((struct device *, struct device *, void *));
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int adv_cardbus_detach __P((struct device *, int));
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struct cfattach adv_cardbus_ca = {
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sizeof(struct asc_softc), adv_cardbus_match, adv_cardbus_attach,
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adv_cardbus_detach
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};
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int
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adv_cardbus_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct cardbus_attach_args *ca = aux;
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if (CARDBUS_VENDOR(ca->ca_id) == CARDBUS_VENDOR_ADVSYS &&
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CARDBUS_PRODUCT(ca->ca_id) == CARDBUS_PRODUCT_ADVSYS_ULTRA)
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return (1);
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return (0);
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}
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void
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adv_cardbus_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct cardbus_attach_args *ca = aux;
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struct adv_cardbus_softc *csc = (void *) self;
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struct asc_softc *sc = &csc->sc_adv;
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cardbus_devfunc_t ct = ca->ca_ct;
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cardbus_chipset_tag_t cc = ct->ct_cc;
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cardbus_function_tag_t cf = ct->ct_cf;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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pcireg_t reg;
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u_int8_t latency = 0x20;
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sc->sc_flags = 0;
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if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS) {
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switch (PCI_PRODUCT(ca->ca_id)) {
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case PCI_PRODUCT_ADVSYS_1200A:
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printf(": AdvanSys ASC1200A SCSI adapter\n");
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latency = 0;
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break;
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case PCI_PRODUCT_ADVSYS_1200B:
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printf(": AdvanSys ASC1200B SCSI adapter\n");
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latency = 0;
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break;
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case PCI_PRODUCT_ADVSYS_ULTRA:
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switch (PCI_REVISION(ca->ca_class)) {
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case ASC_PCI_REVISION_3050:
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printf(": AdvanSys ABP-9xxUA SCSI adapter\n");
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break;
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case ASC_PCI_REVISION_3150:
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printf(": AdvanSys ABP-9xxU SCSI adapter\n");
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break;
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}
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break;
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default:
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printf(": unknown model!\n");
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return;
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}
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}
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csc->sc_ct = ct;
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csc->sc_tag = ca->ca_tag;
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csc->sc_intrline = ca->ca_intrline;
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csc->sc_cbenable = 0;
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/*
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* Map the device.
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*/
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csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
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#if 0
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if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_MMBA,
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PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
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&iot, &ioh, NULL, &csc->sc_size) == 0) {
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printf("%s: mem enabled\n", DEVNAME(sc));
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csc->sc_cbenable = CARDBUS_MEM_ENABLE;
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csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
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} else
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#endif
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if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_IOBA,
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PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &csc->sc_size) == 0) {
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printf("%s: io enabled\n", DEVNAME(sc));
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csc->sc_cbenable = CARDBUS_IO_ENABLE;
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csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
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} else {
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printf("%s: unable to map device registers\n",
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DEVNAME(sc));
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return;
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}
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/* Make sure the right access type is on the CardBus bridge. */
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(*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable);
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(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
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/* Enable the appropriate bits in the PCI CSR. */
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reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG);
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reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
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reg |= csc->sc_csr;
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cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg);
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/*
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* Make sure the latency timer is set to some reasonable
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* value.
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*/
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reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
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if (PCI_LATTIMER(reg) < latency) {
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reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
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reg |= (latency << PCI_LATTIMER_SHIFT);
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cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg);
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}
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ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT);
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ASC_SET_CHIP_STATUS(iot, ioh, 0);
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sc->sc_iot = iot;
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sc->sc_ioh = ioh;
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sc->sc_dmat = ca->ca_dmat;
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sc->pci_device_id = ca->ca_id;
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sc->bus_type = ASC_IS_PCI;
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sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh);
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#if 0
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printf("%s: chip_sign_byte=%x\n", DEVNAME(sc), (uint)ASC_GET_CHIP_SIGNATURE_BYTE(iot, ioh));
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printf("%s: chip_sign_word=%x\n", DEVNAME(sc), (uint)ASC_GET_CHIP_SIGNATURE_WORD(iot, ioh));
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printf("%s: chip ver=%x\n", DEVNAME(sc), sc->chip_version);
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#endif
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/*
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* Initalize the board
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*/
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if (adv_init(sc)) {
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printf("adv_init failed\n");
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return;
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}
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/*
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* Establish the interrupt.
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*/
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sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO,
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adv_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: unable to establish interrupt at %d\n",
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DEVNAME(sc), ca->ca_intrline);
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return;
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}
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printf("%s: interrupting at %d\n", DEVNAME(sc), ca->ca_intrline);
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/*
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* Attach.
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*/
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adv_attach(sc);
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}
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int
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adv_cardbus_detach(self, flags)
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struct device *self;
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int flags;
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{
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struct adv_cardbus_softc *csc = (void*)self;
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struct asc_softc *sc = &csc->sc_adv;
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int rv;
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rv = adv_detach(sc, flags);
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if (rv)
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return rv;
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if (sc->sc_ih) {
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cardbus_intr_disestablish(csc->sc_ct->ct_cc,
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csc->sc_ct->ct_cf, sc->sc_ih);
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sc->sc_ih = 0;
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}
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if (csc->sc_cbenable) {
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#if 0
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if (csc->sc_cbenable == CARDBUS_MEM_ENABLE) {
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Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_MMBA,
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sc->sc_iot, sc->sc_ioh, csc->sc_size);
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} else {
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#endif
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Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_IOBA,
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sc->sc_iot, sc->sc_ioh, csc->sc_size);
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#if 0
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}
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#endif
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csc->sc_cbenable = 0;
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}
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return 0;
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}
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