2006-11-16 04:32:37 +03:00
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/* $NetBSD: acardide.c,v 1.20 2006/11/16 01:33:08 christos Exp $ */
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2003-10-08 15:51:59 +04:00
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/*
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* Copyright (c) 2001 Izumi Tsutsui.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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2003-10-24 19:47:49 +04:00
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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2003-10-08 15:51:59 +04:00
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2005-05-24 09:25:15 +04:00
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#include <sys/cdefs.h>
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2006-11-16 04:32:37 +03:00
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__KERNEL_RCSID(0, "$NetBSD: acardide.c,v 1.20 2006/11/16 01:33:08 christos Exp $");
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2005-05-24 09:25:15 +04:00
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2003-10-08 15:51:59 +04:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciidereg.h>
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#include <dev/pci/pciidevar.h>
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#include <dev/pci/pciide_acard_reg.h>
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2003-10-11 21:40:15 +04:00
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static void acard_chip_map(struct pciide_softc*, struct pci_attach_args*);
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2004-08-14 19:08:04 +04:00
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static void acard_setup_channel(struct ata_channel*);
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2003-10-11 21:40:15 +04:00
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#if 0 /* XXX !! */
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static int acard_pci_intr(void *);
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#endif
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2003-10-08 15:51:59 +04:00
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2003-10-11 21:40:15 +04:00
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static int acardide_match(struct device *, struct cfdata *, void *);
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static void acardide_attach(struct device *, struct device *, void *);
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2003-10-08 15:51:59 +04:00
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CFATTACH_DECL(acardide, sizeof(struct pciide_softc),
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acardide_match, acardide_attach, NULL, NULL);
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2003-10-11 21:40:15 +04:00
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static const struct pciide_product_desc pciide_acard_products[] = {
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2003-10-08 15:51:59 +04:00
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{ PCI_PRODUCT_ACARD_ATP850U,
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2003-10-24 04:24:15 +04:00
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0,
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2003-10-08 15:51:59 +04:00
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"Acard ATP850U Ultra33 IDE Controller",
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acard_chip_map,
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},
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{ PCI_PRODUCT_ACARD_ATP860,
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2003-10-24 04:24:15 +04:00
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0,
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2003-10-08 15:51:59 +04:00
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"Acard ATP860 Ultra66 IDE Controller",
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acard_chip_map,
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},
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{ PCI_PRODUCT_ACARD_ATP860A,
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2003-10-24 04:24:15 +04:00
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0,
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2003-10-08 15:51:59 +04:00
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"Acard ATP860-A Ultra66 IDE Controller",
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acard_chip_map,
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},
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2003-10-24 19:50:02 +04:00
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{ PCI_PRODUCT_ACARD_ATP865,
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0,
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2005-05-24 22:43:29 +04:00
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"Acard ATP865 Ultra133 IDE Controller",
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2003-10-24 19:50:02 +04:00
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acard_chip_map,
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},
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{ PCI_PRODUCT_ACARD_ATP865A,
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0,
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2005-05-24 22:43:29 +04:00
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"Acard ATP865-A Ultra133 IDE Controller",
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2003-10-24 19:50:02 +04:00
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acard_chip_map,
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},
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2003-10-08 15:51:59 +04:00
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{ 0,
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0,
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NULL,
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NULL
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}
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};
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2003-10-11 21:40:15 +04:00
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static int
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2006-11-16 04:32:37 +03:00
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acardide_match(struct device *parent, struct cfdata *match,
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2006-10-12 05:30:41 +04:00
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void *aux)
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2003-10-08 15:51:59 +04:00
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ACARD) {
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if (pciide_lookup_product(pa->pa_id, pciide_acard_products))
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return (2);
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}
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return (0);
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}
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2003-10-11 21:40:15 +04:00
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static void
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2006-11-16 04:32:37 +03:00
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acardide_attach(struct device *parent, struct device *self, void *aux)
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2003-10-08 15:51:59 +04:00
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{
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struct pci_attach_args *pa = aux;
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struct pciide_softc *sc = (struct pciide_softc *)self;
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pciide_common_attach(sc, pa,
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pciide_lookup_product(pa->pa_id, pciide_acard_products));
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}
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#define ACARD_IS_850(sc) \
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((sc)->sc_pp->ide_product == PCI_PRODUCT_ACARD_ATP850U)
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2003-10-11 21:40:15 +04:00
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static void
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acard_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
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2003-10-08 15:51:59 +04:00
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{
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struct pciide_channel *cp;
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int i;
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pcireg_t interface;
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bus_size_t cmdsize, ctlsize;
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if (pciide_chipen(sc, pa) == 0)
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return;
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2003-10-24 19:47:49 +04:00
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/*
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2003-10-08 15:51:59 +04:00
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* when the chip is in native mode it identifies itself as a
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* 'misc mass storage'. Fake interface in this case.
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*/
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if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
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interface = PCI_INTERFACE(pa->pa_class);
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} else {
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interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
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PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
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}
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aprint_normal("%s: bus-master DMA support present",
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2004-08-20 10:39:37 +04:00
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sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
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2003-10-08 15:51:59 +04:00
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pciide_mapreg_dma(sc, pa);
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aprint_normal("\n");
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2004-08-20 10:39:37 +04:00
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sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
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2003-10-08 15:51:59 +04:00
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if (sc->sc_dma_ok) {
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2004-08-20 10:39:37 +04:00
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sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
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2003-10-08 15:51:59 +04:00
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sc->sc_wdcdev.irqack = pciide_irqack;
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}
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2004-08-20 10:39:37 +04:00
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sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
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sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
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2003-10-24 19:50:02 +04:00
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switch (sc->sc_pp->ide_product) {
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case PCI_PRODUCT_ACARD_ATP860:
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case PCI_PRODUCT_ACARD_ATP860A:
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2004-08-20 10:39:37 +04:00
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sc->sc_wdcdev.sc_atac.atac_udma_cap = 4;
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2003-10-24 19:50:02 +04:00
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break;
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case PCI_PRODUCT_ACARD_ATP865:
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case PCI_PRODUCT_ACARD_ATP865A:
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2005-05-08 15:26:17 +04:00
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sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
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2003-10-24 19:50:02 +04:00
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break;
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default:
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2004-08-20 10:39:37 +04:00
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sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
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2003-10-24 19:50:02 +04:00
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break;
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}
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2003-10-08 15:51:59 +04:00
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2004-08-20 10:39:37 +04:00
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sc->sc_wdcdev.sc_atac.atac_set_modes = acard_setup_channel;
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sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
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sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
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2003-10-08 15:51:59 +04:00
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2004-08-14 19:08:04 +04:00
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wdc_allocate_regs(&sc->sc_wdcdev);
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2004-08-20 10:39:37 +04:00
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for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
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2003-10-08 15:51:59 +04:00
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cp = &sc->pciide_channels[i];
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if (pciide_chansetup(sc, i, interface) == 0)
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continue;
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pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
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pciide_pci_intr);
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}
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if (!ACARD_IS_850(sc)) {
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u_int32_t reg;
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reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL);
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reg &= ~ATP860_CTRL_INT;
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pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, reg);
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}
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}
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2003-10-11 21:40:15 +04:00
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static void
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2004-08-14 19:08:04 +04:00
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acard_setup_channel(struct ata_channel *chp)
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2003-10-08 15:51:59 +04:00
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{
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struct ata_drive_datas *drvp;
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2004-08-20 10:39:37 +04:00
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struct atac_softc *atac = chp->ch_atac;
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2004-08-20 03:25:35 +04:00
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struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
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struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
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2004-01-04 01:56:52 +03:00
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int channel = chp->ch_channel;
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2004-08-21 04:28:34 +04:00
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int drive, s;
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2003-10-08 15:51:59 +04:00
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u_int32_t idetime, udma_mode;
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u_int32_t idedma_ctl;
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/* setup DMA if needed */
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pciide_channel_dma_setup(cp);
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if (ACARD_IS_850(sc)) {
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idetime = 0;
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udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA);
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udma_mode &= ~ATP850_UDMA_MASK(channel);
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} else {
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idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME);
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idetime &= ~ATP860_SETTIME_MASK(channel);
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udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA);
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udma_mode &= ~ATP860_UDMA_MASK(channel);
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/* check 80 pins cable */
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if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA) ||
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(chp->ch_drive[1].drive_flags & DRIVE_UDMA)) {
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if (pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
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2004-01-04 01:56:52 +03:00
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& ATP860_CTRL_80P(chp->ch_channel)) {
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2003-10-08 15:51:59 +04:00
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if (chp->ch_drive[0].UDMA_mode > 2)
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chp->ch_drive[0].UDMA_mode = 2;
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if (chp->ch_drive[1].UDMA_mode > 2)
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chp->ch_drive[1].UDMA_mode = 2;
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}
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}
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}
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idedma_ctl = 0;
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/* Per drive settings */
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for (drive = 0; drive < 2; drive++) {
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drvp = &chp->ch_drive[drive];
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/* If no drive, skip */
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if ((drvp->drive_flags & DRIVE) == 0)
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continue;
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/* add timing values, setup DMA if needed */
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2004-08-20 10:39:37 +04:00
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if ((atac->atac_cap & ATAC_CAP_UDMA) &&
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2003-10-08 15:51:59 +04:00
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(drvp->drive_flags & DRIVE_UDMA)) {
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/* use Ultra/DMA */
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if (ACARD_IS_850(sc)) {
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idetime |= ATP850_SETTIME(drive,
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acard_act_udma[drvp->UDMA_mode],
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acard_rec_udma[drvp->UDMA_mode]);
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udma_mode |= ATP850_UDMA_MODE(channel, drive,
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acard_udma_conf[drvp->UDMA_mode]);
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} else {
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idetime |= ATP860_SETTIME(channel, drive,
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acard_act_udma[drvp->UDMA_mode],
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acard_rec_udma[drvp->UDMA_mode]);
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udma_mode |= ATP860_UDMA_MODE(channel, drive,
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acard_udma_conf[drvp->UDMA_mode]);
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}
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idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
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2004-08-20 10:39:37 +04:00
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} else if ((atac->atac_cap & ATAC_CAP_DMA) &&
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2003-10-08 15:51:59 +04:00
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(drvp->drive_flags & DRIVE_DMA)) {
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/* use Multiword DMA */
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2004-08-21 04:28:34 +04:00
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s = splbio();
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2003-10-08 15:51:59 +04:00
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drvp->drive_flags &= ~DRIVE_UDMA;
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2004-08-21 04:28:34 +04:00
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splx(s);
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2003-10-08 15:51:59 +04:00
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if (ACARD_IS_850(sc)) {
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idetime |= ATP850_SETTIME(drive,
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acard_act_dma[drvp->DMA_mode],
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acard_rec_dma[drvp->DMA_mode]);
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} else {
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idetime |= ATP860_SETTIME(channel, drive,
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acard_act_dma[drvp->DMA_mode],
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acard_rec_dma[drvp->DMA_mode]);
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}
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idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
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} else {
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/* PIO only */
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2004-08-21 04:28:34 +04:00
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s = splbio();
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2003-10-08 15:51:59 +04:00
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drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA);
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2004-08-21 04:28:34 +04:00
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splx(s);
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2003-10-08 15:51:59 +04:00
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if (ACARD_IS_850(sc)) {
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idetime |= ATP850_SETTIME(drive,
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acard_act_pio[drvp->PIO_mode],
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acard_rec_pio[drvp->PIO_mode]);
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} else {
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idetime |= ATP860_SETTIME(channel, drive,
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acard_act_pio[drvp->PIO_mode],
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acard_rec_pio[drvp->PIO_mode]);
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}
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pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL,
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pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
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| ATP8x0_CTRL_EN(channel));
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}
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}
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if (idedma_ctl != 0) {
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/* Add software bits in status register */
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There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
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bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0,
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idedma_ctl);
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2003-10-08 15:51:59 +04:00
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}
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|
|
|
|
|
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if (ACARD_IS_850(sc)) {
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pci_conf_write(sc->sc_pc, sc->sc_tag,
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ATP850_IDETIME(channel), idetime);
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pci_conf_write(sc->sc_pc, sc->sc_tag, ATP850_UDMA, udma_mode);
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} else {
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pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_IDETIME, idetime);
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pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_UDMA, udma_mode);
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}
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}
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2003-10-11 21:40:15 +04:00
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#if 0 /* XXX !! */
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static int
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acard_pci_intr(void *arg)
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2003-10-08 15:51:59 +04:00
|
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{
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struct pciide_softc *sc = arg;
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struct pciide_channel *cp;
|
2004-08-14 19:08:04 +04:00
|
|
|
struct ata_channel *wdc_cp;
|
2003-10-08 15:51:59 +04:00
|
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|
int rv = 0;
|
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|
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int dmastat, i, crv;
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|
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|
2004-08-20 10:39:37 +04:00
|
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for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
|
There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
|
|
|
cp = &sc->pciide_channels[i];
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|
|
dmastat = bus_space_read_1(sc->sc_dma_iot,
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|
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cp->dma_iohs[IDEDMA_CTL], 0);
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2003-10-08 15:51:59 +04:00
|
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|
if ((dmastat & IDEDMA_CTL_INTR) == 0)
|
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|
|
continue;
|
2004-08-14 19:08:04 +04:00
|
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|
wdc_cp = &cp->ata_channel;
|
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|
|
if ((wdc_cp->ch_flags & ATACH_IRQ_WAIT) == 0) {
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2003-10-08 15:51:59 +04:00
|
|
|
(void)wdcintr(wdc_cp);
|
There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
|
|
|
bus_space_write_1(sc->sc_dma_iot,
|
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|
|
cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
|
2003-10-08 15:51:59 +04:00
|
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|
continue;
|
|
|
|
}
|
|
|
|
crv = wdcintr(wdc_cp);
|
2004-08-02 23:08:16 +04:00
|
|
|
if (crv == 0) {
|
2003-10-08 15:51:59 +04:00
|
|
|
printf("%s:%d: bogus intr\n",
|
2004-08-20 10:39:37 +04:00
|
|
|
sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, i);
|
2004-08-02 23:08:16 +04:00
|
|
|
bus_space_write_1(sc->sc_dma_iot,
|
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|
|
cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
|
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|
|
} else if (crv == 1)
|
2003-10-08 15:51:59 +04:00
|
|
|
rv = 1;
|
|
|
|
else if (rv == 0)
|
|
|
|
rv = crv;
|
|
|
|
}
|
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|
|
return rv;
|
|
|
|
}
|
2003-10-11 21:40:15 +04:00
|
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|
#endif
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