2008-04-29 00:22:51 +04:00
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/* $NetBSD: cyberreg.h,v 1.3 2008/04/28 20:23:54 martin Exp $ */
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2004-02-03 22:51:39 +03:00
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/*-
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* Copyright (c) 2004 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Frederick S. Bruckman.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* These cards have various combinations of serial and parallel ports. All
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* varieties have up to 6 1-bit registers for extended capabilities, named
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* "Usr0, ..., Usr5". The functional registers are mapped to the proper
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* "Usr" register at attachment time. The only functional registers the
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* kernel currently deals with are the registers to enable or disable the
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* alternate clock, which permits speeds of the serial port all the way to
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* 960Kbps. (In the documentation, those registers are called "Clks0" and
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* "Clks1" on the "10x" series, and * "K0" and "K1" on the 20x series.)
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*/
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#ifndef _PCI_CYBERREG_H_
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#define _PCI_CYBERREG_H_
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/* The "10x" series cards have 4 1-bit registers, spaced 3 bits apart. */
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#define SIIG10x_USR_BASE 0x50
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#define SIIG10x_USR0_MASK (1 << 2 << 16)
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#define SIIG10x_USR1_MASK (1 << 5 << 16)
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#define SIIG10x_USR2_MASK (1 << 8 << 16)
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#define SIIG10x_USR3_MASK (1 << 11 << 16)
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/* The "20x" series cards have 6 1-bit registers, spaced 32 bits apart. */
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#define SIIG20x_USR0 0x6c
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#define SIIG20x_USR1 0x70
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#define SIIG20x_USR2 0x74
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#define SIIG20x_USR3 0x78
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#define SIIG20x_USR4 0x7c
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#define SIIG20x_USR5 0x80
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#define SIIG20x_USR_MASK (1 << 28)
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#endif /* !_PCI_CYBERREG_H_ */
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