483 lines
11 KiB
C
483 lines
11 KiB
C
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/* $Id: at91pio.c,v 1.2 2008/07/03 01:15:38 matt Exp $ */
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/* $NetBSD: at91pio.c,v 1.2 2008/07/03 01:15:38 matt Exp $ */
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/*
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* Copyright (c) 2007 Embedtronics Oy. All rights reserved.
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*
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* Based on arch/arm/ep93xx/epgpio.c,
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* Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: at91pio.c,v 1.2 2008/07/03 01:15:38 matt Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/gpio/gpiovar.h>
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#include <arm/at91/at91var.h>
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#include <arm/at91/at91reg.h>
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#include <arm/at91/at91pioreg.h>
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#include <arm/at91/at91piovar.h>
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#include "gpio.h"
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#if NGPIO > 0
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#include <sys/gpio.h>
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#endif
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#include "locators.h"
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#ifdef AT91PIO_DEBUG
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int at91pio_debug = AT91PIO_DEBUG;
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#define DPRINTFN(n,x) if (at91pio_debug>(n)) printf x;
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#else
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#define DPRINTFN(n,x)
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#endif
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#define AT91PIO_NMAXPORTS 4
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#define AT91PIO_NPINS 32
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struct intr_req {
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int (*ireq_func)(void *);
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void *ireq_arg;
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int ireq_ipl;
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};
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#define PIO_READ(_sc, _reg) bus_space_read_4((_sc)->sc_iot, (_sc)->sc_ioh, (_reg))
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#define PIO_WRITE(_sc, _reg, _val) bus_space_write_4((_sc)->sc_iot, (_sc)->sc_ioh, (_reg), (_val))
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struct at91pio_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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int sc_pid;
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#if NGPIO > 0
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struct gpio_chipset_tag gpio_chipset;
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gpio_pin_t pins[AT91PIO_NPINS];
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#endif
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int irq;
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void *ih;
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struct intr_req ireq[AT91PIO_NPINS];
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};
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static int at91pio_match(device_t, cfdata_t, void *);
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static void at91pio_attach(device_t, device_t, void *);
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#if NGPIO > 0
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static int at91piobus_print(void *, const char *);
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static int at91pio_pin_read(void *, int);
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static void at91pio_pin_write(void *, int, int);
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static void at91pio_pin_ctl(void *, int, int);
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#endif
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static int at91pio_search(device_t, cfdata_t, const int *, void *);
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static int at91pio_print(void *, const char *);
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static int at91pio_intr(void* arg);
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CFATTACH_DECL(at91pio, sizeof(struct at91pio_softc),
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at91pio_match, at91pio_attach, NULL, NULL);
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static struct at91pio_softc *at91pio_softc[AT91_PIO_COUNT];
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struct at91pio_softc *at91pio_sc(at91pio_port port)
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{
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if (port < AT91_PIO_COUNT)
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return at91pio_softc[port];
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return NULL;
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}
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static int
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at91pio_match(device_t parent, cfdata_t match, void *aux)
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{
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if (strcmp(match->cf_name, "at91pio") == 0)
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return 2;
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return 0;
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}
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static void
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at91pio_attach(device_t parent, device_t self, void *aux)
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{
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struct at91pio_softc *sc = (struct at91pio_softc*)self;
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struct at91bus_attach_args *sa = aux;
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#if NGPIO > 0
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struct gpiobus_attach_args gba;
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uint32_t psr, osr, pin;
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int j, n;
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#endif
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printf("\n");
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sc->sc_iot = sa->sa_iot;
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sc->sc_pid = sa->sa_pid;
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if (bus_space_map(sa->sa_iot, sa->sa_addr,
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sa->sa_size, 0, &sc->sc_ioh)){
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printf("%s: Cannot map registers", self->dv_xname);
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return;
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}
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/* save descriptor: */
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at91pio_port p = at91_pio_port(sa->sa_pid);
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if (p < AT91_PIO_COUNT && !at91pio_softc[p])
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at91pio_softc[p] = sc;
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/* make sure peripheral is enabled: */
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at91_peripheral_clock(sc->sc_pid, 1);
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/* initialize ports (disable interrupts) */
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PIO_WRITE(sc, PIO_IDR, -1);
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#if NGPIO > 0
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/* initialize and attach gpio(4) */
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psr = PIO_READ(sc, PIO_PSR); // only ports
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osr = PIO_READ(sc, PIO_OSR);
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pin = PIO_READ(sc, PIO_PDSR);
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psr &= ~at91_gpio_mask(sc->sc_pid);
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for (j = n = 0; j < AT91PIO_NPINS; j++) {
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sc->pins[n].pin_num = j;
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if (psr & (1 << j))
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sc->pins[n].pin_caps = (GPIO_PIN_INPUT
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| GPIO_PIN_OUTPUT
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| GPIO_PIN_OPENDRAIN // @@@ not all pins
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| GPIO_PIN_PUSHPULL
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| GPIO_PIN_PULLUP);
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else
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sc->pins[n].pin_caps = 0;
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if (osr & (1 << j))
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sc->pins[n].pin_flags = GPIO_PIN_OUTPUT;
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else
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sc->pins[n].pin_flags = GPIO_PIN_INPUT;
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if (pin & (1 << j))
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sc->pins[n].pin_state = GPIO_PIN_HIGH;
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else
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sc->pins[n].pin_state = GPIO_PIN_LOW;
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n++;
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}
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sc->gpio_chipset.gp_cookie = sc;
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sc->gpio_chipset.gp_pin_read = at91pio_pin_read;
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sc->gpio_chipset.gp_pin_write = at91pio_pin_write;
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sc->gpio_chipset.gp_pin_ctl = at91pio_pin_ctl;
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gba.gba_gc = &sc->gpio_chipset;
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gba.gba_pins = sc->pins;
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gba.gba_npins = n;
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config_found_ia(self, "gpiobus", &gba, at91piobus_print);
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#endif
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/* attach device */
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config_search_ia(at91pio_search, self, "at91pio", at91pio_print);
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}
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#if NGPIO > 0
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static int
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at91piobus_print(void *aux, const char *name)
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{
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struct gpiobus_attach_args *gba = aux;
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struct at91pio_softc *sc = (struct at91pio_softc *)gba->gba_gc->gp_cookie;
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gpiobus_print(aux, name);
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aprint_normal(": port %s (mask %08"PRIX32")",
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at91_peripheral_name(sc->sc_pid),
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at91_gpio_mask(sc->sc_pid));
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return (UNCONF);
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}
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#endif
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static int
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at91pio_search(device_t parent, cfdata_t cf,
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const int *ldesc, void *aux)
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{
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struct at91pio_softc *sc = (struct at91pio_softc*)parent;
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struct at91pio_attach_args paa;
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paa.paa_sc = sc;
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paa.paa_iot = sc->sc_iot;
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paa.paa_pid = cf->cf_loc[AT91PIOCF_PID];
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paa.paa_bit = cf->cf_loc[AT91PIOCF_BIT];
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if (config_match(parent, cf, &paa) > 0)
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config_attach(parent, cf, &paa, at91pio_print);
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return 0;
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}
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static int
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at91pio_print(void *aux, const char *name)
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{
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struct at91pio_attach_args *paa = (struct at91pio_attach_args*)aux;
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// struct at91pio_softc *sc = (struct at91pio_softc*)paa->paa_sc;
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aprint_normal(":");
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if (paa->paa_pid > -1)
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aprint_normal(" port %s", at91_peripheral_name(paa->paa_pid));
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if (paa->paa_bit > -1)
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aprint_normal(" bit %d", paa->paa_bit);
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return (UNCONF);
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}
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int
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at91pio_read(struct at91pio_softc *sc, int bit)
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{
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#if NGPIO > 0
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sc->pins[bit].pin_caps = 0;
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#endif
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return (PIO_READ(sc, PIO_PDSR) >> bit) & 1;
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}
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void
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at91pio_set(struct at91pio_softc *sc, int bit)
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{
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#if NGPIO > 0
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sc->pins[bit].pin_caps = 0;
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#endif
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PIO_WRITE(sc, PIO_SODR, (1U << bit));
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}
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void
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at91pio_clear(struct at91pio_softc *sc, int bit)
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{
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#if NGPIO > 0
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sc->pins[bit].pin_caps = 0;
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#endif
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PIO_WRITE(sc, PIO_CODR, (1U << bit));
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}
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void
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at91pio_in(struct at91pio_softc *sc, int bit)
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{
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#if NGPIO > 0
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sc->pins[bit].pin_caps = 0;
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#endif
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PIO_WRITE(sc, PIO_ODR, (1U << bit));
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}
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void
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at91pio_out(struct at91pio_softc *sc, int bit)
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{
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#if NGPIO > 0
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sc->pins[bit].pin_caps = 0;
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#endif
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PIO_WRITE(sc, PIO_OER, (1U << bit));
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}
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void at91pio_per(struct at91pio_softc *sc, int bit, int perab)
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{
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#if NGPIO > 0
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sc->pins[bit].pin_caps = 0;
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#endif
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switch (perab) {
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case -1:
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PIO_WRITE(sc, PIO_PER, (1U << bit));
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break;
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case 0:
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PIO_WRITE(sc, PIO_ASR, (1U << bit));
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PIO_WRITE(sc, PIO_PDR, (1U << bit));
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break;
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case 1:
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PIO_WRITE(sc, PIO_BSR, (1U << bit));
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PIO_WRITE(sc, PIO_PDR, (1U << bit));
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break;
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default:
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panic("%s: perab is invalid: %i", __FUNCTION__, perab);
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break;
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}
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}
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void *
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at91pio_intr_establish(struct at91pio_softc *sc, int bit,
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int ipl, int (*ireq_func)(void *), void *arg)
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{
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struct intr_req *ireq;
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DPRINTFN(1, ("at91pio_intr_establish: port=%s, bit=%d\n", at91_peripheral_name(sc->sc_pid), bit));
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if (bit < 0 || bit >= AT91PIO_NPINS)
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return 0;
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ireq = &sc->ireq[bit];
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if (ireq->ireq_func) /* already used */
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return 0;
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ireq->ireq_func = ireq_func;
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ireq->ireq_arg = arg;
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ireq->ireq_ipl = ipl;
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PIO_WRITE(sc, PIO_IDR, (1U << bit)); /* disable interrupt for now */
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at91pio_in(sc, bit); /* make sure pin is input */
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#if NGPIO > 0
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sc->pins[bit].pin_caps = 0;
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#endif
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#if 0
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if (flag & EDGE_TRIGGER)
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at91pio_bit_set(sc, sc->xinttype1, bit);
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else /* LEVEL_SENSE */
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at91pio_bit_clear(sc, sc->xinttype1, bit);
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if (flag & RISING_EDGE) /* or HIGH_LEVEL */
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at91pio_bit_set(sc, sc->xinttype2, bit);
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else /* FALLING_EDGE or LOW_LEVEL */
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at91pio_bit_clear(sc, sc->xinttype2, bit);
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if (flag & DEBOUNCE)
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PIO_WRITE(sc, PIO_IFER, (1U << bit));
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else
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PIO_WRITE(sc, PIO_IFDR, (1U << bit));
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#endif
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if (!sc->ih) {
|
||
|
|
// use IPL_BIO because we want lowest possible priority as
|
||
|
|
// we really don't know what priority is going to be used by
|
||
|
|
// the caller.. this is not really optimal but tell me a
|
||
|
|
// better way
|
||
|
|
sc->ih = at91_intr_establish(sc->sc_pid, IPL_BIO, INTR_HIGH_LEVEL,
|
||
|
|
at91pio_intr, sc);
|
||
|
|
}
|
||
|
|
|
||
|
|
//(void)PIO_READ(sc, PIO_ISR); // clear interrupts
|
||
|
|
PIO_WRITE(sc, PIO_IER, (1U << bit)); // enable interrupt
|
||
|
|
|
||
|
|
return sc->ih;
|
||
|
|
}
|
||
|
|
|
||
|
|
void
|
||
|
|
at91pio_intr_disestablish(struct at91pio_softc *sc, int bit, void *cookie)
|
||
|
|
{
|
||
|
|
struct intr_req *ireq;
|
||
|
|
int i;
|
||
|
|
|
||
|
|
DPRINTFN(1, ("at91pio_intr_disestablish: port=%s, bit=%d\n", at91_peripheral_name(sc->sc_pid), bit));
|
||
|
|
|
||
|
|
if (bit < 0 || bit >= AT91PIO_NPINS)
|
||
|
|
return;
|
||
|
|
|
||
|
|
if (cookie != sc->ih)
|
||
|
|
return;
|
||
|
|
|
||
|
|
ireq = &sc->ireq[bit];
|
||
|
|
|
||
|
|
if (!ireq->ireq_func)
|
||
|
|
return;
|
||
|
|
|
||
|
|
PIO_WRITE(sc, PIO_IDR, (1U << bit));
|
||
|
|
ireq->ireq_func = 0;
|
||
|
|
ireq->ireq_arg = 0;
|
||
|
|
|
||
|
|
for (i = 0; i < AT91PIO_NPINS; i++) {
|
||
|
|
if (sc->ireq[i].ireq_func)
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (i >= AT91PIO_NPINS) {
|
||
|
|
at91_intr_disestablish(sc->ih);
|
||
|
|
sc->ih = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
at91pio_intr(void *arg)
|
||
|
|
{
|
||
|
|
struct at91pio_softc *sc = arg;
|
||
|
|
int bit;
|
||
|
|
u_int32_t isr;
|
||
|
|
|
||
|
|
isr = (PIO_READ(sc, PIO_ISR) & PIO_READ(sc, PIO_IMR));
|
||
|
|
if (!isr)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
do {
|
||
|
|
bit = ffs(isr) - 1;
|
||
|
|
isr &= ~(1U << bit);
|
||
|
|
#ifdef DIAGNOSTIC
|
||
|
|
if (bit < 0)
|
||
|
|
panic("%s: isr is zero (0x%X)", __FUNCTION__, isr);
|
||
|
|
#endif
|
||
|
|
if (sc->ireq[bit].ireq_func) {
|
||
|
|
int s = _splraise(sc->ireq[bit].ireq_ipl);
|
||
|
|
(*sc->ireq[bit].ireq_func)(sc->ireq[bit].ireq_arg);
|
||
|
|
splx(s);
|
||
|
|
}
|
||
|
|
} while (isr);
|
||
|
|
|
||
|
|
return 1;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
#if NGPIO > 0
|
||
|
|
static int
|
||
|
|
at91pio_pin_read(void *arg, int pin)
|
||
|
|
{
|
||
|
|
struct at91pio_softc *sc = arg;
|
||
|
|
|
||
|
|
pin %= AT91PIO_NPINS;
|
||
|
|
if (!sc->pins[pin].pin_caps)
|
||
|
|
return 0; /* EBUSY? */
|
||
|
|
|
||
|
|
return (PIO_READ(sc, PIO_PDSR) >> pin) & 1;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void
|
||
|
|
at91pio_pin_write(void *arg, int pin, int val)
|
||
|
|
{
|
||
|
|
struct at91pio_softc *sc = arg;
|
||
|
|
|
||
|
|
pin %= AT91PIO_NPINS;
|
||
|
|
if (!sc->pins[pin].pin_caps)
|
||
|
|
return;
|
||
|
|
|
||
|
|
if (val)
|
||
|
|
PIO_WRITE(sc, PIO_SODR, (1U << pin));
|
||
|
|
else
|
||
|
|
PIO_WRITE(sc, PIO_CODR, (1U << pin));
|
||
|
|
}
|
||
|
|
|
||
|
|
static void
|
||
|
|
at91pio_pin_ctl(void *arg, int pin, int flags)
|
||
|
|
{
|
||
|
|
struct at91pio_softc *sc = arg;
|
||
|
|
|
||
|
|
pin %= AT91PIO_NPINS;
|
||
|
|
if (!sc->pins[pin].pin_caps)
|
||
|
|
return;
|
||
|
|
|
||
|
|
if (flags & GPIO_PIN_INPUT)
|
||
|
|
PIO_WRITE(sc, PIO_ODR, (1U << pin));
|
||
|
|
else if (flags & GPIO_PIN_OUTPUT)
|
||
|
|
PIO_WRITE(sc, PIO_OER, (1U << pin));
|
||
|
|
|
||
|
|
if (flags & GPIO_PIN_OPENDRAIN)
|
||
|
|
PIO_WRITE(sc, PIO_MDER, (1U << pin));
|
||
|
|
else if (flags & GPIO_PIN_PUSHPULL)
|
||
|
|
PIO_WRITE(sc, PIO_MDDR, (1U << pin));
|
||
|
|
|
||
|
|
if (flags & GPIO_PIN_PULLUP)
|
||
|
|
PIO_WRITE(sc, PIO_PUER, (1U << pin));
|
||
|
|
else
|
||
|
|
PIO_WRITE(sc, PIO_PUDR, (1U << pin));
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|