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NetBSD/sys/arch/sh5/dev/scifvar.h

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NetBSD, meet the SH-5 cpu. SH-5, meet NetBSD. Let's hope this is the start of a long and fruitful relationship. :-) This code, funded by Wasabi Systems, adds initial support for the Hitachi SuperH(tm) SH-5 cpu architecture to NetBSD. At the present time, NetBSD/evbsh5 only runs on a SH-5 core simulator which has no simulated devices other than a simple console. However, it is good enough to get to the "root device: " prompt. Device driver support for Real SH-5 Hardware is in place, particularly for supporting the up-coming Cayman evaluation board, and should be quite easy to get running when the hardware is available. There is no in-tree toolchain for this port at this time. Gcc-current has rudimentary SH-5 support but it is known to be buggy. A working toolchain was obtained from SuperH to facilitate this port. Gcc-current will be fixed in due course. The SH-5 architecture is fully 64-bit capable, although NetBSD/evbsh5 has currently only been tested in 32-bit mode. It is bi-endian, via a boot- time option and it also has an "SHcompact" mode in which it will execute SH-[34] user-land instructions. For more information on the SH-5, see www.superh.com. Suffice to say it is *not* just another respin of the SH-[34].
2002-07-05 17:31:28 +04:00
/* $NetBSD: scifvar.h,v 1.1 2002/07/05 13:31:54 scw Exp $ */
extern unsigned int scifcn_speed;
int scif_kgdb_init(void);