2012-02-01 13:54:02 +04:00
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/* $NetBSD: ipi_openpic.c,v 1.7 2012/02/01 09:54:03 matt Exp $ */
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2007-10-17 23:52:51 +04:00
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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2002-05-31 00:02:03 +04:00
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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2007-10-17 23:52:51 +04:00
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* by Tim Rightnour
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2002-05-31 00:02:03 +04:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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2003-07-15 06:54:31 +04:00
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#include <sys/cdefs.h>
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2012-02-01 13:54:02 +04:00
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__KERNEL_RCSID(0, "$NetBSD: ipi_openpic.c,v 1.7 2012/02/01 09:54:03 matt Exp $");
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2003-07-15 06:54:31 +04:00
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2007-10-17 23:52:51 +04:00
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#include "opt_multiprocessor.h"
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2002-05-31 00:02:03 +04:00
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#include <sys/param.h>
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2007-10-17 23:52:51 +04:00
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#include <sys/kernel.h>
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2011-06-05 20:52:22 +04:00
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#include <sys/atomic.h>
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#include <sys/cpu.h>
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2002-05-31 00:02:03 +04:00
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2007-10-17 23:52:51 +04:00
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#include <uvm/uvm_extern.h>
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2002-05-31 00:02:03 +04:00
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2007-10-17 23:52:51 +04:00
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#include <machine/pio.h>
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#include <powerpc/openpic.h>
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2002-05-31 00:02:03 +04:00
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2011-06-20 10:21:45 +04:00
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#include <powerpc/pic/picvar.h>
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#include <powerpc/pic/ipivar.h>
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2002-05-31 00:02:03 +04:00
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2007-10-17 23:52:51 +04:00
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#ifdef MULTIPROCESSOR
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2002-05-31 00:02:03 +04:00
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2007-10-17 23:52:51 +04:00
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extern struct ipi_ops ipiops;
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2011-06-05 20:52:22 +04:00
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static void openpic_send_ipi(cpuid_t, uint32_t);
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2007-10-17 23:52:51 +04:00
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static void openpic_establish_ipi(int, int, void *);
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2002-05-31 00:02:03 +04:00
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void
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2007-10-17 23:52:51 +04:00
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setup_openpic_ipi(void)
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{
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uint32_t x;
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2002-05-31 00:02:03 +04:00
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2007-10-17 23:52:51 +04:00
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ipiops.ppc_send_ipi = openpic_send_ipi;
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ipiops.ppc_establish_ipi = openpic_establish_ipi;
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ipiops.ppc_ipi_vector = IPI_VECTOR;
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2002-05-31 00:02:03 +04:00
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SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in
figuring out all the crazy nuances of getting this working, and to
Michael Lorenz for testing/fixing my changes on macppc. Tested with a
quad-proc 7044-270.
Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc.
Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs.
Fixed a bug in the test for a 64bit bridge cpu early in locore.S
Added code to set the interrupt priority for all CPUs with an openpic.
Change rtas to probe before cpus, to allow use of the rtas freeze/thaw
timebase code routines.
Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM.
Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow
writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies
itself as 0.
Change the hatchstack/interrupt stack allocations to allocate a 8192byte
interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and
allocate them no lower than 0x10000. Allocate them separately to prevent the
hatch stack corrupting the interrupt stack later on.
If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch()
Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp.
Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary
procs early, and place them into a spinloop waiting for the hatch routines
to be ready.
Modify the ipi routines to deal with openpics that reverse byte order on read
from an ipi register. (such as on the 7044)
Change the rtas setup to allocate the rtas physical base address above
the kernel, to avoid mucking up the hatch/interrupt stacks.
2008-04-08 06:33:03 +04:00
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/* Some (broken) openpic's byteswap on read, but not write. */
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openpic_write(OPENPIC_IPI_VECTOR(0), OPENPIC_IMASK);
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x = openpic_read(OPENPIC_IPI_VECTOR(0));
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if (x != OPENPIC_IMASK)
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x = bswap32(openpic_read(OPENPIC_IPI_VECTOR(1)));
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else
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x = openpic_read(OPENPIC_IPI_VECTOR(1));
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2007-10-17 23:52:51 +04:00
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x &= ~(OPENPIC_IMASK | OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK);
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x |= (15 << OPENPIC_PRIORITY_SHIFT) | ipiops.ppc_ipi_vector;
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openpic_write(OPENPIC_IPI_VECTOR(1), x);
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}
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2002-05-31 00:02:03 +04:00
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2007-10-17 23:52:51 +04:00
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static void
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2011-06-05 20:52:22 +04:00
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openpic_send_ipi(cpuid_t target, uint32_t mesg)
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2002-05-31 00:02:03 +04:00
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{
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2011-06-05 20:52:22 +04:00
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struct cpu_info * const ci = curcpu();
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uint32_t cpumask = 0;
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2002-05-31 00:02:03 +04:00
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2011-06-05 20:52:22 +04:00
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switch (target) {
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case IPI_DST_ALL:
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case IPI_DST_NOTME:
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for (u_int i = 0; i < ncpu; i++) {
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struct cpu_info * const dst_ci = cpu_lookup(i);
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if (target == IPI_DST_ALL || dst_ci != ci) {
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cpumask |= 1 << cpu_index(dst_ci);
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atomic_or_32(&dst_ci->ci_pending_ipis,
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mesg);
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}
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2007-10-17 23:52:51 +04:00
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}
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break;
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2011-06-05 20:52:22 +04:00
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default: {
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struct cpu_info * const dst_ci = cpu_lookup(target);
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cpumask = 1 << cpu_index(dst_ci);
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atomic_or_32(&dst_ci->ci_pending_ipis, mesg);
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2007-10-17 23:52:51 +04:00
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break;
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2011-06-05 20:52:22 +04:00
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}
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2007-10-17 23:52:51 +04:00
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}
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2011-06-05 20:52:22 +04:00
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openpic_write(OPENPIC_IPI(cpu_index(ci), 1), cpumask);
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2002-05-31 00:02:03 +04:00
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}
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2007-10-17 23:52:51 +04:00
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static void
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openpic_establish_ipi(int type, int level, void *ih_args)
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2002-05-31 00:02:03 +04:00
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{
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2007-10-17 23:52:51 +04:00
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/*
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* XXX
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* for now we catch IPIs early in pic_handle_intr() so no need to do anything
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* here
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*/
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#if 0
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intr_establish(ipiops.ppc_ipi_vector, type, level, ppcipi_intr,
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ih_args);
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#endif
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2002-05-31 00:02:03 +04:00
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}
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2007-10-17 23:52:51 +04:00
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#endif /*MULTIPROCESSOR*/
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