1998-01-18 07:09:46 +03:00
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/* $NetBSD: rapide.c,v 1.7 1998/01/18 04:09:52 mark Exp $ */
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1997-02-23 07:00:31 +03:00
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/*
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* Copyright (c) 1997 Mark Brinicombe
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* Copyright (c) 1997 Causality Limited
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Card driver and probe and attach functions to use generic IDE driver
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* for the RapIDE podule
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*/
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/*
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* Thanks to Chris Honey at Raymond Datalink for providing information on
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* addressing the RapIDE podule.
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* RapIDE32 is Copyright (C) 1995,1996 Raymond Datalink. RapIDE32 is
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* manufactured under license by Yellowstone Educational Solutions.
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*/
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/*
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* At present this driver only supports the Issue 2 RapIDE podule.
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*/
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/*
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* A small amount of work is required for Issue 1 podule support.
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* The primary differences are the register addresses.
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* Things are eased by the fact that we can identify the card by register
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* the same register on both issues of the podule.
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* Once we kmnow the issue we must change all our addresses accordingly.
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* All the control registers are mapped the same between cards.
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* The interrupt handler needs to take note that the issue 1 card needs
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* the interrupt to be cleared via the interrupt clear register.
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* This means we share addresses for the mapping of the control block and
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* thus the card driver does not need to know about the differences.
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* The differences show up a the controller level.
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* A structure is used to hold the information about the addressing etc.
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* An array of these structures holds the information for the primary and
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* secondary connectors. This needs to be extended to hold this information
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* for both issues. Then the indexing of this structures will utilise the
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* card version number.
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*
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* Opps just noticed a mistake. The interrupt request register is different
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* between cards so the card level attach routine will need to consider this.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/stat.h>
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#include <sys/ioctl.h>
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#include <sys/buf.h>
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#include <sys/uio.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/disklabel.h>
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#include <sys/disk.h>
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#include <sys/syslog.h>
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#include <sys/proc.h>
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#include <vm/vm.h>
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#include <machine/irqhandler.h>
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#include <machine/katelib.h>
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#include <machine/io.h>
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#include <machine/bus.h>
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#include <machine/bootconfig.h>
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1997-10-15 03:09:38 +04:00
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#include <arm32/iomd/iomdreg.h>
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1997-02-23 07:00:31 +03:00
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#include <arm32/podulebus/podulebus.h>
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#include <arm32/podulebus/podules.h>
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#include <arm32/podulebus/rapidereg.h>
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1997-10-15 03:09:38 +04:00
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#include <arm32/dev/wdreg.h>
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1997-10-17 10:49:17 +04:00
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#include <arm32/dev/wdlink.h>
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1997-02-23 07:00:31 +03:00
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/*
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* RapIDE podule device.
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*
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* This probes and attaches the top level RapIDE device to the podulebus.
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* It then configures any children of the RapIDE device.
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* The attach args specify whether it is configuring the primary or
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* secondary channel.
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* The children are expected to be wdc devices using rapide attachments.
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*/
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/*
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* RapIDE card softc structure.
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*
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* Contains the device node, podule information and global information
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* required by the driver such as the card version and the interrupt mask.
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*/
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struct rapide_softc {
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struct device sc_dev; /* device node */
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podule_t *sc_podule; /* Our podule info */
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int sc_podule_number; /* Our podule number */
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int sc_intr_enable_mask; /* Global intr mask */
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int sc_version; /* Card version */
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bus_space_tag_t sc_iot; /* Bus tag */
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bus_space_handle_t sc_ctl_ioh; /* control handler */
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};
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1997-10-15 03:09:38 +04:00
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int rapide_probe __P((struct device *, struct cfdata *, void *));
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1997-02-23 07:00:31 +03:00
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void rapide_attach __P((struct device *, struct device *, void *));
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void rapide_shutdown __P((void *arg));
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struct cfattach rapide_ca = {
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sizeof(struct rapide_softc), rapide_probe, rapide_attach
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};
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/*
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* Attach arguments for child devices.
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* Pass the podule details, the parent softc and the channel
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*/
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struct rapide_attach_args {
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struct podule_attach_args *ra_pa; /* podule info */
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struct rapide_softc *ra_softc; /* parent softc */
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bus_space_tag_t ra_iot; /* bus space tag */
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int ra_channel; /* IDE channel */
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};
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/*
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* We have a private bus space tag.
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* This is created by copying the podulebus tag and then replacing
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* a couple of the transfer functions.
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*/
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static struct bus_space rapide_bs_tag;
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bs_rm_4_proto(rapide);
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bs_wm_4_proto(rapide);
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/* Print function used during child config */
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int
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rapide_print(aux, name)
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void *aux;
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const char *name;
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{
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struct rapide_attach_args *ra = aux;
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if (!name)
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printf(": %s channel", (ra->ra_channel == 0) ? "primary" : "secondary");
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return(UNCONF);
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}
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/*
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* Card probe function
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*
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* Just match the manufacturer and podule ID's
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*/
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int
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1997-10-15 03:09:38 +04:00
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rapide_probe(parent, cf, aux)
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1997-02-23 07:00:31 +03:00
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struct device *parent;
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1997-10-15 03:09:38 +04:00
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struct cfdata *cf;
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void *aux;
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1997-02-23 07:00:31 +03:00
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{
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struct podule_attach_args *pa = (void *)aux;
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if (matchpodule(pa, MANUFACTURER_YES, PODULE_YES_RAPIDE, -1) == 0)
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return(0);
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return(1);
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}
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/*
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* Card attach function
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*
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* Identify the card version and configure any children.
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* Install a shutdown handler to kill interrupts on shutdown
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*/
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void
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rapide_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct rapide_softc *sc = (void *)self;
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struct podule_attach_args *pa = (void *)aux;
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struct rapide_attach_args ra;
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bus_space_tag_t iot;
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bus_space_handle_t ctl_ioh;
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/* Note the podule number and validate */
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if (pa->pa_podule_number == -1)
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panic("Podule has disappeared !");
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sc->sc_podule_number = pa->pa_podule_number;
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sc->sc_podule = pa->pa_podule;
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podules[sc->sc_podule_number].attached = 1;
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set_easi_cycle_type(sc->sc_podule_number, EASI_CYCLE_TYPE_C);
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/*
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* Duplicate the podule bus space tag and provide alternative
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* bus_space_read_multiple_4() and bus_space_write_multiple_4()
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* functions.
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*/
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rapide_bs_tag = *pa->pa_iot;
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rapide_bs_tag.bs_rm_4 = rapide_rm_4;
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rapide_bs_tag.bs_wm_4 = rapide_wm_4;
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sc->sc_iot = iot = &rapide_bs_tag;
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if (bus_space_map(iot, pa->pa_podule->easi_base +
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CONTROL_REGISTERS_OFFSET, CONTROL_REGISTER_SPACE, 0, &ctl_ioh))
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panic("%s: Cannot map control registers\n", self->dv_xname);
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sc->sc_ctl_ioh = ctl_ioh;
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sc->sc_version = bus_space_read_1(iot, ctl_ioh, VERSION_REGISTER_OFFSET) & VERSION_REGISTER_MASK;
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/* bus_space_unmap(iot, ctl_ioh, CONTROL_REGISTER_SPACE);*/
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printf(" Issue %d\n", sc->sc_version + 1);
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if (sc->sc_version != VERSION_2_ID)
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return;
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if (shutdownhook_establish(rapide_shutdown, (void *)sc) == NULL)
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panic("%s: Cannot install shutdown handler", self->dv_xname);
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/* Set the interrupt info for this podule */
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sc->sc_podule->irq_addr = pa->pa_podule->easi_base
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+ CONTROL_REGISTERS_OFFSET + IRQ_REQUEST_REGISTER_BYTE_OFFSET;
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sc->sc_podule->irq_mask = IRQ_MASK;
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/* Configure the children */
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sc->sc_intr_enable_mask = 0;
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ra.ra_softc = sc;
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ra.ra_pa = pa;
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ra.ra_iot = iot;
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ra.ra_channel = 0;
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config_found_sm(self, &ra, rapide_print, NULL);
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ra.ra_channel = 1;
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config_found_sm(self, &ra, rapide_print, NULL);
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}
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/*
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* Card shutdown function
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*
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* Called via do_shutdown_hooks() during kernel shutdown.
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* Clear the cards's interrupt mask to stop any podule interrupts.
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*/
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void
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rapide_shutdown(arg)
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void *arg;
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{
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struct rapide_softc *sc = arg;
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/* Disable card interrupts */
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bus_space_write_1(sc->sc_iot, sc->sc_ctl_ioh,
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IRQ_MASK_REGISTER_OFFSET, 0);
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}
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/*
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* RapIDE probe and attach code for the wdc device.
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*
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* This provides a different pair of probe and attach functions
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* for attaching the wdc device (mainbus/wd.c) to the RapIDE card.
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*/
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struct rapwdc_softc {
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struct wdc_softc sc_wdc; /* Device node */
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irqhandler_t sc_ih; /* interrupt handler */
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podule_t *sc_podule; /* Our podule */
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int sc_podule_number; /* Our podule number */
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bus_space_tag_t sc_iot; /* Bus space tag */
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bus_space_handle_t sc_ioh; /* handle for registers */
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bus_space_handle_t sc_aux_ioh; /* handle for aux registers */
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bus_space_handle_t sc_ctl_ioh; /* handle for control space */
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bus_space_handle_t sc_data_ioh; /* handle for 32bit data */
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int sc_irqmask; /* IRQ mask for this channel */
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int sc_channel; /* channel number */
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int sc_pio_mode[2]; /* PIO mode */
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struct rapide_softc *sc_softc; /* pointer to parent */
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};
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1997-10-15 03:09:38 +04:00
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int wdc_rapide_probe __P((struct device *, struct cfdata *, void *));
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1997-02-23 07:00:31 +03:00
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void wdc_rapide_attach __P((struct device *, struct device *, void *));
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int wdc_rapide_intr __P((void *));
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extern int wdcintr __P((void *));
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struct cfattach wdc_rapide_ca = {
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sizeof(struct rapwdc_softc), wdc_rapide_probe, wdc_rapide_attach
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};
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/*
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* Create an array of address structures. These define the addresses and
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* masks needed for the different channels for the card.
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*
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* XXX - Needs some work for issue 1 cards.
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*/
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struct {
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u_int registers;
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u_int aux_register;
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u_int data_register;
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u_int irq_mask;
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} rapide_info[] = {
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{ PRIMARY_DRIVE_REGISTERS_OFFSET, PRIMARY_AUX_REGISTER_OFFSET,
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PRIMARY_DATA_REGISTER_OFFSET, PRIMARY_IRQ_MASK },
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{ SECONDARY_DRIVE_REGISTERS_OFFSET, SECONDARY_AUX_REGISTER_OFFSET,
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SECONDARY_DATA_REGISTER_OFFSET, SECONDARY_IRQ_MASK }
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};
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/*
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* Controller probe function
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*
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* Map all the required I/O space for this channel, make sure interrupts
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* are disabled and probe the bus.
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*/
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int
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1997-10-15 03:09:38 +04:00
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wdc_rapide_probe(parent, cf, aux)
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1997-02-23 07:00:31 +03:00
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struct device *parent;
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1997-10-15 03:09:38 +04:00
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struct cfdata *cf;
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void *aux;
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1997-02-23 07:00:31 +03:00
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{
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struct rapide_attach_args *ra = (void *)aux;
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struct podule_attach_args *pa = ra->ra_pa;
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struct rapide_softc *sc;
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bus_space_tag_t iot;
|
|
|
|
bus_space_handle_t ioh;
|
|
|
|
bus_space_handle_t aux_ioh;
|
|
|
|
bus_space_handle_t ctl_ioh;
|
|
|
|
bus_space_handle_t data_ioh;
|
|
|
|
int rv;
|
|
|
|
|
|
|
|
iot = ra->ra_iot;
|
|
|
|
sc = ra->ra_softc;
|
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (ra->ra_channel < 0 || ra->ra_channel > 1)
|
|
|
|
return(0);
|
|
|
|
#endif /* DIAGNOSTIC */
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base +
|
|
|
|
rapide_info[ra->ra_channel].registers, DRIVE_REGISTERS_SPACE, 0, &ioh))
|
|
|
|
return(0);
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base +
|
|
|
|
rapide_info[ra->ra_channel].aux_register, 4, 0, &aux_ioh)) {
|
|
|
|
bus_space_unmap(iot, ioh, DRIVE_REGISTERS_SPACE);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base +
|
|
|
|
rapide_info[ra->ra_channel].data_register, 4, 0, &data_ioh)) {
|
|
|
|
bus_space_unmap(iot, ioh, DRIVE_REGISTERS_SPACE);
|
|
|
|
bus_space_unmap(iot, aux_ioh, 4);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base +
|
|
|
|
CONTROL_REGISTERS_OFFSET, CONTROL_REGISTER_SPACE, 0, &ctl_ioh)) {
|
|
|
|
bus_space_unmap(iot, ioh, DRIVE_REGISTERS_SPACE);
|
|
|
|
bus_space_unmap(iot, aux_ioh, 4);
|
|
|
|
bus_space_unmap(iot, data_ioh, 4);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Disable interrupts and clear any pending interrupts */
|
|
|
|
|
|
|
|
sc->sc_intr_enable_mask &= ~rapide_info[ra->ra_channel].irq_mask;
|
|
|
|
|
|
|
|
bus_space_write_1(iot, ctl_ioh, IRQ_MASK_REGISTER_OFFSET,
|
|
|
|
sc->sc_intr_enable_mask);
|
|
|
|
|
|
|
|
/* XXX - Issue 1 cards will need to clear any pending interrupts */
|
|
|
|
|
|
|
|
rv = wdcprobe_internal(iot, ioh, aux_ioh, ioh, data_ioh, "rapide_probe"); /* XXX */
|
|
|
|
|
|
|
|
bus_space_unmap(iot, ioh, DRIVE_REGISTERS_SPACE);
|
|
|
|
bus_space_unmap(iot, aux_ioh, 4);
|
|
|
|
bus_space_unmap(iot, ctl_ioh, CONTROL_REGISTER_SPACE);
|
|
|
|
bus_space_unmap(iot, data_ioh, 4);
|
|
|
|
return(rv);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Controller attach function
|
|
|
|
*
|
|
|
|
* Map all the required I/O space for this channel, disble interrupts
|
|
|
|
* and attach the controller. The generic attach will probe and attach
|
|
|
|
* any devices.
|
|
|
|
* Install an interrupt handler and we are ready to rock.
|
|
|
|
*/
|
|
|
|
|
|
|
|
void
|
|
|
|
wdc_rapide_attach(parent, self, aux)
|
|
|
|
struct device *parent, *self;
|
|
|
|
void *aux;
|
|
|
|
{
|
|
|
|
struct rapwdc_softc *wdc = (void *)self;
|
|
|
|
struct rapide_attach_args *ra = (void *)aux;
|
|
|
|
struct podule_attach_args *pa = ra->ra_pa;
|
|
|
|
struct rapide_softc *sc;
|
|
|
|
bus_space_tag_t iot;
|
|
|
|
bus_space_handle_t ioh;
|
|
|
|
bus_space_handle_t aux_ioh;
|
|
|
|
bus_space_handle_t ctl_ioh;
|
|
|
|
bus_space_handle_t data_ioh;
|
|
|
|
|
|
|
|
/* Note the podule number and validate */
|
|
|
|
|
|
|
|
wdc->sc_podule_number = pa->pa_podule_number;
|
|
|
|
wdc->sc_podule = pa->pa_podule;
|
|
|
|
|
|
|
|
wdc->sc_channel = ra->ra_channel;
|
|
|
|
wdc->sc_irqmask = rapide_info[ra->ra_channel].irq_mask;
|
|
|
|
|
|
|
|
wdc->sc_iot = iot = ra->ra_iot;
|
|
|
|
sc = ra->ra_softc;
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base
|
|
|
|
+ rapide_info[ra->ra_channel].registers,
|
|
|
|
DRIVE_REGISTERS_SPACE, 0, &ioh))
|
|
|
|
panic("%s: Cannot map drive registers\n", self->dv_xname);
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base +
|
|
|
|
rapide_info[ra->ra_channel].aux_register, 4, 0, &aux_ioh))
|
|
|
|
panic("%s: Cannot map auxilary register\n", self->dv_xname);
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base +
|
|
|
|
rapide_info[ra->ra_channel].data_register, 4, 0, &data_ioh))
|
|
|
|
panic("%s: Cannot map data register\n", self->dv_xname);
|
|
|
|
|
|
|
|
if (bus_space_map(iot, pa->pa_podule->easi_base +
|
|
|
|
CONTROL_REGISTERS_OFFSET, CONTROL_REGISTER_SPACE, 0, &ctl_ioh))
|
|
|
|
panic("%s: Cannot map control registers\n", self->dv_xname);
|
|
|
|
|
|
|
|
wdc->sc_ioh = ioh;
|
|
|
|
wdc->sc_aux_ioh = aux_ioh;
|
|
|
|
wdc->sc_ctl_ioh = ctl_ioh;
|
|
|
|
wdc->sc_data_ioh = data_ioh;
|
|
|
|
wdc->sc_wdc.sc_flags = WDCF_32BIT; /* flag 32 bit data xfers */
|
|
|
|
|
|
|
|
/* Disable interrupts and clear any pending interrupts */
|
|
|
|
|
|
|
|
sc->sc_intr_enable_mask &= ~wdc->sc_irqmask;
|
|
|
|
|
|
|
|
bus_space_write_1(iot, ctl_ioh, IRQ_MASK_REGISTER_OFFSET,
|
|
|
|
sc->sc_intr_enable_mask);
|
|
|
|
|
|
|
|
/* XXX - Issue 1 cards will need to clear any pending interrupts */
|
|
|
|
|
|
|
|
wdcattach_internal((struct wdc_softc *)wdc, iot, ioh, aux_ioh, ioh, data_ioh, -1);
|
|
|
|
|
|
|
|
wdc->sc_ih.ih_func = wdc_rapide_intr;
|
|
|
|
wdc->sc_ih.ih_arg = wdc;
|
|
|
|
wdc->sc_ih.ih_level = IPL_BIO;
|
|
|
|
wdc->sc_ih.ih_name = "rapide";
|
|
|
|
wdc->sc_ih.ih_maskaddr = wdc->sc_podule->irq_addr;
|
|
|
|
wdc->sc_ih.ih_maskbits = wdc->sc_irqmask;
|
|
|
|
|
1997-10-15 03:09:38 +04:00
|
|
|
if (irq_claim(sc->sc_podule->interrupt, &wdc->sc_ih))
|
1997-02-23 07:00:31 +03:00
|
|
|
panic("Cannot claim IRQ %d for %s\n", IRQ_PODULE, self->dv_xname);
|
|
|
|
|
|
|
|
/* clear any pending interrupts and enable interrupts */
|
|
|
|
|
|
|
|
sc->sc_intr_enable_mask |= wdc->sc_irqmask;
|
|
|
|
|
|
|
|
bus_space_write_1(iot, ctl_ioh, IRQ_MASK_REGISTER_OFFSET,
|
|
|
|
sc->sc_intr_enable_mask);
|
|
|
|
|
|
|
|
/* XXX - Issue 1 cards will need to clear any pending interrupts */
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Podule interrupt handler
|
|
|
|
*
|
|
|
|
* If the interrupt was from our card pass it on to the wdc interrupt handler
|
|
|
|
*/
|
|
|
|
|
|
|
|
int
|
|
|
|
wdc_rapide_intr(arg)
|
|
|
|
void *arg;
|
|
|
|
{
|
|
|
|
struct rapwdc_softc *wdc = arg;
|
|
|
|
|
|
|
|
/* XXX - Issue 1 cards will need to clear the interrupt */
|
|
|
|
|
|
|
|
if (ReadByte(wdc->sc_ih.ih_maskaddr) & wdc->sc_ih.ih_maskbits)
|
|
|
|
wdcintr(arg);
|
|
|
|
|
|
|
|
return(0);
|
|
|
|
}
|