66 lines
2.2 KiB
C
66 lines
2.2 KiB
C
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/* $NetBSD: opti82c558reg.h,v 1.1 1999/11/17 01:21:20 thorpej Exp $ */
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/*
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* Copyright (c) 1999, by UCHIYAMA Yasushi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Register definitions for the Opti 82c558 PCI-ISA bridge interrupt
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* controller.
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*/
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/*
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* PCI IRQ Select Register
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*/
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#define VIPER_CFG_PIRQ 0x40 /* PCI configuration space */
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/*
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* Trigger setting:
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*
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* [1:7]=>5,9,10,11,12,14,15 Edge = 0 Level = 1
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*/
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#define VIPER_CFG_TRIGGER_SHIFT 16
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#define VIPER_LEGAL_LINK(link) ((link) >= 0 && (link) <= 3)
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#define VIPER_PIRQ_MASK 0xde20
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#define VIPER_LEGAL_IRQ(irq) ((irq) >= 0 && (irq) <= 15 && \
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((1 << (irq)) & VIPER_PIRQ_MASK) != 0)
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#define VIPER_PIRQ_NONE 0
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#define VIPER_PIRQ_5 1
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#define VIPER_PIRQ_9 2
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#define VIPER_PIRQ_10 3
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#define VIPER_PIRQ_11 4
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#define VIPER_PIRQ_12 5
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#define VIPER_PIRQ_14 6
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#define VIPER_PIRQ_15 7
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#define VIPER_PIRQ_SELECT_MASK 0x07
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#define VIPER_PIRQ_SELECT_SHIFT 3
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#define VIPER_PIRQ(reg, x) (((reg) >> ((x) * VIPER_PIRQ_SELECT_SHIFT)) \
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& VIPER_PIRQ_SELECT_MASK)
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