2006-10-27 04:08:32 +04:00
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/* $NetBSD: j6x0lcd.c,v 1.11 2006/10/27 00:08:32 uwe Exp $ */
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2004-03-15 06:45:50 +03:00
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/*
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2005-08-04 02:25:17 +04:00
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* Copyright (c) 2004, 2005 Valeriy E. Ushakov
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2004-03-15 06:45:50 +03:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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2006-10-27 04:08:32 +04:00
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__KERNEL_RCSID(0, "$NetBSD: j6x0lcd.c,v 1.11 2006/10/27 00:08:32 uwe Exp $");
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2004-03-15 06:45:50 +03:00
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <machine/platid.h>
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#include <machine/platid_mask.h>
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#include <machine/config_hook.h>
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#include <sh3/dacreg.h>
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#include <hpcsh/dev/hd64461/hd64461var.h> /* XXX: for hd64461_reg_read_2 &c */
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#include <hpcsh/dev/hd64461/hd64461reg.h>
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#include <hpcsh/dev/hd64461/hd64461gpioreg.h>
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2005-08-04 02:25:17 +04:00
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#define arraysize(ary) (sizeof(ary) / sizeof(ary[0]))
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2004-03-15 06:45:50 +03:00
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/*
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* LCD power: controlled by pin 0 in HD64461 GPIO port B.
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* 0 - power on
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* 1 - power off
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*/
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2005-08-04 02:25:17 +04:00
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#define HD64461_GPBDR_J6X0_LCD_OFF 0x01
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2004-03-15 06:45:50 +03:00
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2005-08-04 02:25:17 +04:00
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#define HD64461_GPBCR_J6X0_LCD_OFF_MASK 0xfffc
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#define HD64461_GPBCR_J6X0_LCD_OFF_BITS 0x0001
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2004-03-15 06:45:50 +03:00
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/*
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* LCD brightness: controlled by DAC channel 0. Larger channel values
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* mean dimmer. Values smaller (i.e. brighter) then 0x5e seems to
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* result in no visible changes.
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*/
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#define J6X0LCD_BRIGHTNESS_DA_MAX 0x5e
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#define J6X0LCD_BRIGHTNESS_DA_MIN 0xff
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#define J6X0LCD_DA_TO_BRIGHTNESS(da) \
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(J6X0LCD_BRIGHTNESS_DA_MIN - (da))
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#define J6X0LCD_BRIGHTNESS_TO_DA(br) \
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(J6X0LCD_BRIGHTNESS_DA_MIN - (br))
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#define J6X0LCD_BRIGHTNESS_MAX \
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J6X0LCD_DA_TO_BRIGHTNESS(J6X0LCD_BRIGHTNESS_DA_MAX)
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/* convenience macro to accesses DAC registers */
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#define DAC_(x) (*((volatile uint8_t *)SH7709_DA ## x))
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/*
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2005-08-04 02:25:17 +04:00
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* LCD contrast in 680 is controlled by pins 6..3 of HD64461 GPIO
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* port B. 6th pin is the least significant bit, 3rd pin is the most
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* significant. The bits are inverted: 0 = .1111...; 1 = .0111...;
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* etc. Larger values mean "blacker".
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2004-03-15 06:45:50 +03:00
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*
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2005-08-04 02:25:17 +04:00
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* The contrast value is programmed by setting bits in the data
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* register to all ones, and changing the mode of the pins in the
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* control register, setting logical "ones" to GPIO output mode (1),
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* and switching "zeroes" to input mode (3).
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2004-03-15 06:45:50 +03:00
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*/
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2005-08-04 02:25:17 +04:00
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#define HD64461_GPBDR_J680_CONTRAST_BITS 0x78 /* set */
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#define HD64461_GPBCR_J680_CONTRAST_MASK 0xc03f
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2004-03-15 06:45:50 +03:00
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2005-08-04 02:25:17 +04:00
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static const uint8_t j6x0lcd_contrast680_pins[] = { 6, 5, 4, 3 };
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2004-03-15 06:45:50 +03:00
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2005-08-04 02:25:17 +04:00
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static const uint16_t j6x0lcd_contrast680_control_bits[] = {
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0x1540, 0x3540, 0x1d40, 0x3d40, 0x1740, 0x3740, 0x1f40, 0x3f40,
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0x15c0, 0x35c0, 0x1dc0, 0x3dc0, 0x17c0, 0x37c0, 0x1fc0, 0x3fc0
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2004-03-15 06:45:50 +03:00
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};
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2005-08-04 02:25:17 +04:00
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/*
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* LCD contrast in 620lx is controlled by pins 7,6,3,4,5 of HD64461
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* GPIO port B (in the order from the least significant to the most
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* significant). The bits are inverted: 0 = 11111...; 5 = 01110...;
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* etc. Larger values mean "whiter".
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*
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* The contrast value is programmed by setting bits in the data
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* register to all zeroes, and changing the mode of the pins in the
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* control register, setting logical "ones" to GPIO output mode (1),
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* and switching "zeroes" to input mode (3).
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*/
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#define HD64461_GPBDR_J620LX_CONTRAST_BITS 0xf8 /* clear */
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#define HD64461_GPBCR_J620LX_CONTRAST_MASK 0x003f
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static const uint8_t j6x0lcd_contrast620lx_pins[] = { 7, 6, 3, 4, 5 };
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static const uint16_t j6x0lcd_contrast620lx_control_bits[] = {
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0xffc0, 0x7fc0, 0xdfc0, 0x5fc0, 0xff40, 0x7f40, 0xdf40, 0x5f40,
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0xfdc0, 0x7dc0, 0xddc0, 0x5dc0, 0xfd40, 0x7d40, 0xdd40, 0x5d40,
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0xf7c0, 0x77c0, 0xd7c0, 0x57c0, 0xf740, 0x7740, 0xd740, 0x5740,
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0xf5c0, 0x75c0, 0xd5c0, 0x55c0, 0xf540, 0x7540, 0xd540, 0x5540
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2004-03-15 06:45:50 +03:00
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};
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2005-08-04 02:25:17 +04:00
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2004-03-15 06:45:50 +03:00
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struct j6x0lcd_softc {
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struct device sc_dev;
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int sc_brightness;
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int sc_contrast;
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2005-08-04 02:25:17 +04:00
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int sc_contrast_max;
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uint16_t sc_contrast_mask;
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const uint16_t *sc_contrast_control_bits;
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2004-03-15 06:45:50 +03:00
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};
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static int j6x0lcd_match(struct device *, struct cfdata *, void *);
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static void j6x0lcd_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(j6x0lcd, sizeof(struct j6x0lcd_softc),
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j6x0lcd_match, j6x0lcd_attach, NULL, NULL);
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static int j6x0lcd_param(void *, int, long, void *);
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static int j6x0lcd_power(void *, int, long, void *);
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2005-08-04 02:25:17 +04:00
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static int j6x0lcd_contrast_raw(uint16_t, int, const uint8_t *);
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static void j6x0lcd_contrast_set(struct j6x0lcd_softc *, int);
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2004-03-15 06:45:50 +03:00
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static int
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j6x0lcd_match(struct device *parent, struct cfdata *cfp, void *aux)
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{
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/*
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2005-08-04 02:25:17 +04:00
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* XXX: platid_mask_MACH_HP_LX also matches 360LX. It's not
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* confirmed whether touch panel in 360LX is connected this
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* way. We may need to regroup platid masks.
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2004-03-15 06:45:50 +03:00
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*/
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2005-08-04 02:25:17 +04:00
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if (!platid_match(&platid, &platid_mask_MACH_HP_JORNADA_6XX)
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&& !platid_match(&platid, &platid_mask_MACH_HP_LX))
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2004-03-15 06:45:50 +03:00
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return (0);
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if (strcmp(cfp->cf_name, "j6x0lcd") != 0)
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return (0);
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return (1);
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}
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static void
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j6x0lcd_attach(struct device *parent, struct device *self, void *aux)
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{
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struct j6x0lcd_softc *sc = (struct j6x0lcd_softc *)self;
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uint16_t bcr, bdr;
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uint8_t dcr, ddr;
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2005-02-28 19:16:19 +03:00
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/*
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2004-03-15 06:45:50 +03:00
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* Brightness is controlled by DAC channel 0.
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*/
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dcr = DAC_(CR);
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dcr &= ~SH7709_DACR_DAE; /* want to control each channel separately */
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dcr |= SH7709_DACR_DAOE0; /* enable channel 0 */
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DAC_(CR) = dcr;
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ddr = DAC_(DR0);
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sc->sc_brightness = J6X0LCD_DA_TO_BRIGHTNESS(ddr);
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/*
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* Contrast and power are controlled by HD64461 GPIO port B.
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*/
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bcr = hd64461_reg_read_2(HD64461_GPBCR_REG16);
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bdr = hd64461_reg_read_2(HD64461_GPBDR_REG16);
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2005-08-04 02:25:17 +04:00
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/*
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* Make sure LCD is turned on.
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*/
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bcr &= HD64461_GPBCR_J6X0_LCD_OFF_MASK;
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bcr |= HD64461_GPBCR_J6X0_LCD_OFF_BITS; /* output mode */
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2004-03-15 06:45:50 +03:00
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2005-08-04 02:25:17 +04:00
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bdr &= ~HD64461_GPBDR_J6X0_LCD_OFF;
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2004-03-15 06:45:50 +03:00
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2005-08-04 02:25:17 +04:00
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/*
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* 620LX and 680 have different contrast control.
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*/
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if (platid_match(&platid, &platid_mask_MACH_HP_JORNADA_6XX)) {
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bdr |= HD64461_GPBDR_J680_CONTRAST_BITS;
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sc->sc_contrast_mask =
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HD64461_GPBCR_J680_CONTRAST_MASK;
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sc->sc_contrast_control_bits =
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j6x0lcd_contrast680_control_bits;
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sc->sc_contrast_max =
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arraysize(j6x0lcd_contrast680_control_bits) - 1;
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sc->sc_contrast = sc->sc_contrast_max
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- j6x0lcd_contrast_raw(bcr,
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arraysize(j6x0lcd_contrast680_pins),
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j6x0lcd_contrast680_pins);
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} else {
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bdr &= ~HD64461_GPBDR_J620LX_CONTRAST_BITS;
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sc->sc_contrast_mask =
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HD64461_GPBCR_J620LX_CONTRAST_MASK;
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sc->sc_contrast_control_bits =
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j6x0lcd_contrast620lx_control_bits;
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sc->sc_contrast_max =
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arraysize(j6x0lcd_contrast620lx_control_bits) - 1;
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sc->sc_contrast =
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j6x0lcd_contrast_raw(bcr,
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arraysize(j6x0lcd_contrast620lx_pins),
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j6x0lcd_contrast620lx_pins);
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}
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2004-03-15 06:45:50 +03:00
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hd64461_reg_write_2(HD64461_GPBCR_REG16, bcr);
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2005-08-04 02:25:17 +04:00
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hd64461_reg_write_2(HD64461_GPBDR_REG16, bdr);
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2004-03-15 06:45:50 +03:00
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printf(": brightness %d, contrast %d\n",
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sc->sc_brightness, sc->sc_contrast);
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/* LCD brightness hooks */
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2005-02-28 19:16:19 +03:00
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config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_BRIGHTNESS_MAX,
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2004-03-15 06:45:50 +03:00
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CONFIG_HOOK_SHARE,
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j6x0lcd_param, sc);
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2005-02-28 19:16:19 +03:00
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config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_BRIGHTNESS,
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2004-03-15 06:45:50 +03:00
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CONFIG_HOOK_SHARE,
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j6x0lcd_param, sc);
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2005-02-28 19:16:19 +03:00
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config_hook(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS,
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2004-03-15 06:45:50 +03:00
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CONFIG_HOOK_SHARE,
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j6x0lcd_param, sc);
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/* LCD contrast hooks */
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2005-02-28 19:16:19 +03:00
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config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_CONTRAST_MAX,
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2004-03-15 06:45:50 +03:00
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CONFIG_HOOK_SHARE,
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j6x0lcd_param, sc);
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2005-02-28 19:16:19 +03:00
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config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_CONTRAST,
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2004-03-15 06:45:50 +03:00
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CONFIG_HOOK_SHARE,
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j6x0lcd_param, sc);
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2005-02-28 19:16:19 +03:00
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config_hook(CONFIG_HOOK_SET, CONFIG_HOOK_CONTRAST,
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2004-03-15 06:45:50 +03:00
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CONFIG_HOOK_SHARE,
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j6x0lcd_param, sc);
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/* LCD on/off hook */
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config_hook(CONFIG_HOOK_POWERCONTROL,
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2004-03-16 02:38:16 +03:00
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CONFIG_HOOK_POWERCONTROL_LCD,
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2004-03-15 06:45:50 +03:00
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CONFIG_HOOK_SHARE,
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j6x0lcd_power, sc);
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}
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2005-08-04 02:25:17 +04:00
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/*
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* Get raw contrast value programmed in GPIO port B control register.
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* Used only at attach time to get initial contrast.
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*/
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static int
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j6x0lcd_contrast_raw(uint16_t bcr, int width, const uint8_t *pin)
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{
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int contrast;
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int bit;
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contrast = 0;
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for (bit = 0; bit < width; ++bit) {
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2005-12-18 22:09:26 +03:00
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unsigned int c;
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2005-08-04 02:25:17 +04:00
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c = (bcr >> (pin[bit] << 1)) & 0x3;
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2005-12-18 22:09:26 +03:00
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if (c == 1) /* pin in output mode? */
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contrast |= (1 << bit);
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2005-08-04 02:25:17 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
return contrast;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set contrast by programming GPIO port B control register.
|
|
|
|
* Data register has been initialized at attach time.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
j6x0lcd_contrast_set(struct j6x0lcd_softc *sc, int contrast)
|
|
|
|
{
|
|
|
|
uint16_t bcr;
|
|
|
|
|
|
|
|
sc->sc_contrast = contrast;
|
|
|
|
|
|
|
|
bcr = hd64461_reg_read_2(HD64461_GPBCR_REG16);
|
|
|
|
|
|
|
|
bcr &= sc->sc_contrast_mask;
|
|
|
|
bcr |= sc->sc_contrast_control_bits[contrast];
|
|
|
|
|
|
|
|
hd64461_reg_write_2(HD64461_GPBCR_REG16, bcr);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2004-03-15 06:45:50 +03:00
|
|
|
static int
|
2005-12-18 21:59:48 +03:00
|
|
|
j6x0lcd_param(void *ctx, int type, long id, void *msg)
|
2004-03-15 06:45:50 +03:00
|
|
|
{
|
|
|
|
struct j6x0lcd_softc *sc = ctx;
|
|
|
|
int value;
|
|
|
|
uint8_t dr;
|
|
|
|
|
|
|
|
switch (type) {
|
|
|
|
case CONFIG_HOOK_GET:
|
|
|
|
switch (id) {
|
|
|
|
case CONFIG_HOOK_CONTRAST:
|
|
|
|
*(int *)msg = sc->sc_contrast;
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case CONFIG_HOOK_CONTRAST_MAX:
|
2005-08-04 02:25:17 +04:00
|
|
|
*(int *)msg = sc->sc_contrast_max;
|
2004-03-15 06:45:50 +03:00
|
|
|
return (0);
|
|
|
|
|
|
|
|
case CONFIG_HOOK_BRIGHTNESS:
|
|
|
|
*(int *)msg = sc->sc_brightness;
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case CONFIG_HOOK_BRIGHTNESS_MAX:
|
|
|
|
*(int *)msg = J6X0LCD_BRIGHTNESS_MAX;
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CONFIG_HOOK_SET:
|
|
|
|
value = *(int *)msg;
|
|
|
|
if (value < 0)
|
|
|
|
value = 0;
|
|
|
|
|
|
|
|
switch (id) {
|
|
|
|
case CONFIG_HOOK_CONTRAST:
|
2005-08-04 02:25:17 +04:00
|
|
|
if (value > sc->sc_contrast_max)
|
|
|
|
value = sc->sc_contrast_max;
|
|
|
|
j6x0lcd_contrast_set(sc, value);
|
2004-03-15 06:45:50 +03:00
|
|
|
return (0);
|
|
|
|
|
|
|
|
case CONFIG_HOOK_BRIGHTNESS:
|
|
|
|
if (value > J6X0LCD_BRIGHTNESS_MAX)
|
|
|
|
value = J6X0LCD_BRIGHTNESS_MAX;
|
|
|
|
sc->sc_brightness = value;
|
|
|
|
|
|
|
|
dr = J6X0LCD_BRIGHTNESS_TO_DA(value);
|
|
|
|
DAC_(DR0) = dr;
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
2005-12-18 21:59:48 +03:00
|
|
|
j6x0lcd_power(void *ctx, int type, long id, void *msg)
|
2004-03-15 06:45:50 +03:00
|
|
|
{
|
|
|
|
int on;
|
|
|
|
uint16_t r;
|
|
|
|
|
|
|
|
if (type != CONFIG_HOOK_POWERCONTROL
|
2004-03-16 02:38:16 +03:00
|
|
|
|| id != CONFIG_HOOK_POWERCONTROL_LCD)
|
2004-03-15 06:45:50 +03:00
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
on = (int)msg;
|
|
|
|
|
|
|
|
r = hd64461_reg_read_2(HD64461_GPBDR_REG16);
|
|
|
|
if (on)
|
2005-08-04 02:25:17 +04:00
|
|
|
r &= ~HD64461_GPBDR_J6X0_LCD_OFF;
|
2004-03-15 06:45:50 +03:00
|
|
|
else
|
2005-08-04 02:25:17 +04:00
|
|
|
r |= HD64461_GPBDR_J6X0_LCD_OFF;
|
2004-03-15 06:45:50 +03:00
|
|
|
hd64461_reg_write_2(HD64461_GPBDR_REG16, r);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|