2001-07-25 13:57:31 +04:00
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/* $NetBSD: rtl81x9var.h,v 1.10 2001/07/25 09:57:31 kanaoka Exp $ */
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2000-04-26 18:02:34 +04:00
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/*
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* Copyright (c) 1997, 1998
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* Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* FreeBSD Id: if_rlreg.h,v 1.9 1999/06/20 18:56:09 wpaul Exp
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*/
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2000-05-19 17:42:29 +04:00
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#define RTK_ETHER_ALIGN 2
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2000-11-30 18:51:57 +03:00
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#define RTK_RXSTAT_LEN 4
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2000-04-26 18:02:34 +04:00
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2000-05-15 05:55:12 +04:00
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struct rtk_type {
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u_int16_t rtk_vid;
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u_int16_t rtk_did;
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const char *rtk_name;
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int rtk_type;
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2000-04-26 18:02:34 +04:00
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};
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2000-05-15 05:55:12 +04:00
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struct rtk_mii_frame {
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2000-04-26 18:02:34 +04:00
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u_int8_t mii_stdelim;
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u_int8_t mii_opcode;
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u_int8_t mii_phyaddr;
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u_int8_t mii_regaddr;
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u_int8_t mii_turnaround;
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u_int16_t mii_data;
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};
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/*
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* MII constants
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*/
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2000-05-19 17:42:29 +04:00
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#define RTK_MII_STARTDELIM 0x01
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#define RTK_MII_READOP 0x02
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#define RTK_MII_WRITEOP 0x01
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#define RTK_MII_TURNAROUND 0x02
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2000-05-19 17:42:29 +04:00
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#define RTK_8129 1
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#define RTK_8139 2
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2000-04-26 18:02:34 +04:00
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2001-02-02 07:34:19 +03:00
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struct rtk_tx_desc {
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SIMPLEQ_ENTRY(rtk_tx_desc) txd_q;
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struct mbuf *txd_mbuf;
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bus_dmamap_t txd_dmamap;
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bus_addr_t txd_txaddr;
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bus_addr_t txd_txstat;
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};
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2000-05-15 05:55:12 +04:00
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struct rtk_softc {
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struct device sc_dev; /* generic device structures */
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2000-05-19 17:42:29 +04:00
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struct ethercom ethercom; /* interface info */
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struct mii_data mii;
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2000-05-15 05:55:12 +04:00
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struct callout rtk_tick_ch; /* tick callout */
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bus_space_handle_t rtk_bhandle; /* bus space handle */
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bus_space_tag_t rtk_btag; /* bus space tag */
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2000-12-05 14:11:49 +03:00
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int rtk_type;
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2000-05-19 17:42:29 +04:00
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bus_dma_tag_t sc_dmat;
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bus_dma_segment_t sc_dmaseg;
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int sc_dmanseg;
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2001-02-02 06:51:51 +03:00
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bus_dmamap_t recv_dmamap;
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caddr_t rtk_rx_buf;
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2001-02-02 07:34:19 +03:00
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struct rtk_tx_desc rtk_tx_descs[RTK_TX_LIST_CNT];
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SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_free;
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SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_dirty;
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2000-05-19 17:42:29 +04:00
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int sc_flags; /* misc flags */
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2001-07-25 13:57:31 +04:00
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int sc_txthresh; /* Early tx threshold */
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2000-05-19 17:42:29 +04:00
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void *sc_sdhook; /* shutdown hook */
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void *sc_powerhook; /* power management hook */
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/* Power management hooks. */
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int (*sc_enable) __P((struct rtk_softc *));
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void (*sc_disable) __P((struct rtk_softc *));
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void (*sc_power) __P((struct rtk_softc *, int));
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2000-04-26 18:02:34 +04:00
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};
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2000-05-19 17:42:29 +04:00
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#define RTK_ATTACHED 0x00000001 /* attach has succeeded */
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#define RTK_ENABLED 0x00000002 /* chip is enabled */
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#define RTK_IS_ENABLED(sc) ((sc)->sc_flags & RTK_ENABLED)
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2001-07-25 13:57:31 +04:00
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#define RTK_TX_THRESH(sc) (((sc)->sc_txthresh << 16) & 0x003F0000)
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#define TXTH_256 8
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#define TXTH_MAX 48
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2000-04-26 18:02:34 +04:00
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/*
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* register space access macros
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*/
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->rtk_btag, sc->rtk_bhandle, reg, val)
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2(sc->rtk_btag, sc->rtk_bhandle, reg, val)
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1(sc->rtk_btag, sc->rtk_bhandle, reg, val)
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2000-04-26 18:02:34 +04:00
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4(sc->rtk_btag, sc->rtk_bhandle, reg)
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2000-04-26 18:02:34 +04:00
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2(sc->rtk_btag, sc->rtk_bhandle, reg)
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1(sc->rtk_btag, sc->rtk_bhandle, reg)
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2000-05-19 17:42:29 +04:00
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#define RTK_TIMEOUT 1000
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/*
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* PCI low memory base and low I/O base register, and
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* other PCI registers.
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*/
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2000-05-19 17:42:29 +04:00
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#define RTK_PCI_LOIO 0x10
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#define RTK_PCI_LOMEM 0x14
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2000-05-19 17:42:29 +04:00
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#define RTK_PSTATE_MASK 0x0003
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#define RTK_PSTATE_D0 0x0000
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#define RTK_PSTATE_D1 0x0002
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#define RTK_PSTATE_D2 0x0002
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#define RTK_PSTATE_D3 0x0003
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#define RTK_PME_EN 0x0010
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#define RTK_PME_STATUS 0x8000
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2000-04-26 18:02:34 +04:00
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#ifdef _KERNEL
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void rtk_attach __P((struct rtk_softc *));
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int rtk_detach __P((struct rtk_softc *));
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int rtk_activate __P((struct device *, enum devact));
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int rtk_intr __P((void *));
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2000-04-26 18:02:34 +04:00
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#endif /* _KERNEL */
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