NetBSD/sys/arch/amiga/include/mtpr.h

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First part of M68060 and DraCo support. * for the M68060 part: store buffer and branch target cache aren't enabled yet (this needs cleanup of lots of locore.s code which is a maze of little passages, all a little different) (and it wasn't yet tested in an accellerated Amiga, only in the DraCo). I've included a workaround for 2 of the CPU bugs in chips with Masks 1F43G and earlier, but didn't bother to deal with the can of worms in the [0-3]D11W chips. Be sure to get "68060 rev. 1" or more reported at kernel startup time, or at least mention it (or the mask revision, if available) when reporting problems. * for the DraCo: only machines with a CIA timer. I assigned machine id 32000+nn (0x7Dnn), where n is the machine readable Quicklogic custom chip revision (also printed at boot time). "Guaranteed to work" up to rev. 3, newer DraCo's aren't guaranteed to have any CIA (we don't have a driver for the new timer yet). Supported are: - MF-II keyboards on the native interface and A3000 keyboards via the CIA. - builtin SCSI interface (yet another instance of siop) - CIA timer. - Zorro II devices which don't do DMA (don't get mapped to Zorro II address space in the DraCo) - "local bus" devices which are autoconfigured by the boot rom (should be all); only an Altais driver is there (looks like a Retina Z3) Not yet supported are: - native timer of newer machines. - Real Time Clock. - serial, parallel + floppy on the SuperIO chip (that is also: no mouse) XXX You need an enhanced boot loader, which will committed in a few days. XXX std.draco should and will go away.
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/* $NetBSD: mtpr.h,v 1.10 1996/05/09 20:31:53 is Exp $ */
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/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: Utah $Hdr: mtpr.h 1.1 90/07/09$
*
* @(#)mtpr.h 7.2 (Berkeley) 11/3/90
*/
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#ifndef _MACHINE_MPTR_H_
#define _MACHINE_MPTR_H_
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#ifdef _KERNEL
/*
* simulated software interrupt register (extends hardware
* SOFTINT bit)
*/
/*
* this makes it pretty machine dependant. Should this go into
* <amiga/amiga/mtpr.h> ?
*/
#include <amiga/amiga/custom.h>
First part of M68060 and DraCo support. * for the M68060 part: store buffer and branch target cache aren't enabled yet (this needs cleanup of lots of locore.s code which is a maze of little passages, all a little different) (and it wasn't yet tested in an accellerated Amiga, only in the DraCo). I've included a workaround for 2 of the CPU bugs in chips with Masks 1F43G and earlier, but didn't bother to deal with the can of worms in the [0-3]D11W chips. Be sure to get "68060 rev. 1" or more reported at kernel startup time, or at least mention it (or the mask revision, if available) when reporting problems. * for the DraCo: only machines with a CIA timer. I assigned machine id 32000+nn (0x7Dnn), where n is the machine readable Quicklogic custom chip revision (also printed at boot time). "Guaranteed to work" up to rev. 3, newer DraCo's aren't guaranteed to have any CIA (we don't have a driver for the new timer yet). Supported are: - MF-II keyboards on the native interface and A3000 keyboards via the CIA. - builtin SCSI interface (yet another instance of siop) - CIA timer. - Zorro II devices which don't do DMA (don't get mapped to Zorro II address space in the DraCo) - "local bus" devices which are autoconfigured by the boot rom (should be all); only an Altais driver is there (looks like a Retina Z3) Not yet supported are: - native timer of newer machines. - Real Time Clock. - serial, parallel + floppy on the SuperIO chip (that is also: no mouse) XXX You need an enhanced boot loader, which will committed in a few days. XXX std.draco should and will go away.
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#ifdef DRACO
#include <amiga/amiga/drcustom.h>
#endif
extern unsigned char ssir;
#define SIR_NET 0x1 /* call netintr */
#define SIR_CLOCK 0x2 /* call softclock */
#define SIR_CBACK 0x4 /* walk the sicallback-chain */
#define siroff(x) ssir &= ~(x)
First part of M68060 and DraCo support. * for the M68060 part: store buffer and branch target cache aren't enabled yet (this needs cleanup of lots of locore.s code which is a maze of little passages, all a little different) (and it wasn't yet tested in an accellerated Amiga, only in the DraCo). I've included a workaround for 2 of the CPU bugs in chips with Masks 1F43G and earlier, but didn't bother to deal with the can of worms in the [0-3]D11W chips. Be sure to get "68060 rev. 1" or more reported at kernel startup time, or at least mention it (or the mask revision, if available) when reporting problems. * for the DraCo: only machines with a CIA timer. I assigned machine id 32000+nn (0x7Dnn), where n is the machine readable Quicklogic custom chip revision (also printed at boot time). "Guaranteed to work" up to rev. 3, newer DraCo's aren't guaranteed to have any CIA (we don't have a driver for the new timer yet). Supported are: - MF-II keyboards on the native interface and A3000 keyboards via the CIA. - builtin SCSI interface (yet another instance of siop) - CIA timer. - Zorro II devices which don't do DMA (don't get mapped to Zorro II address space in the DraCo) - "local bus" devices which are autoconfigured by the boot rom (should be all); only an Altais driver is there (looks like a Retina Z3) Not yet supported are: - native timer of newer machines. - Real Time Clock. - serial, parallel + floppy on the SuperIO chip (that is also: no mouse) XXX You need an enhanced boot loader, which will committed in a few days. XXX std.draco should and will go away.
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#ifdef DRACO
#define setsoftint() (is_draco()? (*draco_intfrc |= DRIRQ_SOFT) :\
(custom.intreq = INTF_SETCLR|INTF_SOFTINT))
#define clrsoftint() (is_draco()? (*draco_intfrc &= ~DRIRQ_SOFT) :\
(custom.intreq = INTF_SOFTINT))
#else
#define setsoftint() (custom.intreq = INTF_SETCLR|INTF_SOFTINT)
#define clrsoftint() (custom.intreq = INTF_SOFTINT)
First part of M68060 and DraCo support. * for the M68060 part: store buffer and branch target cache aren't enabled yet (this needs cleanup of lots of locore.s code which is a maze of little passages, all a little different) (and it wasn't yet tested in an accellerated Amiga, only in the DraCo). I've included a workaround for 2 of the CPU bugs in chips with Masks 1F43G and earlier, but didn't bother to deal with the can of worms in the [0-3]D11W chips. Be sure to get "68060 rev. 1" or more reported at kernel startup time, or at least mention it (or the mask revision, if available) when reporting problems. * for the DraCo: only machines with a CIA timer. I assigned machine id 32000+nn (0x7Dnn), where n is the machine readable Quicklogic custom chip revision (also printed at boot time). "Guaranteed to work" up to rev. 3, newer DraCo's aren't guaranteed to have any CIA (we don't have a driver for the new timer yet). Supported are: - MF-II keyboards on the native interface and A3000 keyboards via the CIA. - builtin SCSI interface (yet another instance of siop) - CIA timer. - Zorro II devices which don't do DMA (don't get mapped to Zorro II address space in the DraCo) - "local bus" devices which are autoconfigured by the boot rom (should be all); only an Altais driver is there (looks like a Retina Z3) Not yet supported are: - native timer of newer machines. - Real Time Clock. - serial, parallel + floppy on the SuperIO chip (that is also: no mouse) XXX You need an enhanced boot loader, which will committed in a few days. XXX std.draco should and will go away.
1996-05-10 00:30:30 +04:00
#endif
#define setsoftnet() (ssir |= SIR_NET, setsoftint())
#define setsoftclock() (ssir |= SIR_CLOCK, setsoftint())
#define setsoftcback() (ssir |= SIR_CBACK, setsoftint())
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#endif /* _KERNEL */
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#endif /* !_MACHINE_MPTR_H_ */