2001-03-20 03:03:10 +03:00
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/* $NetBSD: upc_iobus.c,v 1.6 2001/03/20 00:03:10 bjh21 Exp $ */
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2000-08-17 03:56:08 +04:00
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/*-
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* Copyright (c) 2000 Ben Harris
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* This file is part of NetBSD/arm26 -- a port of NetBSD to ARM2/3 machines. */
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/*
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* upc_iobus.c - attachment of the 82C7xx to the Archimedes I/O bus
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*/
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#include <sys/param.h>
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2001-03-20 03:03:10 +03:00
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__RCSID("$NetBSD: upc_iobus.c,v 1.6 2001/03/20 00:03:10 bjh21 Exp $");
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2000-08-17 03:56:08 +04:00
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#include <sys/device.h>
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#include <arch/arm26/iobus/iobusvar.h>
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2000-08-23 21:28:51 +04:00
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#include <arch/arm26/iobus/iocreg.h>
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2000-08-17 03:56:08 +04:00
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#include <machine/irq.h>
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#include <dev/ic/upcreg.h>
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#include <dev/ic/upcvar.h>
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#include "ioeb.h"
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2001-01-24 02:58:31 +03:00
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#if NIOEB > 0
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#include <arch/arm26/ioc/ioebvar.h>
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#endif
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2000-08-17 03:56:08 +04:00
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static int upc_iobus_match(struct device *, struct cfdata *, void *);
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static void upc_iobus_attach(struct device *, struct device *, void *);
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struct upc_iobus_softc {
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struct upc_softc sc_upc;
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2001-01-24 01:07:59 +03:00
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struct evcnt sc_intrcnt4;
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struct evcnt sc_intrcntw;
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struct evcnt sc_intrcntf;
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struct evcnt sc_intrcntp;
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2000-08-17 03:56:08 +04:00
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};
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struct cfattach upc_iobus_ca = {
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sizeof(struct upc_iobus_softc), upc_iobus_match, upc_iobus_attach
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};
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2001-01-24 02:58:31 +03:00
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static struct device *the_upc_iobus;
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2000-08-17 03:56:08 +04:00
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static int
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upc_iobus_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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/*
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* As is traditional, probing for iobus devices is impossible
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* (The machine hangs if there's nothing there). In this case,
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2001-01-24 02:58:31 +03:00
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* assume that if there's an IOEB, we've got a UPC too.
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2000-08-17 03:56:08 +04:00
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*/
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#if NIOEB > 0
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2001-01-24 02:58:31 +03:00
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if (the_ioeb != NULL && the_upc_iobus == NULL)
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2000-08-17 03:56:08 +04:00
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return 1;
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#endif
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2001-01-24 02:58:31 +03:00
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return 0;
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2000-08-17 03:56:08 +04:00
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}
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static void
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upc_iobus_attach(struct device *parent, struct device *self, void *aux)
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{
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struct iobus_attach_args *ioa = aux;
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struct upc_iobus_softc *sc = (struct upc_iobus_softc *)self;
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struct upc_softc *upc = &sc->sc_upc;
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upc->sc_iot = ioa->ioa_tag;
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2001-03-20 03:03:10 +03:00
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bus_space_map(ioa->ioa_tag, MEMC_IO_BASE + ioa->ioa_base,
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UPC_BUS_SIZE, 0, &upc->sc_ioh);
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2000-08-17 03:56:08 +04:00
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upc_attach(upc);
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2001-01-24 01:07:59 +03:00
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if (upc->sc_irq4.uih_func != NULL) {
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evcnt_attach_dynamic(&sc->sc_intrcnt4, EVCNT_TYPE_INTR, NULL,
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self->dv_xname, "irq4");
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irq_establish(IOC_IRQ_IL2, upc->sc_irq4.uih_level,
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upc->sc_irq4.uih_func, upc->sc_irq4.uih_arg,
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&sc->sc_intrcnt4);
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}
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if (upc->sc_wintr.uih_func != NULL) {
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evcnt_attach_dynamic(&sc->sc_intrcntw, EVCNT_TYPE_INTR, NULL,
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self->dv_xname, "wdc intr");
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irq_establish(IOC_IRQ_IL3, upc->sc_wintr.uih_level,
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upc->sc_wintr.uih_func, upc->sc_wintr.uih_arg,
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&sc->sc_intrcntw);
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}
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if (upc->sc_fintr.uih_func != NULL) {
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evcnt_attach_dynamic(&sc->sc_intrcntf, EVCNT_TYPE_INTR, NULL,
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self->dv_xname, "fdc intr");
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irq_establish(IOC_IRQ_IL4, upc->sc_fintr.uih_level,
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upc->sc_fintr.uih_func, upc->sc_fintr.uih_arg,
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&sc->sc_intrcntf);
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}
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if (upc->sc_pintr.uih_func != NULL) {
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evcnt_attach_dynamic(&sc->sc_intrcntp, EVCNT_TYPE_INTR, NULL,
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self->dv_xname, "lpt intr");
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irq_establish(IOC_IRQ_IL6, upc->sc_pintr.uih_level,
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upc->sc_pintr.uih_func, upc->sc_pintr.uih_arg,
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&sc->sc_intrcntp);
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}
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2000-08-17 03:56:08 +04:00
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/* IRQ3 on the 82C71x is not connected */
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}
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