1996-10-22 02:56:24 +04:00
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/* $NetBSD: if_fpa.c,v 1.15 1996/10/21 22:56:40 thorpej Exp $ */
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1995-08-19 08:35:18 +04:00
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1995-08-19 04:59:47 +04:00
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/*-
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1996-05-20 04:30:49 +04:00
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* Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
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1995-08-19 04:59:47 +04:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software withough specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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1996-03-12 00:41:28 +03:00
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*
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1996-05-20 04:30:49 +04:00
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* Id: if_fpa.c,v 1.8 1996/05/17 01:15:18 thomas Exp
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1996-03-12 00:41:28 +03:00
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*
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1995-08-19 04:59:47 +04:00
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*/
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/*
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* DEC PDQ FDDI Controller; code for BSD derived operating systems
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*
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* This module supports the DEC DEFPA PCI FDDI Controller
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#if defined(__FreeBSD__)
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#include <sys/devconf.h>
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#elif defined(__bsdi__) || defined(__NetBSD__)
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#include <sys/device.h>
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#endif
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#include <net/if.h>
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#include <net/if_types.h>
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#include <net/if_dl.h>
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#include <net/route.h>
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#include "bpfilter.h"
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#include <net/bpfdesc.h>
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#endif
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#endif
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#if defined(__FreeBSD__)
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#include <netinet/if_fddi.h>
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#else
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#include <net/if_fddi.h>
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#endif
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_param.h>
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#if defined(__FreeBSD__)
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#include "fpa.h"
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#include <pci/pcivar.h>
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#include <i386/isa/icu.h>
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1996-05-20 04:30:49 +04:00
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#include <pci/pdqvar.h>
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1995-08-19 04:59:47 +04:00
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#include <pci/pdqreg.h>
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#elif defined(__bsdi__)
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1996-05-20 04:30:49 +04:00
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#if BSDI_VERSION < 199401
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#include <i386/isa/isavar.h>
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#include <i386/isa/icu.h>
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#define DRQNONE 0
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#define IRQSHARE 0
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#endif
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1995-08-19 04:59:47 +04:00
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#include <i386/pci/pci.h>
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1996-05-20 04:30:49 +04:00
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#include <i386/pci/pdqvar.h>
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1995-08-19 04:59:47 +04:00
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#include <i386/pci/pdqreg.h>
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#elif defined(__NetBSD__)
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1996-05-20 04:30:49 +04:00
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#include <dev/pci/pcidevs.h>
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1995-08-19 04:59:47 +04:00
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#include <dev/pci/pcivar.h>
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1995-08-19 08:35:18 +04:00
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#include <dev/ic/pdqvar.h>
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1996-05-20 04:30:49 +04:00
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#include <dev/ic/pdqreg.h>
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1995-08-19 04:59:47 +04:00
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#endif /* __NetBSD__ */
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#define DEC_VENDORID 0x1011
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#define DEFPA_CHIPID 0x000F
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#define PCI_VENDORID(x) ((x) & 0xFFFF)
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#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF)
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#define DEFPA_LATENCY 0x88
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#define PCI_CFLT 0x0C /* Configuration Latency */
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#define PCI_CBMA 0x10 /* Configuration Base Memory Address */
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1996-05-20 04:30:49 +04:00
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#define PCI_CBIO 0x14 /* Configuration Base I/O Address */
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1995-08-19 04:59:47 +04:00
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#if defined(__FreeBSD__)
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static pdq_softc_t *pdqs_pci[NFPA];
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#define PDQ_PCI_UNIT_TO_SOFTC(unit) (pdqs_pci[unit])
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1996-05-20 04:30:49 +04:00
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#if BSD >= 199506
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#define pdq_pci_ifwatchdog NULL
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#endif
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1995-08-19 04:59:47 +04:00
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1996-05-20 04:30:49 +04:00
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#elif defined(__bsdi__)
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1995-08-19 04:59:47 +04:00
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extern struct cfdriver fpacd;
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#define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)fpacd.cd_devs[unit])
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1996-05-20 04:30:49 +04:00
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#elif defined(__NetBSD__)
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1996-03-17 03:53:54 +03:00
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extern struct cfattach fpa_ca;
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extern struct cfdriver fpa_cd;
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#define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)fpa_cd.cd_devs[unit])
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1996-05-20 04:30:49 +04:00
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#define pdq_pci_ifwatchdog NULL
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1996-03-17 03:53:54 +03:00
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#endif
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1996-05-20 04:30:49 +04:00
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#ifndef pdq_pci_ifwatchdog
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1995-08-19 04:59:47 +04:00
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static ifnet_ret_t
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pdq_pci_ifwatchdog(
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int unit)
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{
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1996-05-20 04:30:49 +04:00
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pdq_ifwatchdog(&PDQ_PCI_UNIT_TO_SOFTC(unit)->sc_if);
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1995-08-19 04:59:47 +04:00
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}
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1996-05-07 06:17:18 +04:00
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#endif
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1995-08-19 04:59:47 +04:00
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static int
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pdq_pci_ifintr(
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void *arg)
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{
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pdq_softc_t * const sc = (pdq_softc_t *) arg;
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#ifdef __FreeBSD__
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return pdq_interrupt(sc->sc_pdq);
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#elif defined(__bsdi__) || defined(__NetBSD__)
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(void) pdq_interrupt(sc->sc_pdq);
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return 1;
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#endif
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}
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#if defined(__FreeBSD__)
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1996-05-20 04:30:49 +04:00
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/*
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* This is the PCI configuration support. Since the PDQ is available
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* on both EISA and PCI boards, one must be careful in how defines the
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* PDQ in the config file.
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*/
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1995-08-19 04:59:47 +04:00
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static char *
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pdq_pci_probe(
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pcici_t config_id,
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pcidi_t device_id)
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{
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if (PCI_VENDORID(device_id) == DEC_VENDORID &&
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PCI_CHIPID(device_id) == DEFPA_CHIPID)
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return "Digital DEFPA PCI FDDI Controller";
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return NULL;
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}
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static void
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pdq_pci_attach(
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pcici_t config_id,
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int unit)
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{
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pdq_softc_t *sc;
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vm_offset_t va_csrs, pa_csrs;
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pdq_uint32_t data;
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if (unit > NFPA) {
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1996-10-13 05:37:04 +04:00
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printf("fpa%d: not configured; kernel is built for only %d device%s.\n",
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1995-08-19 04:59:47 +04:00
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unit, NFPA, NFPA == 1 ? "" : "s");
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return;
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}
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data = pci_conf_read(config_id, PCI_CFLT);
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1996-05-20 04:30:49 +04:00
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if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
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1995-08-19 04:59:47 +04:00
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data &= ~0xFF00;
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data |= DEFPA_LATENCY << 8;
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pci_conf_write(config_id, PCI_CFLT, data);
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}
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sc = (pdq_softc_t *) malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
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if (sc == NULL)
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return;
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bzero(sc, sizeof(pdq_softc_t)); /* Zero out the softc*/
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if (!pci_map_mem(config_id, PCI_CBMA, &va_csrs, &pa_csrs)) {
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free((void *) sc, M_DEVBUF);
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return;
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}
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sc->sc_if.if_name = "fpa";
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sc->sc_if.if_unit = unit;
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1996-05-20 04:30:49 +04:00
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sc->sc_membase = (pdq_bus_memaddr_t) va_csrs;
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sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase,
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sc->sc_if.if_name, sc->sc_if.if_unit,
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1995-08-19 04:59:47 +04:00
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(void *) sc, PDQ_DEFPA);
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if (sc->sc_pdq == NULL) {
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free((void *) sc, M_DEVBUF);
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return;
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}
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bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
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pdqs_pci[unit] = sc;
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1996-05-20 04:30:49 +04:00
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pdq_ifattach(sc, pdq_pci_ifwatchdog);
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1995-08-19 04:59:47 +04:00
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pci_map_int(config_id, pdq_pci_ifintr, (void*) sc, &net_imask);
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}
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static int
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pdq_pci_shutdown(
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struct kern_devconf *kdc,
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int force)
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{
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if (kdc->kdc_unit < NFPA)
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pdq_hwreset(PDQ_PCI_UNIT_TO_SOFTC(kdc->kdc_unit)->sc_pdq);
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(void) dev_detach(kdc);
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return 0;
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}
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1996-05-20 04:30:49 +04:00
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static u_long pdq_pci_count;
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struct pci_device fpadevice = {
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"fpa",
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pdq_pci_probe,
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pdq_pci_attach,
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&pdq_pci_count,
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pdq_pci_shutdown,
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};
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#ifdef DATA_SET
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DATA_SET (pcidevice_set, fpadevice);
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#endif
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1995-08-19 04:59:47 +04:00
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#elif defined(__bsdi__)
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static int
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pdq_pci_match(
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pci_devaddr_t *pa)
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{
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int irq;
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int id;
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id = pci_inl(pa, PCI_VENDOR_ID);
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if (PCI_VENDORID(id) != DEC_VENDORID || PCI_CHIPID(id) != DEFPA_CHIPID)
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return 0;
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irq = pci_inl(pa, PCI_I_LINE) & 0xFF;
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if (irq == 0 || irq >= 16)
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return 0;
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return 1;
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}
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int
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pdq_pci_probe(
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struct device *parent,
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struct cfdata *cf,
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void *aux)
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{
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struct isa_attach_args *ia = (struct isa_attach_args *) aux;
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pdq_uint32_t irq, data;
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pci_devaddr_t *pa;
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pa = pci_scan(pdq_pci_match);
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if (pa == NULL)
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return 0;
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irq = (1 << (pci_inl(pa, PCI_I_LINE) & 0xFF));
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if (ia->ia_irq != IRQUNK && irq != ia->ia_irq) {
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1996-10-13 05:37:04 +04:00
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printf("fpa%d: error: desired IRQ of %d does not match device's actual IRQ of %d\n",
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1995-08-19 04:59:47 +04:00
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cf->cf_unit,
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ffs(ia->ia_irq) - 1, ffs(irq) - 1);
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return 0;
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}
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1996-05-20 04:30:49 +04:00
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if (ia->ia_irq == IRQUNK) {
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(void) isa_irqalloc(irq);
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ia->ia_irq = irq;
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1995-08-19 04:59:47 +04:00
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}
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/* PCI bus masters don't use host DMA channels */
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ia->ia_drq = DRQNONE;
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/* Get the memory base address; assume the BIOS set it up correctly */
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ia->ia_maddr = (caddr_t) (pci_inl(pa, PCI_CBMA) & ~7);
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pci_outl(pa, PCI_CBMA, 0xFFFFFFFF);
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ia->ia_msize = ((~pci_inl(pa, PCI_CBMA)) | 7) + 1;
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pci_outl(pa, PCI_CBMA, (int) ia->ia_maddr);
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/* Disable I/O space access */
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pci_outl(pa, PCI_COMMAND, pci_inl(pa, PCI_COMMAND) & ~1);
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ia->ia_iobase = 0;
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ia->ia_iosize = 0;
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/* Make sure the latency timer is what the DEFPA likes */
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data = pci_inl(pa, PCI_CFLT);
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1996-05-20 04:30:49 +04:00
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if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
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1995-08-19 04:59:47 +04:00
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data &= ~0xFF00;
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data |= DEFPA_LATENCY << 8;
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pci_outl(pa, PCI_CFLT, data);
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}
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1996-05-20 04:30:49 +04:00
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ia->ia_irq |= IRQSHARE;
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1995-08-19 04:59:47 +04:00
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return 1;
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}
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void
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pdq_pci_attach(
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struct device *parent,
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struct device *self,
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void *aux)
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{
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pdq_softc_t *sc = (pdq_softc_t *) self;
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register struct isa_attach_args *ia = (struct isa_attach_args *) aux;
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register struct ifnet *ifp = &sc->sc_if;
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|
|
|
int i;
|
|
|
|
|
|
|
|
sc->sc_if.if_unit = sc->sc_dev.dv_unit;
|
|
|
|
sc->sc_if.if_name = "fpa";
|
|
|
|
sc->sc_if.if_flags = 0;
|
1996-05-20 04:30:49 +04:00
|
|
|
sc->sc_membase = (pdq_bus_memaddr_t) mapphys((vm_offset_t)ia->ia_maddr, ia->ia_msize);
|
1995-08-19 04:59:47 +04:00
|
|
|
|
1996-05-20 04:30:49 +04:00
|
|
|
sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase,
|
|
|
|
sc->sc_if.if_nme, sc->sc_if.if_unit,
|
|
|
|
(void *) sc, PDQ_DEFPA);
|
1995-08-19 04:59:47 +04:00
|
|
|
if (sc->sc_pdq == NULL) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("fpa%d: initialization failed\n", sc->sc_if.if_unit);
|
1995-08-19 04:59:47 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
|
|
|
|
|
1996-05-20 04:30:49 +04:00
|
|
|
pdq_ifattach(sc, pdq_pci_ifwatchdog);
|
1995-08-19 04:59:47 +04:00
|
|
|
|
|
|
|
isa_establish(&sc->sc_id, &sc->sc_dev);
|
|
|
|
|
|
|
|
sc->sc_ih.ih_fun = pdq_pci_ifintr;
|
|
|
|
sc->sc_ih.ih_arg = (void *)sc;
|
|
|
|
intr_establish(ia->ia_irq, &sc->sc_ih, DV_NET);
|
|
|
|
|
|
|
|
sc->sc_ats.func = (void (*)(void *)) pdq_hwreset;
|
|
|
|
sc->sc_ats.arg = (void *) sc->sc_pdq;
|
|
|
|
atshutdown(&sc->sc_ats, ATSH_ADD);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct cfdriver fpacd = {
|
1996-05-20 04:30:49 +04:00
|
|
|
0, "fpa", pdq_pci_probe, pdq_pci_attach,
|
|
|
|
#if _BSDI_VERSION >= 199401
|
|
|
|
DV_IFNET,
|
|
|
|
#endif
|
|
|
|
sizeof(pdq_softc_t)
|
1995-08-19 04:59:47 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
#elif defined(__NetBSD__)
|
|
|
|
|
|
|
|
static int
|
1996-05-20 04:30:49 +04:00
|
|
|
pdq_pci_match(
|
1995-08-19 04:59:47 +04:00
|
|
|
struct device *parent,
|
|
|
|
void *match,
|
|
|
|
void *aux)
|
|
|
|
{
|
|
|
|
struct pci_attach_args *pa = (struct pci_attach_args *) aux;
|
|
|
|
|
1996-05-20 04:30:49 +04:00
|
|
|
if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_DEC)
|
|
|
|
return 0;
|
|
|
|
if (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_DEC_DEFPA)
|
1995-08-19 04:59:47 +04:00
|
|
|
return 0;
|
|
|
|
|
1996-06-17 22:29:18 +04:00
|
|
|
return 1;
|
1995-08-19 04:59:47 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pdq_pci_attach(
|
|
|
|
struct device * const parent,
|
|
|
|
struct device * const self,
|
|
|
|
void * const aux)
|
|
|
|
{
|
|
|
|
pdq_softc_t * const sc = (pdq_softc_t *) self;
|
|
|
|
struct pci_attach_args * const pa = (struct pci_attach_args *) aux;
|
1996-05-20 04:30:49 +04:00
|
|
|
pdq_uint32_t data;
|
|
|
|
pci_intr_handle_t intrhandle;
|
|
|
|
const char *intrstr;
|
1996-10-22 02:56:24 +04:00
|
|
|
bus_addr_t csrbase;
|
|
|
|
bus_size_t csrsize;
|
|
|
|
int cacheable = 0;
|
1996-05-20 04:30:49 +04:00
|
|
|
|
|
|
|
data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFLT);
|
|
|
|
if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
|
1995-08-19 04:59:47 +04:00
|
|
|
data &= ~0xFF00;
|
|
|
|
data |= DEFPA_LATENCY << 8;
|
1996-05-20 04:30:49 +04:00
|
|
|
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_CFLT, data);
|
1995-08-19 04:59:47 +04:00
|
|
|
}
|
|
|
|
|
1996-05-07 06:17:18 +04:00
|
|
|
bcopy(sc->sc_dev.dv_xname, sc->sc_if.if_xname, IFNAMSIZ);
|
1995-08-19 04:59:47 +04:00
|
|
|
sc->sc_if.if_flags = 0;
|
1996-05-20 04:30:49 +04:00
|
|
|
sc->sc_if.if_softc = sc;
|
|
|
|
|
1996-10-22 02:56:24 +04:00
|
|
|
/*
|
|
|
|
* NOTE: sc_bc is an alias for sc_csrtag and sc_membase is an
|
|
|
|
* alias for sc_csrhandle. sc_iobase is not used in this front-end.
|
|
|
|
*/
|
1996-05-20 04:30:49 +04:00
|
|
|
#ifdef PDQ_IOMAPPED
|
1996-10-22 02:56:24 +04:00
|
|
|
sc->sc_csrtag = pa->pa_iot;
|
|
|
|
if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_CBIO, &csrbase, &csrsize)) {
|
|
|
|
printf("\n%s: can't find I/O space!\n", sc->sc_dev.dv_xname);
|
1996-05-20 04:30:49 +04:00
|
|
|
return;
|
1996-05-20 19:52:32 +04:00
|
|
|
}
|
1996-05-20 04:30:49 +04:00
|
|
|
#else
|
1996-10-22 02:56:24 +04:00
|
|
|
sc->sc_csrtag = pa->pa_memt;
|
|
|
|
if (pci_mem_find(pa->pa_pc, pa->pa_tag, PCI_CBMA, &csrbase, &csrsize,
|
|
|
|
&cacheable)) {
|
|
|
|
printf("\n%s: can't find memory space!\n", sc->sc_dev.dv_xname);
|
1995-08-19 04:59:47 +04:00
|
|
|
return;
|
1996-05-20 19:52:32 +04:00
|
|
|
}
|
1996-05-20 04:30:49 +04:00
|
|
|
#endif
|
|
|
|
|
1996-10-22 02:56:24 +04:00
|
|
|
if (bus_space_map(sc->sc_csrtag, csrbase, csrsize, cacheable,
|
|
|
|
&sc->sc_csrhandle)) {
|
|
|
|
printf("\n%s: can't map CSRs!\n", sc->sc_dev.dv_xname);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->sc_pdq = pdq_initialize(sc->sc_csrtag, sc->sc_csrhandle,
|
1996-05-20 04:30:49 +04:00
|
|
|
sc->sc_if.if_xname, 0,
|
|
|
|
(void *) sc, PDQ_DEFPA);
|
|
|
|
if (sc->sc_pdq == NULL) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: initialization failed\n", sc->sc_dev.dv_xname);
|
1996-05-20 04:30:49 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
1995-08-19 04:59:47 +04:00
|
|
|
bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
|
1996-05-20 04:30:49 +04:00
|
|
|
pdq_ifattach(sc, pdq_pci_ifwatchdog);
|
1995-08-19 04:59:47 +04:00
|
|
|
|
1996-05-20 04:30:49 +04:00
|
|
|
if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
|
|
|
|
pa->pa_intrline, &intrhandle)) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: couldn't map interrupt\n", self->dv_xname);
|
1996-05-20 04:30:49 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
intrstr = pci_intr_string(pa->pa_pc, intrhandle);
|
|
|
|
sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET, pdq_pci_ifintr, sc);
|
1995-08-19 04:59:47 +04:00
|
|
|
if (sc->sc_ih == NULL) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: couldn't establish interrupt", self->dv_xname);
|
1996-05-20 04:30:49 +04:00
|
|
|
if (intrstr != NULL)
|
1996-10-13 05:37:04 +04:00
|
|
|
printf(" at %s", intrstr);
|
|
|
|
printf("\n");
|
1995-08-19 04:59:47 +04:00
|
|
|
return;
|
|
|
|
}
|
1996-05-20 04:30:49 +04:00
|
|
|
|
|
|
|
sc->sc_ats = shutdownhook_establish((void (*)(void *)) pdq_hwreset, sc->sc_pdq);
|
1995-08-19 04:59:47 +04:00
|
|
|
if (sc->sc_ats == NULL)
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: warning: couldn't establish shutdown hook\n", self->dv_xname);
|
1996-05-20 04:30:49 +04:00
|
|
|
if (intrstr != NULL)
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: interrupting at %s\n", self->dv_xname, intrstr);
|
1995-08-19 04:59:47 +04:00
|
|
|
}
|
|
|
|
|
1996-03-17 03:53:54 +03:00
|
|
|
struct cfattach fpa_ca = {
|
1996-05-20 04:30:49 +04:00
|
|
|
sizeof(pdq_softc_t), pdq_pci_match, pdq_pci_attach
|
1996-03-17 03:53:54 +03:00
|
|
|
};
|
|
|
|
|
|
|
|
struct cfdriver fpa_cd = {
|
|
|
|
0, "fpa", DV_IFNET
|
1995-08-19 04:59:47 +04:00
|
|
|
};
|
1996-05-20 04:30:49 +04:00
|
|
|
|
1995-08-19 04:59:47 +04:00
|
|
|
#endif /* __NetBSD__ */
|