69 lines
2.5 KiB
C
69 lines
2.5 KiB
C
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/* $NetBSD: cyreg.h,v 1.1 1996/09/24 18:02:35 christos Exp $ */
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/*-
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* Copyright (c) 1995 Bruce Evans.
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* All rights reserved.
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*
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* Modified by Timo Rossi, 1996
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Id: cyreg.h,v 1.1 1995/07/05 12:15:51 bde Exp
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*/
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/*
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* Definitions for Cyclades Cyclom-Y serial boards.
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*/
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#define CY8_SVCACKR 0x100
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#define CY8_SVCACKT 0x200
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#define CY8_SVCACKM 0x300
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/* twice this in PCI mode (shifed BUSTYPE bits left) */
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#define CY_CD1400_MEMSPACING 0x400
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/* adjustment value for accessing the last 4 cd1400s on Cyclom-32 */
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#define CY32_ADDR_FIX 0xe00
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#define CY16_RESET 0x1400
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#define CY_CLEAR_INTR 0x1800 /* intr ack address */
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#define CY_MAX_CD1400s 8 /* for Cyclom-32 */
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/* I/O location for enabling interrupts on PCI Cyclom cards */
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#define CY_PCI_INTENA 0x68
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#define CY_CLOCK 25000000 /* baud rate clock */
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#define CY_MEMSIZE 0x2000
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/*
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* bustype is actually the shift count for the offset
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* ISA card addresses are multiplied by 2 (shifted 1 bit)
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* and PCI addresses multiplied by 4 (shifted 2 bits)
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*/
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#define CY_BUSTYPE_ISA 0
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#define CY_BUSTYPE_PCI 1
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