1998-07-26 04:40:59 +04:00
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/* $NetBSD: uhcivar.h,v 1.3 1998/07/26 00:40:59 augustss Exp $ */
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1998-07-12 23:51:55 +04:00
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/*
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Author: Lennart Augustsson <augustss@carlstedt.se>
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* Carlstedt Research & Technology
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* To avoid having 1024 TDs for each isochronous transfer we introduce
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* a virtual frame list. Every UHCI_VFRAMELIST_COUNT entries in the real
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* frame list points to a non-active TD. These, in turn, which form the
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* starts of the virtual frame list. This also has the advantage that it
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* simplifies linking in/out TD/QH in the schedule.
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* Furthermore, initially each of the inactive TDs point to an inactive
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* QH that forms the start of the interrupt traffic for that slot.
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* Each of these QHs point to the same QH that is the start of control
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* traffic.
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*
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* UHCI_VFRAMELIST_COUNT should be a power of 2 and <= UHCI_FRAMELIST_COUNT.
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*/
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#define UHCI_VFRAMELIST_COUNT 128
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typedef struct uhci_soft_qh uhci_soft_qh_t;
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typedef struct uhci_soft_td uhci_soft_td_t;
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/*
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* An interrupt info struct contains the information needed to
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* execute a requested routine when the controller generates an
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* interrupt. Since we cannot know which transfer generated
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* the interrupt all structs are linked together so they can be
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* searched at interrupt time.
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*/
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typedef struct uhci_intr_info {
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struct uhci_softc *sc;
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usbd_request_handle reqh;
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uhci_soft_td_t *stdstart;
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uhci_soft_td_t *stdend;
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LIST_ENTRY(uhci_intr_info) list;
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1998-07-25 01:09:07 +04:00
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#ifdef DIAGNOSTIC
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int isdone;
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#endif
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1998-07-12 23:51:55 +04:00
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} uhci_intr_info_t;
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/*
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* Extra information that we need for a TD.
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*/
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struct uhci_soft_td {
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uhci_td_t *td; /* The real TD */
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uhci_physaddr_t physaddr; /* and its physical address. */
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};
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#define UHCI_TD_CHUNK 128 /*(PAGE_SIZE / UHCI_TD_SIZE)*/
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/*
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* Extra information that we need for a QH.
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*/
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struct uhci_soft_qh {
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uhci_qh_t *qh; /* The real QH */
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uhci_physaddr_t physaddr; /* and its physical address. */
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int pos; /* Timeslot position */
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uhci_intr_info_t *intr_info; /* Who to call on completion. */
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};
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#define UHCI_QH_CHUNK 128 /*(PAGE_SIZE / UHCI_QH_SIZE)*/
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/* Only used for buffer free list. */
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struct uhci_buffer {
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struct uhci_buffer *next;
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};
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#define UHCI_BUFFER_SIZE 64
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#define UHCI_BUFFER_CHUNK 64 /*(PAGE_SIZE / UHCI_BUFFER_SIZE)*/
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/*
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* Information about an entry in the virtial frame list.
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*/
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struct uhci_vframe {
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uhci_soft_td_t *htd; /* pointer to dummy TD */
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uhci_soft_td_t *etd; /* pointer to last TD */
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uhci_soft_qh_t *hqh; /* pointer to dummy QH */
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uhci_soft_qh_t *eqh; /* pointer to last QH */
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u_int bandwidth; /* max bandwidth used by this frame */
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};
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typedef struct uhci_softc {
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struct usbd_bus sc_bus; /* base device */
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void *sc_ih; /* interrupt vectoring */
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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bus_dma_tag_t sc_dmatag; /* DMA tag */
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/* XXX should keep track of all DMA memory */
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uhci_physaddr_t *sc_pframes;
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struct uhci_vframe sc_vframes[UHCI_VFRAMELIST_COUNT];
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uhci_soft_qh_t *sc_ctl_start; /* dummy QH for control */
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uhci_soft_qh_t *sc_ctl_end; /* last control QH */
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uhci_soft_qh_t *sc_bulk_start; /* dummy QH for bulk */
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uhci_soft_qh_t *sc_bulk_end; /* last bulk transfer */
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uhci_soft_td_t *sc_freetds;
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uhci_soft_qh_t *sc_freeqhs;
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struct uhci_buffer *sc_freebuffers;
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u_int8_t sc_addr; /* device address */
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u_int8_t sc_conf; /* device configuration */
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char sc_isreset;
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int sc_intrs;
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LIST_HEAD(, uhci_intr_info) sc_intrhead;
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/* Info for the root hub interrupt channel. */
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int sc_ival;
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char sc_vflock;
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#define UHCI_HAS_LOCK 1
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#define UHCI_WANT_LOCK 2
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1998-07-25 01:09:07 +04:00
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usb_dma_t *sc_mallocs;
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1998-07-26 04:40:59 +04:00
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char sc_vendor[16];
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1998-07-12 23:51:55 +04:00
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} uhci_softc_t;
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usbd_status uhci_init __P((uhci_softc_t *));
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int uhci_intr __P((void *));
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#if 0
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void uhci_reset __P((void *));
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#endif
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#ifdef USB_DEBUG
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#define DPRINTF(x) if (uhcidebug) printf x
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#define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
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extern int uhcidebug;
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#else
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#define DPRINTF(x)
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#define DPRINTFN(n,x)
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#endif
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