1996-02-22 13:10:44 +03:00
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/* $NetBSD: dma.h,v 1.8 1996/02/22 10:11:41 leo Exp $ */
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1995-03-26 11:12:03 +04:00
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/*
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* Copyright (c) 1995 Leo Weppelman.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Leo Weppelman.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MACHINE_DMA_H
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#define _MACHINE_DMA_H
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/*
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* Atari TT hardware:
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* FDC/ACSI DMA circuitry
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*/
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#define DMA ((struct dma *)AD_DMA)
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struct dma {
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1995-04-23 02:18:57 +04:00
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volatile short dma_gap[2]; /* reserved */
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volatile u_short dma_data; /* controller data path */
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volatile u_short dma_mode; /* mode register */
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volatile u_char dma_addr[6]; /* base address H/M/L */
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1995-07-11 22:27:31 +04:00
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volatile u_short dma_drvmode; /* floppy density settings */
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1995-03-26 11:12:03 +04:00
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};
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#define dma_nsec dma_data /* sector count */
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#define dma_stat dma_mode /* status register */
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/*
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* Mode register bits
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*/
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1995-04-23 02:18:57 +04:00
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/* 0x0001 *//* not used */
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#define DMA_A0 0x0002 /* signal A0 to fdc/hdc */
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#define DMA_A1 0x0004 /* signal A1 to fdc/hdc */
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#define DMA_HDC 0x0008 /* must be on if accessing hdc */
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#define DMA_SCREG 0x0010 /* access sector count register */
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/* 0x0020 *//* reserved */
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#define DMA_NODMA 0x0040 /* no DMA (yet) */
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#define DMA_FDC 0x0080 /* must be on if accessing fdc */
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#define DMA_WRBIT 0x0100 /* write to fdc/hdc via dma_data*/
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#define DMA_SCSI 0x0088 /* select 5380 chip */
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1995-03-26 11:12:03 +04:00
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/*
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* Status register bits
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*/
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#define DMAOK 0x0001 /* something wrong */
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#define SCNOT0 0x0002 /* sector count not 0 */
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#define DATREQ 0x0004 /* FDC data request signal */
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/*
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* Indices into dma_addr.
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* Access low byte of 16 bits.
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* Fill low/mid/high in this order.
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*/
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#define AD_HIGH 1
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#define AD_MID 3
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#define AD_LOW 5
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/*
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* Defines for 'dmadrv_mode'.
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*/
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#define FDC_HDSET 1 /* Set FDC for High density */
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#define FDC_HDSIG 2 /* Signal HD present to drive */
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1995-04-23 02:18:57 +04:00
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1995-04-30 16:02:03 +04:00
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/*
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* Lock status bits:
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*/
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#define DMA_LOCK_REQ 1 /* DMA lock requested */
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#define DMA_LOCK_GRANT 2 /* DMA lock granted */
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1995-04-23 02:18:57 +04:00
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#ifdef _KERNEL
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1996-02-22 13:10:44 +03:00
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typedef void (*dma_farg)(void*);
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int st_dmagrab __P((dma_farg, dma_farg, void *, int *, int));
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1995-05-14 19:29:18 +04:00
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void st_dmafree __P((void *, int *));
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int st_dmawanted __P((void));
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void st_dmaaddr_set __P((caddr_t));
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u_long st_dmaaddr_get __P((void));
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void st_dmacomm __P((int, int));
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1995-04-23 02:18:57 +04:00
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#endif /* _KERNEL */
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1995-03-26 11:12:03 +04:00
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#endif /* _MACHINE_DMA_H */
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