1996-02-24 03:54:53 +03:00
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/* $NetBSD: dcmreg.h,v 1.5 1996/02/24 00:55:05 thorpej Exp $ */
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1994-10-26 10:22:45 +03:00
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1993-05-13 17:56:20 +04:00
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/*
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* Copyright (c) 1988 University of Utah.
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1994-05-23 09:58:16 +04:00
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* Copyright (c) 1982, 1986, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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1993-05-13 17:56:20 +04:00
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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1994-05-23 09:58:16 +04:00
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* from: Utah $Hdr: dcmreg.h 1.7 92/01/21$
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*
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1994-10-26 10:22:45 +03:00
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* @(#)dcmreg.h 8.1 (Berkeley) 6/10/93
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1993-05-13 17:56:20 +04:00
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*/
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1994-05-23 09:58:16 +04:00
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#include <hp300/dev/iotypes.h> /* XXX */
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1993-05-13 17:56:20 +04:00
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struct dcmdevice { /* host address, only odd bytes addressed */
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u_char dcm_pad0;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_rsid; /* Reset / ID 0001 */
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1993-05-13 17:56:20 +04:00
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u_char dcm_pad1;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_ic; /* Interrupt control register 0003 */
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1993-05-13 17:56:20 +04:00
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u_char dcm_pad2;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_sem; /* Semaphore register 0005 */
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1993-05-13 17:56:20 +04:00
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u_char dcm_pad3[0x7ffa]; /* Unaddressable 0006-7fff */
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u_char dcm_pad4;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_iir; /* Interrupt ident register 8001 */
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1993-05-13 17:56:20 +04:00
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u_char dcm_pad5;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_cr; /* Command register 8003 */
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1993-05-13 17:56:20 +04:00
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u_char dcm_pad6[0x3fc]; /* Card scratch 8004-83ff */
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struct dcmrfifo {
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u_char ptr_pad1;
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1994-05-23 09:58:16 +04:00
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vu_char data_char;
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1993-05-13 17:56:20 +04:00
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u_char ptr_pad2;
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1994-05-23 09:58:16 +04:00
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vu_char data_stat;
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1993-05-13 17:56:20 +04:00
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} dcm_rfifos[4][0x80]; /* Receive queues 8400 */
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struct {
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u_char ptr_pad1;
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1994-05-23 09:58:16 +04:00
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vu_char data_data;
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1993-05-13 17:56:20 +04:00
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} dcm_bmap[0x100]; /* Bitmap table 8c00 */
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struct {
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u_char ptr_pad;
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1994-05-23 09:58:16 +04:00
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vu_char ptr;
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1993-05-13 17:56:20 +04:00
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} dcm_rhead[4]; /* Fifo head - receive 8e00 */
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struct {
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u_char ptr_pad;
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1994-05-23 09:58:16 +04:00
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vu_char ptr;
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1993-05-13 17:56:20 +04:00
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} dcm_rtail[4]; /* Fifo tail - receive 8e08 */
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struct {
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u_char ptr_pad;
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1994-05-23 09:58:16 +04:00
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vu_char ptr;
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1993-05-13 17:56:20 +04:00
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} dcm_thead[4]; /* Fifo head - transmit 8e10 */
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struct {
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u_char ptr_pad;
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1994-05-23 09:58:16 +04:00
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vu_char ptr;
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1993-05-13 17:56:20 +04:00
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} dcm_ttail[4]; /* Fifo tail - transmit 8e18 */
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struct {
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u_char pad1;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_conf;
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1993-05-13 17:56:20 +04:00
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u_char pad2;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_baud;
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1993-05-13 17:56:20 +04:00
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} dcm_data[4]; /* Configuration registers 8e20 */
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struct modemreg {
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u_char pad0;
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1994-05-23 09:58:16 +04:00
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vu_char mdmin; /* Modem in 8e31 */
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1993-05-13 17:56:20 +04:00
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u_char pad1;
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1994-05-23 09:58:16 +04:00
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vu_char mdmout; /* Modem out 8e33 */
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1993-05-13 17:56:20 +04:00
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u_char pad2;
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1994-05-23 09:58:16 +04:00
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vu_char mdmmsk; /* Modem mask 8e35 */
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1993-05-13 17:56:20 +04:00
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} dcm_modem0;
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struct {
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u_char pad1;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_data;
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1993-05-13 17:56:20 +04:00
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} dcm_cmdtab[4]; /* Command tables 8e36 */
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struct {
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u_char pad1;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_data;
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1993-05-13 17:56:20 +04:00
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} dcm_icrtab[4]; /* Interrupt data 8e3e */
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u_char dcm_pad10;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_stcon; /* Self test condition 8e47 */
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1993-05-13 17:56:20 +04:00
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struct modemreg dcm_modem1; /* 638 Modem port1 8e48 */
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struct modemreg dcm_modem2; /* 638 Modem port2 8e4e */
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struct modemreg dcm_modem3; /* 638 Modem port3 8e54 */
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u_char dcm_pad11;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_modemchng; /* 638 Modem change mask 8e5b */
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1993-05-13 17:56:20 +04:00
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u_char dcm_pad12;
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1994-05-23 09:58:16 +04:00
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vu_char dcm_modemintr; /* 638 Modem interrupt mask 8e5d */
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1993-05-13 17:56:20 +04:00
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u_char dcm_pad13[0x82]; /* Undef Shared Ram 8e5e-8edf */
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struct dcmtfifo {
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u_char ptr_pad1;
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1994-05-23 09:58:16 +04:00
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vu_char data_char;
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1993-05-13 17:56:20 +04:00
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} dcm_tfifos[4][0x10]; /* Transmit queues 8ee0 */
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};
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/*
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* Overlay structure for port specific queue "registers".
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* Starts at offset 0x8E00+(port*2).
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*/
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struct dcmpreg {
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u_char pad0; /* +00 */
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1994-05-23 09:58:16 +04:00
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vu_char r_head; /* +01 */
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1993-05-13 17:56:20 +04:00
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u_char pad1[7]; /* +02 */
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1994-05-23 09:58:16 +04:00
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vu_char r_tail; /* +09 */
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1993-05-13 17:56:20 +04:00
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u_char pad2[7]; /* +0A */
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1994-05-23 09:58:16 +04:00
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vu_char t_head; /* +11 */
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1993-05-13 17:56:20 +04:00
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u_char pad3[7]; /* +12 */
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1994-05-23 09:58:16 +04:00
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vu_char t_tail; /* +19 */
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1993-05-13 17:56:20 +04:00
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};
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#define dcm_preg(d, p) ((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2))
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/* interface reset/id */
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#define DCMCON 0x80 /* REMOTE/LOCAL switch, read */
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#define DCMID 0x5 /* hardwired card id, read */
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#define DCMRS 0x80 /* software reset, write */
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/* interrupt control */
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#define DCMIPL(x) ((((x) >> 4) & 3) + 3) /* interupt level, read */
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#define IC_IR 0x40 /* interupt request, read */
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#define IC_IE 0x80 /* interupt enable, write */
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#define IC_ID 0x00 /* interupt disable, write */
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/* Semaphore control */
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#define SEM_BSY 0x80 /* read */
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#define SEM_CLR 0xFF /* write */
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#define SEM_LOCK(dcm) while ((dcm)->dcm_sem & SEM_BSY)
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#define SEM_UNLOCK(dcm) (dcm)->dcm_sem = SEM_CLR
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/* command register */
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#define CR_PORT0 0x1
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#define CR_PORT1 0x2
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#define CR_PORT2 0x4
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#define CR_PORT3 0x8
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#define CR_MODM 0x10 /* change modem output lines */
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#define CR_TIMER 0x20 /* 16ms interrupt timer toggle */
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#define CR_SELFT 0x40 /* run self test */
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#define CR_MASK 0x7f
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/* interrupt ident register */
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#define IIR_PORT0 0x1
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#define IIR_PORT1 0x2
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#define IIR_PORT2 0x4
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#define IIR_PORT3 0x8
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#define IIR_SELFT 0x10 /* self test completed */
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#define IIR_MODM 0x20 /* change in modem input lines */
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#define IIR_TIMEO 0x40 /* Time out */
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#define IIR_MASK 0x7f
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/* self test cond reg */
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#define ST_OK 0xe0
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/* Line configuration register */
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#define LC_PNO 0x00
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#define LC_PODD 0x01
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#define LC_PEVEN 0x02
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#define LC_PMSK 0x03
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#define LC_1STOP 0x00
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#define LC_1HSTOP 0x04
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#define LC_2STOP 0x08
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#define LC_STOPMSK 0x0b
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#define LC_8BITS 0x30
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#define LC_7BITS 0x20
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#define LC_6BITS 0x10
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#define LC_5BITS 0x00
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#define LC_BITMSK 0x30
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/* baud reg */
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#define BR_0 0x00
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#define BR_50 0x01
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#define BR_75 0x02
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#define BR_110 0x03
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#define BR_134 0x04
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#define BR_150 0x05
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#define BR_300 0x06
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#define BR_600 0x07
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#define BR_900 0x08
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#define BR_1200 0x09
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#define BR_1800 0x0a
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#define BR_2400 0x0b
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#define BR_3600 0x0c
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#define BR_4800 0x0d
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#define BR_7200 0x0e
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#define BR_9600 0x0f
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#define BR_19200 0x10
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#define BR_38400 0x11
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/* modem input register */
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#define MI_CTS 0x08
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#define MI_DM 0x04
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#define MI_CD 0x02
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#define MI_RI 0x01
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/* modem output register */
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#define MO_SR 0x04
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#define MO_DTR 0x02
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#define MO_RTS 0x01
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#define MO_ON ((MO_DTR) | (MO_RTS))
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#define MO_OFF 0x00
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/* cmd-tab values, write */
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#define CT_CON 0x1 /* configuration change */
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#define CT_TX 0x2 /* transmit buffer not empty */
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#define CT_BRK 0x4 /* toggle BREAK */
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/* icr-tab values, read */
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#define IT_TX 0x1 /* transmit buffer empty */
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#define IT_SPEC 0x2 /* special character received */
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/* data errors */
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#define RD_OVF 0x08
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#define RD_BD 0x10
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#define RD_PE 0x20
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#define RD_OE 0x40
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#define RD_FE 0x80
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#define RD_MASK 0xf8
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/* Transmit/Receive masks */
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#define TX_MASK 0x0f
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#define RX_MASK 0xff
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/*
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1996-02-24 03:54:53 +03:00
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* DCM console caveat: only port 1 is affected by the remote switch, and
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* thus the only supported console port on a given DCM card.
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1993-05-13 17:56:20 +04:00
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*/
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1996-02-24 03:54:53 +03:00
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#define DCMCONSPORT 1
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