443 lines
12 KiB
C
443 lines
12 KiB
C
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/* netboot
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*
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* $Log: wd80x3.c,v $
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* Revision 1.1 1993/07/08 16:04:14 brezak
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* Diskless boot prom code from Jim McKim (mckim@lerc.nasa.gov)
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*
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* Revision 1.2 1993/06/08 14:35:17 mckim
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* *** empty log message ***
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*
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* Revision 1.1.1.1 1993/05/28 11:41:07 mckim
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* Initial version.
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*
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*
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* source in this file came from
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* the Mach ethernet boot written by Leendert van Doorn.
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*
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* A very simple network driver for WD80x3 boards that polls.
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*
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* Copyright (c) 1992 by Leendert van Doorn
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*/
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#include "proto.h"
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#include "assert.h"
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#include "packet.h"
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#include "ether.h"
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#include "dp8390.h"
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/* configurable parameters */
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#define WD_BASEREG 0x280 /* base register */
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/* the base address doesn't have to be particularly accurate - the
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board seems to pick up on addresses in the range a0000..effff.
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*/
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#define WD_BASEMEM 0xd0000 /* base ram */
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/* bit definitions for board features */
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#define INTERFACE_CHIP 01 /* has an WD83C583 interface chip */
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#define BOARD_16BIT 02 /* 16 bit board */
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#define SLOT_16BIT 04 /* 16 bit slot */
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/* register offset definitions */
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#define WD_MSR 0x00 /* control (w) and status (r) */
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#define WD_REG0 0x00 /* generic register definitions */
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#define WD_REG1 0x01
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#define WD_REG2 0x02
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#define WD_REG3 0x03
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#define WD_REG4 0x04
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#define WD_REG5 0x05
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#define WD_REG6 0x06
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#define WD_REG7 0x07
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#define WD_EA0 0x08 /* most significant addr byte */
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#define WD_EA1 0x09
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#define WD_EA2 0x0A
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#define WD_EA3 0x0B
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#define WD_EA4 0x0C
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#define WD_EA5 0x0D /* least significant addr byte */
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#define WD_LTB 0x0E /* LAN type byte */
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#define WD_CHKSUM 0x0F /* sum from WD_EA0 upto here is 0xFF */
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#define WD_DP8390 0x10 /* natsemi chip */
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/* bits in control register */
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#define WD_MSR_MEMMASK 0x3F /* memory enable bits mask */
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#define WD_MSR_MENABLE 0x40 /* memory enable */
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#define WD_MSR_RESET 0x80 /* software reset */
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/* bits in bus size register */
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#define WD_BSR_16BIT 0x01 /* 16 bit bus */
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/* bits in LA address register */
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#define WD_LAAR_A19 0x01 /* address lines for above 1Mb ram */
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#define WD_LAAR_LAN16E 0x40 /* enables 16bit shrd RAM for LAN */
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#define WD_LAAR_MEM16E 0x80 /* enables 16bit shrd RAM for host */
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u_char eth_myaddr[ETH_ADDRSIZE];
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static int boardid;
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static dpconf_t dpc;
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/*
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* Determine whether wd8003 hardware performs register aliasing
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* (i.e. whether it is an old WD8003E board).
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*/
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static int
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Aliasing(void) {
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if (inb(WD_BASEREG + WD_REG1) != inb(WD_BASEREG + WD_EA1))
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return 0;
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if (inb(WD_BASEREG + WD_REG2) != inb(WD_BASEREG + WD_EA2))
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return 0;
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if (inb(WD_BASEREG + WD_REG3) != inb(WD_BASEREG + WD_EA3))
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return 0;
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if (inb(WD_BASEREG + WD_REG4) != inb(WD_BASEREG + WD_EA4))
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return 0;
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if (inb(WD_BASEREG + WD_REG7) != inb(WD_BASEREG + WD_CHKSUM))
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return 0;
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return 1;
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}
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/*
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* This trick is stolen from the clarkson packet driver
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TBD - this is _ugly_ bogus! should use system timer
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*/
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static void
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LongPause(void) {
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short i;
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for (i = 1600; i > 0; i++)
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(void) inb(0x61);
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}
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/*
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* Determine whether this board has 16-bit capabilities
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*/
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static int
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BoardIs16Bit(void) {
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u_char bsreg = inb(WD_BASEREG + WD_REG1);
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outb(WD_BASEREG + WD_REG1, bsreg ^ WD_BSR_16BIT);
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LongPause();
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if (inb(WD_BASEREG + WD_REG1) == bsreg) {
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/*
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* Pure magic: LTB is 0x05 indicates that this is a WD8013EB board,
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* 0x27 indicates that this is an WD8013 Elite board, and 0x29
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* indicates an SMC Elite 16 board.
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*/
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u_char tlb = inb(WD_BASEREG + WD_LTB);
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return tlb == 0x05 || tlb == 0x27 || tlb == 0x29;
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}
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outb(WD_BASEREG + WD_REG1, bsreg);
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return 1;
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}
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/*
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* Determine whether the 16 bit capable board is plugged
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* into a 16 bit slot.
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*/
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static int
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SlotIs16Bit(void) {
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return inb(WD_BASEREG + WD_REG1) & WD_BSR_16BIT;
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}
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/*
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* Reset ethernet board after a timeout
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*/
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void
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EtherReset(void) {
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int dpreg = dpc.dc_reg;
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/* initialize the board */
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outb(WD_BASEREG + WD_MSR,
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WD_MSR_MENABLE | (((u_long)WD_BASEMEM >> 13) & WD_MSR_MEMMASK));
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/* reset dp8390 ethernet chip */
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outb(dpreg + DP_CR, CR_STP|CR_DM_ABORT);
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/* initialize first register set */
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outb(dpreg + DP_IMR, 0);
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outb(dpreg + DP_CR, CR_PS_P0|CR_STP|CR_DM_ABORT);
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outb(dpreg + DP_TPSR, dpc.dc_tpsr);
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outb(dpreg + DP_PSTART, dpc.dc_pstart);
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outb(dpreg + DP_PSTOP, dpc.dc_pstop);
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outb(dpreg + DP_BNRY, dpc.dc_pstart);
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outb(dpreg + DP_RCR, RCR_MON);
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outb(dpreg + DP_TCR, TCR_NORMAL|TCR_OFST);
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if (boardid & SLOT_16BIT)
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outb(dpreg + DP_DCR, DCR_WORDWIDE|DCR_8BYTES);
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else
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outb(dpreg + DP_DCR, DCR_BYTEWIDE|DCR_8BYTES);
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outb(dpreg + DP_RBCR0, 0);
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outb(dpreg + DP_RBCR1, 0);
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outb(dpreg + DP_ISR, 0xFF);
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/* initialize second register set */
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outb(dpreg + DP_CR, CR_PS_P1|CR_DM_ABORT);
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outb(dpreg + DP_PAR0, eth_myaddr[0]);
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outb(dpreg + DP_PAR1, eth_myaddr[1]);
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outb(dpreg + DP_PAR2, eth_myaddr[2]);
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outb(dpreg + DP_PAR3, eth_myaddr[3]);
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outb(dpreg + DP_PAR4, eth_myaddr[4]);
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outb(dpreg + DP_PAR5, eth_myaddr[5]);
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outb(dpreg + DP_CURR, dpc.dc_pstart+1);
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/* and back to first register set */
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outb(dpreg + DP_CR, CR_PS_P0|CR_DM_ABORT);
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outb(dpreg + DP_RCR, RCR_AB);
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/* flush counters */
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(void) inb(dpreg + DP_CNTR0);
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(void) inb(dpreg + DP_CNTR1);
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(void) inb(dpreg + DP_CNTR2);
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/* and go ... */
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outb(dpreg + DP_CR, CR_STA|CR_DM_ABORT);
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}
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/*
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* Initialize the WD80X3 board
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*/
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int
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EtherInit(void) {
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unsigned sum;
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int memsize;
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/* reset the ethernet card */
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outb(WD_BASEREG + WD_MSR, WD_MSR_RESET);
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LongPause();
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outb(WD_BASEREG + WD_MSR, 0);
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/* determine whether the controller is there */
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sum = inb(WD_BASEREG + WD_EA0) + inb(WD_BASEREG + WD_EA1) +
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inb(WD_BASEREG + WD_EA2) + inb(WD_BASEREG + WD_EA3) +
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inb(WD_BASEREG + WD_EA4) + inb(WD_BASEREG + WD_EA5) +
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inb(WD_BASEREG + WD_LTB) + inb(WD_BASEREG + WD_CHKSUM);
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if ((sum & 0xFF) != 0xFF)
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return 0;
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/*
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* Determine the type of board
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*/
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boardid = 0;
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if (!Aliasing()) {
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if (BoardIs16Bit()) {
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boardid |= BOARD_16BIT;
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if (SlotIs16Bit())
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boardid |= SLOT_16BIT;
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}
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}
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memsize = (boardid & BOARD_16BIT) ? 0x4000 : 0x2000; /* 16 or 8 Kb */
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/* special setup needed for WD8013 boards */
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if (boardid & SLOT_16BIT)
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outb(WD_BASEREG + WD_REG5, WD_LAAR_A19|WD_LAAR_LAN16E);
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/* get ethernet address */
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eth_myaddr[0] = inb(WD_BASEREG + WD_EA0);
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eth_myaddr[1] = inb(WD_BASEREG + WD_EA1);
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eth_myaddr[2] = inb(WD_BASEREG + WD_EA2);
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eth_myaddr[3] = inb(WD_BASEREG + WD_EA3);
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eth_myaddr[4] = inb(WD_BASEREG + WD_EA4);
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eth_myaddr[5] = inb(WD_BASEREG + WD_EA5);
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/* save settings for future use */
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dpc.dc_reg = WD_BASEREG + WD_DP8390;
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dpc.dc_mem = WD_BASEMEM;
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dpc.dc_tpsr = 0;
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dpc.dc_pstart = 6;
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dpc.dc_pstop = (memsize >> 8) & 0xFF;
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printf("Using wd80x3 board, port 0x%x, iomem 0x%x, iosiz %d\n", WD_BASEREG, WD_BASEMEM, memsize);
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EtherReset();
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return 1;
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}
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/*
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* Stop ethernet board
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*/
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void
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EtherStop(void) {
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/* stop dp8390, followed by a board reset */
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outb(dpc.dc_reg + DP_CR, CR_STP|CR_DM_ABORT);
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outb(WD_BASEREG + WD_MSR, WD_MSR_RESET);
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outb(WD_BASEREG + WD_MSR, 0);
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}
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/* TBD - all users must take care to use the current "data seg" value
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when moving data from/to the controller */
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static void
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WdCopy(u_long src, u_long dst, u_long count) {
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#if TRACE > 0
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printf("WdCopy from %x to %x for %d\n", src, dst, count);
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#endif
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assert(count <= 1514);
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if (boardid & SLOT_16BIT)
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outb(WD_BASEREG + WD_REG5,
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WD_LAAR_MEM16E|WD_LAAR_LAN16E|WD_LAAR_A19);
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PhysBcopy(src, dst, count);
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if (boardid & SLOT_16BIT)
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outb(WD_BASEREG + WD_REG5, WD_LAAR_LAN16E|WD_LAAR_A19);
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}
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/*
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* Send an ethernet packet to destination 'dest'
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*/
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void
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EtherSend(packet_t *pkt, u_short proto, u_char *dest) {
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ethhdr_t *ep;
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pkt->pkt_len += sizeof(ethhdr_t);
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pkt->pkt_offset -= sizeof(ethhdr_t);
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ep = (ethhdr_t *) pkt->pkt_offset;
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ep->eth_proto = htons(proto);
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bcopy(dest, ep->eth_dst, ETH_ADDRSIZE);
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bcopy(eth_myaddr, ep->eth_src, ETH_ADDRSIZE);
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#if 0
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DUMP_STRUCT("ethhdr_t", ep, sizeof(ethhdr_t));
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#endif
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if (pkt->pkt_len < 60)
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pkt->pkt_len = 60;
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#if TRACE > 0
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{
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int i;
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DUMP_STRUCT("EtherSend: pkt", pkt->pkt_offset, pkt->pkt_len);
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#if 0
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for(i=0; i<(pkt->pkt_len<MDUMP?pkt->pkt_len:MDUMP); i++) printe("%x ", *((u_char*)(pkt->pkt_offset)+i));
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printe("\n");
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#endif
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}
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#endif
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#if 0
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printe("EtherSend: WdCopy from %x to %x for %d\n", LA(pkt->pkt_offset), dpc.dc_mem + (dpc.dc_tpsr << 8), (u_long)pkt->pkt_len);
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#endif
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WdCopy(LA(pkt->pkt_offset),
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dpc.dc_mem + (dpc.dc_tpsr << 8), (u_long)pkt->pkt_len);
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outb(dpc.dc_reg + DP_TPSR, dpc.dc_tpsr);
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outb(dpc.dc_reg + DP_TBCR0, (pkt->pkt_len & 0xFF));
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outb(dpc.dc_reg + DP_TBCR1, (pkt->pkt_len >> 8) & 0xFF);
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outb(dpc.dc_reg + DP_CR, CR_TXP);
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#if 0
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printe("Ethersend: outb(%x, %x)\n", dpc.dc_reg + DP_TPSR, dpc.dc_tpsr);
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printe("Ethersend: outb(%x, %x)\n", dpc.dc_reg + DP_TBCR0, (pkt->pkt_len & 0xFF));
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printe("Ethersend: outb(%x, %x)\n", dpc.dc_reg + DP_TBCR1, (pkt->pkt_len >> 8) & 0xFF);
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printe("Ethersend: outb(%x, %x)\n", dpc.dc_reg + DP_CR, CR_TXP);
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#endif
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}
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/*
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* Copy dp8390 packet header for observation
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*/
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static void
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GetHeader(u_long haddr, dphdr_t *dph) {
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#if TRACE > 0
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printe("GetHeader: WdCopy from %x to %x for %d\n", haddr, LA(dph), sizeof(dphdr_t));
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#endif
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|
WdCopy(haddr, LA(dph), sizeof(dphdr_t));
|
||
|
|
#if 0
|
||
|
|
DUMP_STRUCT("GetHeader: dphdr_t", dph, sizeof(dphdr_t));
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Poll the dp8390 just see if there's an Ethernet packet
|
||
|
|
* available. If there is, its contents is returned in a
|
||
|
|
* pkt structure, otherwise a nil pointer is returned.
|
||
|
|
*/
|
||
|
|
packet_t *
|
||
|
|
EtherReceive(void) {
|
||
|
|
u_char pageno, curpage, nextpage;
|
||
|
|
int dpreg = dpc.dc_reg;
|
||
|
|
packet_t *pkt;
|
||
|
|
dphdr_t dph;
|
||
|
|
u_long addr;
|
||
|
|
|
||
|
|
pkt = (packet_t *)0;
|
||
|
|
if (inb(dpreg + DP_RSR) & RSR_PRX) {
|
||
|
|
/* get current page numbers */
|
||
|
|
pageno = inb(dpreg + DP_BNRY) + 1;
|
||
|
|
if (pageno == dpc.dc_pstop)
|
||
|
|
pageno = dpc.dc_pstart;
|
||
|
|
outb(dpreg + DP_CR, CR_PS_P1);
|
||
|
|
curpage = inb(dpreg + DP_CURR);
|
||
|
|
outb(dpreg + DP_CR, CR_PS_P0);
|
||
|
|
if (pageno == curpage)
|
||
|
|
return (packet_t *) 0;
|
||
|
|
|
||
|
|
/* get packet header */
|
||
|
|
addr = dpc.dc_mem + (pageno << 8);
|
||
|
|
GetHeader(addr, &dph);
|
||
|
|
nextpage = dph.dh_next;
|
||
|
|
|
||
|
|
/* allocate packet */
|
||
|
|
pkt = PktAlloc(0);
|
||
|
|
#if 0
|
||
|
|
printe("EtherReceive: allocated pkt %x\n", pkt);
|
||
|
|
#endif
|
||
|
|
pkt->pkt_len = ((dph.dh_rbch & 0xFF) << 8) | (dph.dh_rbcl & 0xFF);
|
||
|
|
pkt->pkt_len -= sizeof(dphdr_t);
|
||
|
|
if (pkt->pkt_len > 1514) /* bug in dp8390 */
|
||
|
|
pkt->pkt_len = 1514;
|
||
|
|
|
||
|
|
#if TRACE > 0
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
printe("EtherReceive %d bytes: ", pkt->pkt_len);
|
||
|
|
#if 0
|
||
|
|
for(i=0; i<(pkt->pkt_len<MDUMP?pkt->pkt_len:MDUMP); i++) printe("%x ", *((u_char*)pkt+i));
|
||
|
|
#else
|
||
|
|
DUMP_STRUCT("", pkt, pkt->pkt_len);
|
||
|
|
#endif
|
||
|
|
printe("\n");
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* The dp8390 maintains a circular buffer of pages (256 bytes)
|
||
|
|
* in which incomming ethernet packets are stored. The following
|
||
|
|
* if detects wrap arounds, and copies the ethernet packet to
|
||
|
|
* our local buffer in two chunks if necesarry.
|
||
|
|
*/
|
||
|
|
assert(pkt->pkt_offset);
|
||
|
|
assert(pkt->pkt_len <= (6 << 8));
|
||
|
|
if (nextpage < pageno && nextpage > dpc.dc_pstart) {
|
||
|
|
u_long nbytes = ((dpc.dc_pstop - pageno) << 8) - sizeof(dphdr_t);
|
||
|
|
|
||
|
|
assert(nbytes <= (6 << 8));
|
||
|
|
#if TRACE > 0
|
||
|
|
printe("EtherReceive1: WdCopy from %x to %x for %x\n", addr + sizeof(dphdr_t), LA(pkt->pkt_offset), nbytes);
|
||
|
|
#endif
|
||
|
|
WdCopy(addr + sizeof(dphdr_t),
|
||
|
|
LA(pkt->pkt_offset), nbytes);
|
||
|
|
if ((pkt->pkt_len - nbytes) > 0)
|
||
|
|
/* TBD - this OK? */
|
||
|
|
#if TRACE > 0
|
||
|
|
printe("EtherReceive2: WdCopy from %x to %x for %x\n",dpc.dc_mem + (dpc.dc_pstart << 8), LA(pkt->pkt_offset) + nbytes, pkt->pkt_len - nbytes);
|
||
|
|
#endif
|
||
|
|
WdCopy(dpc.dc_mem + (dpc.dc_pstart << 8),
|
||
|
|
LA(pkt->pkt_offset) + nbytes,
|
||
|
|
pkt->pkt_len - nbytes);
|
||
|
|
} else {
|
||
|
|
#if TRACE > 0
|
||
|
|
printe("EtherReceive3: WdCopy from %x to %x for %x\n", addr + sizeof(dphdr_t), LA(pkt->pkt_offset), (u_long)pkt->pkt_len);
|
||
|
|
#endif
|
||
|
|
WdCopy(addr + sizeof(dphdr_t),
|
||
|
|
LA(pkt->pkt_offset), (u_long)pkt->pkt_len);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* release occupied pages */
|
||
|
|
if (nextpage == dpc.dc_pstart)
|
||
|
|
nextpage = dpc.dc_pstop;
|
||
|
|
outb(dpreg + DP_BNRY, nextpage - 1);
|
||
|
|
}
|
||
|
|
|
||
|
|
return pkt;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Print an ethernet address in human readable form
|
||
|
|
*/
|
||
|
|
void
|
||
|
|
EtherPrintAddr(u_char *addr) {
|
||
|
|
printf("%x:%x:%x:%x:%x:%x",
|
||
|
|
addr[0] & 0xFF, addr[1] & 0xFF, addr[2] & 0xFF,
|
||
|
|
addr[3] & 0xFF, addr[4] & 0xFF, addr[5] & 0xFF);
|
||
|
|
}
|