2019-03-17 04:47:57 +03:00
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/* $NetBSD: ssdfb_i2c.c,v 1.2 2019/03/17 01:47:57 tnn Exp $ */
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2019-03-17 04:03:47 +03:00
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/*
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* Copyright (c) 2019 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Tobias Nygren.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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2019-03-17 04:47:57 +03:00
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__KERNEL_RCSID(0, "$NetBSD: ssdfb_i2c.c,v 1.2 2019/03/17 01:47:57 tnn Exp $");
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2019-03-17 04:03:47 +03:00
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#include <sys/param.h>
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#include <sys/device.h>
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#include <dev/wscons/wsdisplayvar.h>
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#include <dev/rasops/rasops.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/ic/ssdfbvar.h>
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struct ssdfb_i2c_softc {
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struct ssdfb_softc sc;
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i2c_tag_t sc_i2c_tag;
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i2c_addr_t sc_i2c_addr;
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};
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static int ssdfb_i2c_match(device_t, cfdata_t, void *);
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static void ssdfb_i2c_attach(device_t, device_t, void *);
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static int ssdfb_i2c_detach(device_t, int);
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static int ssdfb_i2c_cmd(void *, uint8_t *, size_t, bool);
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static int ssdfb_i2c_transfer_rect(void *, uint8_t, uint8_t, uint8_t,
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uint8_t, uint8_t *, size_t, bool);
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static int ssdfb_i2c_transfer_rect_ssd1306(void *, uint8_t, uint8_t,
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uint8_t, uint8_t, uint8_t *, size_t, bool);
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static int ssdfb_i2c_transfer_rect_sh1106(void *, uint8_t, uint8_t,
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uint8_t, uint8_t, uint8_t *, size_t, bool);
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static int ssdfb_smbus_transfer_rect(void *, uint8_t, uint8_t, uint8_t,
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uint8_t, uint8_t *, size_t, bool);
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CFATTACH_DECL_NEW(ssdfb_iic, sizeof(struct ssdfb_i2c_softc),
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ssdfb_i2c_match, ssdfb_i2c_attach, ssdfb_i2c_detach, NULL);
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static const struct device_compatible_entry compat_data[] = {
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{ "solomon,ssd1306fb-i2c", 0 },
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{ "sino,sh1106fb-i2c", 0 },
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{ NULL, 0 }
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};
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static int
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ssdfb_i2c_match(device_t parent, cfdata_t match, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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int match_result;
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if (iic_use_direct_match(ia, match, compat_data, &match_result))
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return match_result;
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switch (ia->ia_addr) {
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case SSDFB_I2C_DEFAULT_ADDR:
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case SSDFB_I2C_ALTERNATIVE_ADDR:
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return I2C_MATCH_ADDRESS_ONLY;
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}
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return 0;
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}
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static void
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ssdfb_i2c_attach(device_t parent, device_t self, void *aux)
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{
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struct ssdfb_i2c_softc *sc = device_private(self);
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struct cfdata *cf = device_cfdata(self);
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struct i2c_attach_args *ia = aux;
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int flags = cf->cf_flags;
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int i;
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if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN) {
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for (i = 0; i < ia->ia_ncompat; i++) {
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if (strncmp("solomon,ssd1306", ia->ia_compat[i], 15)
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== 0) {
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flags |= SSDFB_PRODUCT_SSD1306_GENERIC;
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break;
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}
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else if (strncmp("sino,sh1106", ia->ia_compat[i], 11)
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== 0) {
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flags |= SSDFB_PRODUCT_SH1106_GENERIC;
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break;
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}
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}
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}
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if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN)
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flags |= SSDFB_PRODUCT_SSD1306_GENERIC;
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sc->sc.sc_dev = self;
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sc->sc_i2c_tag = ia->ia_tag;
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sc->sc_i2c_addr = ia->ia_addr;
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sc->sc.sc_cookie = (void *)sc;
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sc->sc.sc_cmd = ssdfb_i2c_cmd;
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sc->sc.sc_transfer_rect = ssdfb_i2c_transfer_rect;
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ssdfb_attach(&sc->sc, flags);
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}
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static int
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ssdfb_i2c_detach(device_t self, int flags)
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{
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struct ssdfb_i2c_softc *sc = device_private(self);
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return ssdfb_detach(&sc->sc);
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}
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static int
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ssdfb_i2c_cmd(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
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{
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struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
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int flags = usepoll ? I2C_F_POLL : 0;
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uint8_t cb = 0;
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int error;
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error = iic_acquire_bus(sc->sc_i2c_tag, flags);
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if (error)
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return error;
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error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_i2c_addr, &cb, sizeof(cb), cmd, len, flags);
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(void) iic_release_bus(sc->sc_i2c_tag, flags);
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return error;
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}
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static int
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ssdfb_i2c_transfer_rect(void *cookie, uint8_t fromcol, uint8_t tocol,
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uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
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{
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struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
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int flags = usepoll ? I2C_F_POLL : 0;
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uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
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2019-03-17 04:47:57 +03:00
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uint8_t data[] = {0, 0, 0};
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2019-03-17 04:03:47 +03:00
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uint8_t cmd[2];
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int error;
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/*
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* Test if large transfers are supported by the parent i2c bus and
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* pick the fastest transfer routine for subsequent invocations.
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*/
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switch (sc->sc.sc_p->p_controller_id) {
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case SSDFB_CONTROLLER_SSD1306:
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sc->sc.sc_transfer_rect = ssdfb_i2c_transfer_rect_ssd1306;
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break;
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case SSDFB_CONTROLLER_SH1106:
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sc->sc.sc_transfer_rect = ssdfb_i2c_transfer_rect_sh1106;
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break;
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default:
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sc->sc.sc_transfer_rect = ssdfb_smbus_transfer_rect;
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break;
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}
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if (sc->sc.sc_transfer_rect != ssdfb_smbus_transfer_rect) {
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error = iic_acquire_bus(sc->sc_i2c_tag, flags);
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if (error)
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return error;
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error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_i2c_addr, &cb, sizeof(cb), data, sizeof(data), flags);
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(void) iic_release_bus(sc->sc_i2c_tag, flags);
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if (error) {
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sc->sc.sc_transfer_rect = ssdfb_smbus_transfer_rect;
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}
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}
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/*
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* Set addressing mode for SSD1306.
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*/
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if (sc->sc.sc_p->p_controller_id == SSDFB_CONTROLLER_SSD1306) {
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cmd[0] = SSD1306_CMD_SET_MEMORY_ADDRESSING_MODE;
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cmd[1] = sc->sc.sc_transfer_rect
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== ssdfb_i2c_transfer_rect_ssd1306
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? SSD1306_MEMORY_ADDRESSING_MODE_HORIZONTAL
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: SSD1306_MEMORY_ADDRESSING_MODE_PAGE;
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error = ssdfb_i2c_cmd(cookie, cmd, sizeof(cmd), usepoll);
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if (error)
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return error;
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}
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return sc->sc.sc_transfer_rect(cookie, fromcol, tocol, frompage, topage,
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p, stride, usepoll);
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}
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static int
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ssdfb_i2c_transfer_rect_ssd1306(void *cookie, uint8_t fromcol, uint8_t tocol,
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uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
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{
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struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
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int flags = usepoll ? I2C_F_POLL : 0;
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uint8_t cc = 0;
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uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
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size_t len = (tocol + 1 - fromcol);
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int error;
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/*
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* SSD1306 does not implement the Continuation bit correctly.
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* The SH1106 protocol defines that a control byte WITH Co
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* set must be inserted between each command. But SSD1306
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* fails to parse the commands if we do that.
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*/
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uint8_t cmds[] = {
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SSD1306_CMD_SET_COLUMN_ADDRESS,
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fromcol, tocol,
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SSD1306_CMD_SET_PAGE_ADDRESS,
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frompage, topage
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};
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error = iic_acquire_bus(sc->sc_i2c_tag, flags);
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if (error)
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return error;
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error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_i2c_addr, &cc, sizeof(cc), cmds, sizeof(cmds), flags);
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if (error)
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goto out;
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while (frompage <= topage) {
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error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_i2c_addr, &cb, sizeof(cb), p, len, flags);
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if (error)
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goto out;
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frompage++;
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p += stride;
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}
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out:
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(void) iic_release_bus(sc->sc_i2c_tag, flags);
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return error;
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}
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static int
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ssdfb_i2c_transfer_rect_sh1106(void *cookie, uint8_t fromcol, uint8_t tocol,
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uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
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{
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struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
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int flags = usepoll ? I2C_F_POLL : 0;
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uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
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uint8_t cc = SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK;
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size_t len = (tocol + 1 - fromcol);
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int error;
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uint8_t cmds[] = {
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SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage,
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SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK,
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SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE + (fromcol >> 4),
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SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK,
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SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE + (fromcol & 0xf)
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};
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error = iic_acquire_bus(sc->sc_i2c_tag, flags);
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if (error)
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return error;
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while (frompage <= topage) {
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cmds[0] = SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage;
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error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_i2c_addr, &cc, sizeof(cc), cmds, sizeof(cmds), flags);
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if (error)
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goto out;
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error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_i2c_addr, &cb, sizeof(cb), p, len, flags);
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if (error)
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goto out;
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frompage++;
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p += stride;
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}
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out:
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(void) iic_release_bus(sc->sc_i2c_tag, flags);
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return error;
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}
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/*
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* If the parent is an SMBus, then we can only send 2 bytes
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* of payload per txn. The SSD1306 triple byte commands are
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* not available so we have to use PAGE addressing mode
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* and split data into multiple txns.
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* This is ugly and slow but it's the best we can do.
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*/
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static int
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ssdfb_smbus_transfer_rect(void *cookie, uint8_t fromcol, uint8_t tocol,
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uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
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{
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struct ssdfb_i2c_softc *sc = (struct ssdfb_i2c_softc *)cookie;
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int flags = usepoll ? I2C_F_POLL : 0;
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uint8_t cb = SSDFB_I2C_CTRL_BYTE_DATA_MASK;
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uint8_t cc = 0;
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size_t len = (tocol + 1 - fromcol);
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uint8_t cmd_higher_col =
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SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE + (fromcol >> 4);
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uint8_t cmd_lower_col =
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SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE + (fromcol & 0xf);
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uint8_t cmd_page;
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uint8_t data[2];
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uint8_t *colp;
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uint8_t *endp;
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int error;
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error = iic_acquire_bus(sc->sc_i2c_tag, flags);
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if (error)
|
|
|
|
return error;
|
|
|
|
while (frompage <= topage) {
|
|
|
|
error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
|
|
|
|
sc->sc_i2c_addr, &cc, sizeof(cc),
|
|
|
|
&cmd_higher_col, sizeof(cmd_higher_col), flags);
|
|
|
|
if (error)
|
|
|
|
goto out;
|
|
|
|
error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
|
|
|
|
sc->sc_i2c_addr, &cc, sizeof(cc),
|
|
|
|
&cmd_lower_col, sizeof(cmd_lower_col), flags);
|
|
|
|
if (error)
|
|
|
|
goto out;
|
|
|
|
cmd_page = SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage;
|
|
|
|
error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
|
|
|
|
sc->sc_i2c_addr, &cc, sizeof(cc),
|
|
|
|
&cmd_page, sizeof(cmd_page), flags);
|
|
|
|
if (error)
|
|
|
|
goto out;
|
|
|
|
colp = p;
|
|
|
|
endp = colp + len;
|
|
|
|
if (len & 1) {
|
|
|
|
data[0] = *colp++;
|
|
|
|
error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
|
|
|
|
sc->sc_i2c_addr, &cb, sizeof(cb), data, 1, flags);
|
|
|
|
if (error)
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
while (colp < endp) {
|
|
|
|
/*
|
|
|
|
* Send two bytes at a time. We can't use colp directly
|
|
|
|
* because i2c controllers sometimes have data alignment
|
|
|
|
* requirements.
|
|
|
|
*/
|
|
|
|
data[0] = *colp++;
|
|
|
|
data[1] = *colp++;
|
|
|
|
error = iic_exec(sc->sc_i2c_tag, I2C_OP_WRITE_WITH_STOP,
|
|
|
|
sc->sc_i2c_addr, &cb, sizeof(cb), data, 2, flags);
|
|
|
|
if (error)
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
frompage++;
|
|
|
|
p += stride;
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
(void) iic_release_bus(sc->sc_i2c_tag, flags);
|
|
|
|
return error;
|
|
|
|
}
|