425 lines
21 KiB
C
425 lines
21 KiB
C
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/* $NetBSD: xdreg.h,v 1.1 1997/11/01 22:56:26 pk Exp $ */
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/*
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*
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* Copyright (c) 1995 Charles D. Cranor
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles D. Cranor.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* x d r e g . h
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*
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* this file contains the description of the Xylogics 753/7053's hardware
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* data structures.
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*
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* author: Chuck Cranor <chuck@ccrc.wustl.edu>
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*/
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#define XDC_MAXDEV 4 /* max devices per controller */
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#define XDC_RESETUSEC 1000000 /* max time for xdc reset (page 21 says 1sec) */
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#define XDC_MAXIOPB 31 /* max number of iopbs that can be active */
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#define XDC_MAXTIME 4*1000000 /* four seconds before we give up and reset */
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#define XDC_MAXTRIES 4 /* max number of times to retry an operation */
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#define XDC_THROTTLE 32 /* dma throttle */
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#define XDC_INTERLEAVE 0 /* interleave (for format param) */
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#define XDC_DPARAM 0 /* dparam (drive param) XDDP_EC32 or 0 */
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/*
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* xdc device interface
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* (lives in VME address space)
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*/
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struct xdc {
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volatile u_char filler0;
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volatile u_char xdc_iopbaddr0; /* iopb byte 0 (LSB) */
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volatile u_char filler1;
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volatile u_char xdc_iopbaddr1; /* iopb byte 1 */
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volatile u_char filler2;
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volatile u_char xdc_iopbaddr2; /* iopb byte 2 */
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volatile u_char filler3;
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volatile u_char xdc_iopbaddr3; /* iopb byte 3 (MSB) */
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volatile u_char filler4;
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volatile u_char xdc_iopbamod; /* iopb address modifier */
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volatile u_char filler5;
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volatile u_char xdc_csr; /* control and status register */
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volatile u_char filler6;
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volatile u_char xdc_f_err; /* fatal error register */
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};
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/*
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* xdc_iopbamod: addressing modes
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* When doing DMA, if the maximum address of the buffer is greater than
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* 24 bits then you must use the 32 bit mode. Note that on many systems
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* (e.g. sun-4/300) DVMA space is smaller than 24 bits, so there is no
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* need for the 32 bit mode. However, the 32-bit mode hooks are in
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* the driver in case it ever gets ported to an environment that needs it.
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*/
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#define XDC_ADDRMOD 0x3d /* standard address modifer, 24 bit max */
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#define XDC_ADDRMOD32 0x0d /* 32 bit version above */
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/*
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* xdc_csr
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*/
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#define XDC_RMAINTMD 0x80 /* reserved maintenance mode (write) */
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#define XDC_BUSY 0x80 /* busy (read) */
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#define XDC_F_ERROR 0x40 /* fatal error (read) */
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#define XDC_MAINTMOD 0x20 /* maintenance mode (read/write) */
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#define XDC_RESET 0x08 /* soft reset (read/write) */
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#define XDC_ADDIOPB 0x04 /* add iopb/add pending (write) */
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#define XDC_ADDING 0x04 /* iopb add is pending (read) */
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#define XDC_CLRRIO 0x02 /* clear RIO (remove iopb) request (write) */
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#define XDC_REMIOPB 0x02 /* remove iopb (read) */
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#define XDC_RBUSYSEM 0x01 /* register busy semaphore (read/write) */
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/*
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* Input/Output Parameter Block (iopb)
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*
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* all controller commands are done via iopb's. to start a command you
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* must do this:
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* [1] allocate space in DVMA space for the iopb
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* [2] fill out all the fields of the iopb
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* [3] check to see if controller can accept an iopb (XDC_ADDING bit clear)
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* [4] put the DVMA address of the iopb in the xdc registers (in vme space)
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* [5] set the XDC_ADDIOPB bit in the xdc csr
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* [6] <command started>
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*
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* when the controller is done with a command it may interrupt (if you
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* ask it to) and it will set the XDC_REMIOPB bit in the csr. the address
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* of the finished iopb will be in the xdc registers. after that is
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* read, set the XDC_CLRRIO to clear the iopb out of memory.
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*
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* the format of the iopb is described in section 4 of the manual.
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*/
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struct xd_iopb {
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/* section 4.1.1: byte 0 */
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volatile u_char errs:1; /* error summary bit, only valid if
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"done" is set. must clear "done"
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and "errs" bits before starting an
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operation */
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volatile u_char done:1; /* "done" bit */
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volatile u_char chen:1; /* chain enable, "next iopb" is valid,
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note xd returns one iopb at a time */
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volatile u_char sgm:1; /* scatter/gather mode */
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volatile u_char comm:4; /* command number (see table 4-2) */
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#define XDCMD_NOP 0x0 /* no-op */
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#define XDCMD_WR 0x1 /* write */
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#define XDCMD_RD 0x2 /* read */
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#define XDCMD_SK 0x3 /* seek */
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#define XDCMD_RST 0x4 /* drive reset */
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#define XDCMD_WRP 0x5 /* write params */
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#define XDCMD_RDP 0x6 /* read params */
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#define XDCMD_XWR 0x7 /* extended write */
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#define XDCMD_XRD 0x8 /* extended read */
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#define XDCMD_TST 0x9 /* diagnostic tests */
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/* 0xa to 0xf are reserved */
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/* section 4.1.2: byte 1 */
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volatile u_char errno; /* status byte 1 (non-zero if error) */
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/* section 4.1.3: byte 2 */
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volatile u_char status; /* status byte 2 (see below) */
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#define XDST_SR 0x40 /* slipped revolution */
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#define XDST_CSE 0x20 /* count sectors executed */
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#define XDST_WRPT 0x10 /* write protected drive */
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#define XDST_DFLT 0x08 /* disk fault */
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#define XDST_SKER 0x04 /* seek error: >max, or timeout */
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#define XDST_ONCL 0x02 /* on-cylinder */
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#define XDST_DRDY 0x01 /* drive is ready! */
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/* section 4.1.4: byte 3 */
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volatile u_char istat; /* internal status: reserved for xylogics */
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/* section 4.1.5: byte 4 */
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volatile u_char subfun; /* sub-function of command (see below) */
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#define XDFUN_R 0x00 /* XDCMD_SK: report current addr */
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#define XDFUN_SR 0x01 /* XDCMD_SK: seek and report addr */
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#define XDFUN_SRI 0x02 /* XDCMD_SK: start seek, report comp imm */
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#define XDFUN_CTL 0x00 /* XDCMD_{WRP,RDP}: controller params */
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#define XDFUN_DRV 0x80 /* XDCMD_{WRP,RDP}: drive params */
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#define XDFUN_FMT 0x81 /* XDCMD_{WRP,RDP}: format params,XWR form.*/
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#define XDFUN_STX 0xa0 /* XDCMD_RDP: read drive status extended */
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#define XDFUN_THD 0x80 /* XDCMD_{XWR,XRD}: track headers */
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#define XDFUN_VFY 0x81 /* XDCMD_XRD: verify data */
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#define XDFUN_HDR 0x82 /* XDCMD_{XWR,XRD}: header, verify,data, ecc*/
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#define XDFUN_DM 0xa0 /* XDCMD_{XWR,XRD}: defect map */
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#define XDFUN_DMX 0xa1 /* XDCMD_{XWR,XRD}: defect map extended */
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/* section 4.1.6: byte 5 */
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volatile u_char fixd:1; /* fixed media (vs removeable) */
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volatile u_char reserved1:4; /* reserved */
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volatile u_char unit:3; /* unit number */
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/* note: 6 to 13 are overloaded (see below) */
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/* section 4.1.7: byte 6 */
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volatile u_char lll:5; /* linked list length */
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volatile u_char intl:3; /* interrupt level */
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/* section 4.1.8: byte 7 */
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volatile u_char intr_vec; /* interrupt vector */
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/* section 4.1.9: bytes 8 and 9 */
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volatile u_short sectcnt; /* sector count (# to xfer) */
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/* section 4.1.10: byte a and b */
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volatile u_short cylno; /* cylinder number */
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/* section 4.1.11: byte c */
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volatile u_char headno; /* head number */
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/* section 4.1.12: byte d */
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volatile u_char sectno; /* sector number */
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/* section 4.1.13: byte e */
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volatile u_char addrmod; /* addr modifier (bits 7,6 must be zero) */
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/* section 4.1.14: byte f */
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volatile u_char naddrmod; /* next (in chain) address iobp ad. modifer */
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/* section 4.1.15: bytes 0x10 to 0x13 */
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volatile u_long daddr; /* DMA data address */
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/* section 4.1.16: bytes 0x14 to 0x17 */
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volatile u_long nextiopb; /* next iopb (in chain) address */
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/* section 4.1.17: bytes 0x18, 0x19 */
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volatile u_short cksum; /* iopb checksum */
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/* section 4.1.18: bytes 0x1a, 0x1b */
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volatile u_short eccpattern; /* ECC pattern word (ecc mode 0) */
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/* section 4.1.19: bytes 0x1c, 0x1d */
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volatile u_short eccoffword; /* ECC offset word (ecc mode 0) */
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};
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/*
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* some commands overload bytes 6 to 0x13 of the iopb with different meanings.
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* these commands include:
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* section 4.2: controller parameters
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* section 4.3: drive parameters
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* sectino 4.4: format parameters
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*
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* note that the commands that overload the iopb are not part of the
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* "critical data path" of the driver. so, we handle them by defining
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* alternate iopb structures for these commands... it only costs us an
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* extra pointer.
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*/
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/*
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* controller parameters iopb: redefines bytes: 8 -> 0xe, 0x10 -> 0x13
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*/
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struct xd_iopb_ctrl {
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volatile u_char same[8]; /* same as xd_iopb */
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/* section 4.2.1: byte 8 */
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volatile u_char param_a; /* param A (see below) */
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#define XDPA_AUD 0x80 /* auto-update iopb fields when cmd done */
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#define XDPA_TMOD 0x40 /* long-word transfer mode (vs word) */
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#define XDPA_DACF 0x20 /* ignore vme ACFAIL signal */
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#define XDPA_ICS 0x10 /* checksum check (adds 100usec per xfer) */
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#define XDPA_EDT 0x08 /* enable on-board DMA timeout timer */
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#define XDPA_NPRM 0x04 /* enable VME non-priv request mode */
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/* rest must be zero */
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/* section 4.2.2: byte 9 */
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volatile u_char param_b; /* param B (see below) */
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#define XDPB_TDT 0xc0 /* throttle dead time (see 8.11, below) */
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#define XDPB_ROR 0x10 /* release on request */
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#define XDPB_DRA 0x01 /* disable read ahead */
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/* TDT values: */
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#define XDPB_TDT_0USEC 0x00 /* no TDT */
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#define XDPB_TDT_3_2USEC 0x40 /* 3.2 usec */
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#define XDPB_TDT_6_4USEC 0x80 /* 6.4 usec */
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#define XDPB_TDT_12_8USEC 0xc0 /* 12.8 usec */
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/* section 4.2.3: byte a */
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volatile u_char param_c; /* param C (see below) */
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#define XDPC_OVS 0x80 /* over-lapped seek */
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#define XDPC_COP 0x40 /* command optimiziation (elevator alg.) */
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#define XDPC_ASR 0x10 /* auto-seek retry */
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#define XDPC_RBC 0x04 /* retry before correction if ECC error */
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#define XDPC_ECCM 0x03 /* ECC mode (0, 1, and 2) */
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#define XDPC_ECC0 0x00 /* ECC mode 0 */
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#define XDPC_ECC1 0x01 /* ECC mode 1 */
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#define XDPC_ECC2 0x02 /* ECC mode 2 */
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/* section 4.2.4: byte b */
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volatile u_char throttle; /* max dma xfers per master (0==256) */
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/* section 4.2.5: byte c */
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volatile u_char eprom_lvl; /* EPROM release level */
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volatile u_char delay; /* delay (see note below) */
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/* section 4.2.6: byte e */
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volatile u_char ctype; /* controller type */
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#define XDCT_753 0x53 /* xylogic 753/7053 */
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volatile u_char same2; /* byte f: same as xd_iopb */
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/* section 4.2.7: byte 0x10, 0x11 */
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volatile u_short eprom_partno; /* eprom part number */
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/* section 4.2.8: byte 12 */
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volatile u_char eprom_rev; /* eprom revision number */
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};
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/*
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* Note on byte 0xd ("delay"): This byte is not documented in the
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* Xylogics manual. However, I contacted Xylogics and found out what
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* it does. The controller sorts read commands into groups of
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* contiguous sectors. After it processes a group of contiguous
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* sectors rather than immediately going on to the next group of
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* contiguous sectors, the controller can delay for a certain amount
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* of time in hopes of getting another cluster of reads in the same
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* area of the disk (thus avoiding a long seek). Byte 0xd controls
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* how long it waits before giving up and going on and doing the next
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* contiguous cluster.
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*
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* it is unclear what unit the delay is in, but it looks like sun
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* uses the value "20" for sun3's, and "0" for sparc, except for the
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* 4/300 (where it is "4"). [see /sys/sundev/xd_conf.c on any 4.1.3
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* machine for how sun configures its controller...]
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*/
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#define XDC_DELAY_SUN3 20
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#define XDC_DELAY_4_300 4
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#define XDC_DELAY_SPARC 0
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/*
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* drive parameters iopb: redefines bytes: 6, 8, 9, a, b, c, d, e
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*/
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struct xd_iopb_drive {
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volatile u_char same[6]; /* same as xd_iopb */
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/* section 4.3.1: byte 6 */
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volatile u_char dparam_ipl; /* drive params | interrupt level */
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#define XDDP_EC32 0x10 /* 32 bit ECC mode */
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volatile u_char same1; /* byte 7: same */
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/* section 4.3.2: byte 8 */
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volatile u_char maxsect; /* max sector/last head (<= byte d) */
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/* section 4.3.3: byte 9 */
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volatile u_char headoff; /* head offset */
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/* section 4.3.4: bytes 0xa, 0xb */
|
||
|
|
volatile u_short maxcyl; /* max cyl (zero based!) */
|
||
|
|
/* section 4.3.5: byte 0xc */
|
||
|
|
volatile u_char maxhead; /* max head (zero based!) */
|
||
|
|
/* section 4.3.6: byte 0xd */
|
||
|
|
volatile u_char maxsector; /* max sector of disk (zero based!) */
|
||
|
|
/* section 4.3.7: byte 0xe */
|
||
|
|
volatile u_char sectpertrk; /* sectors per track, not zero base, no runt*/
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* format parameters iopb: redefines bytes: 6, 8, 9, a, b, c, d, 0x10, 0x11
|
||
|
|
*/
|
||
|
|
|
||
|
|
struct xd_iopb_format {
|
||
|
|
volatile u_char same[6]; /* smae as xd_iopb */
|
||
|
|
/* section 4.4.1: byte 6 */
|
||
|
|
volatile u_char interleave_ipl;/* (interleave << 4) | interupt level */
|
||
|
|
/* interleave ratio 1:1 to 16:1 */
|
||
|
|
volatile u_char same1; /* byte 7: same */
|
||
|
|
/* section 4.4.2: byte 8 */
|
||
|
|
volatile u_char field1; /* >= 1, xylogic says should be 1 */
|
||
|
|
#define XDFM_FIELD1 0x01 /* xylogic value */
|
||
|
|
/* section 4.4.3: byte 9 */
|
||
|
|
volatile u_char field2; /* >0, field1+field2 <= 255 */
|
||
|
|
#define XDFM_FIELD2 0x0a /* xylogic value */
|
||
|
|
/* section 4.4.4: byte a */
|
||
|
|
volatile u_char field3; /* >= field1+field2 */
|
||
|
|
#define XDFM_FIELD3 0x1b /* xylogic value */
|
||
|
|
/* section 4.4.5: byte b */
|
||
|
|
volatile u_char field4; /* field4 */
|
||
|
|
#define XDFM_FIELD4 0x14 /* xylogic value */
|
||
|
|
/* section 4.4.6: bytes 0xc, 0xd */
|
||
|
|
volatile u_short bytespersec; /* bytes per sector */
|
||
|
|
#define XDFM_BPS 0x200 /* must be 512! */
|
||
|
|
volatile u_char same2[2]; /* bytes e, f */
|
||
|
|
/* section 4.4.7: byte 0x10 */
|
||
|
|
volatile u_char field6; /* field 6 */
|
||
|
|
#define XDFM_FIELD6 0x0a /* xylogic value */
|
||
|
|
/* section 4.4.8: byte 0x11 */
|
||
|
|
volatile u_char field7; /* field 7, >= 1 */
|
||
|
|
#define XDFM_FIELD7 0x03 /* xylogic value */
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* errors: errors come from either the fatal error register or the
|
||
|
|
* iopb
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define XD_ERA_MASK 0xf0 /* error action mask */
|
||
|
|
#define XD_ERA_PROG 0x10 /* program error */
|
||
|
|
#define XD_ERA_PRG2 0x20 /* program error */
|
||
|
|
#define XD_ERA_SOFT 0x30 /* soft error: we recovered */
|
||
|
|
#define XD_ERA_HARD 0x40 /* hard error: retry */
|
||
|
|
#define XD_ERA_RSET 0x60 /* hard error: reset, then retry */
|
||
|
|
#define XD_ERA_WPRO 0x90 /* write protected */
|
||
|
|
|
||
|
|
/* software error codes */
|
||
|
|
#define XD_ERR_FAIL 0xff /* general total failure */
|
||
|
|
/* no error */
|
||
|
|
#define XD_ERR_AOK 0x00 /* success */
|
||
|
|
/* non-retryable programming error */
|
||
|
|
#define XD_ERR_ICYL 0x10 /* illegal cyl */
|
||
|
|
#define XD_ERR_IHD 0x11 /* illegal head */
|
||
|
|
#define XD_ERR_ISEC 0x12 /* illegal sector */
|
||
|
|
#define XD_ERR_CZER 0x13 /* count zero */
|
||
|
|
#define XD_ERR_UIMP 0x14 /* unknown command */
|
||
|
|
#define XD_ERR_IF1 0x15 /* illegal field 1 */
|
||
|
|
#define XD_ERR_IF2 0x16 /* illegal field 2 */
|
||
|
|
#define XD_ERR_IF3 0x17 /* illegal field 3 */
|
||
|
|
#define XD_ERR_IF4 0x18 /* illegal field 4 */
|
||
|
|
#define XD_ERR_IF5 0x19 /* illegal field 5 */
|
||
|
|
#define XD_ERR_IF6 0x1a /* illegal field 6 */
|
||
|
|
#define XD_ERR_IF7 0x1b /* illegal field 7 */
|
||
|
|
#define XD_ERR_ISG 0x1c /* illegal scatter/gather */
|
||
|
|
#define XD_ERR_ISPT 0x1d /* not enough sectors per track */
|
||
|
|
#define XD_ERR_ALGN 0x1e /* next iopb allignment error */
|
||
|
|
#define XD_ERR_SGAL 0x1f /* scatter gather address alignment error */
|
||
|
|
#define XD_ERR_SGEC 0x20 /* scatter gather with auto ECC */
|
||
|
|
/* successfully recovered soft errors */
|
||
|
|
#define XD_ERR_SECC 0x30 /* soft ecc corrected */
|
||
|
|
#define XD_ERR_SIGN 0x31 /* ecc ignored */
|
||
|
|
#define XD_ERR_ASEK 0x32 /* auto-seek retry recovered */
|
||
|
|
#define XD_ERR_RTRY 0x33 /* soft retry recovered */
|
||
|
|
/* hard errors: please retry */
|
||
|
|
#define XD_ERR_HECC 0x40 /* hard data ECC */
|
||
|
|
#define XD_ERR_NHDR 0x41 /* header not found */
|
||
|
|
#define XD_ERR_NRDY 0x42 /* drive not ready */
|
||
|
|
#define XD_ERR_TOUT 0x43 /* timeout */
|
||
|
|
#define XD_ERR_VTIM 0x44 /* VME DMA timeout */
|
||
|
|
#define XD_ERR_DSEQ 0x45 /* disk sequencer error */
|
||
|
|
#define XD_ERR_HDEC 0x48 /* header ECC error */
|
||
|
|
#define XD_ERR_RVFY 0x49 /* ready verify */
|
||
|
|
#define XD_ERR_VFER 0x4a /* fatal VME DMA error */
|
||
|
|
#define XD_ERR_VBUS 0x4b /* VME bus error */
|
||
|
|
/* hard error: reset and retry */
|
||
|
|
#define XD_ERR_DFLT 0x60 /* drive fault */
|
||
|
|
#define XD_ERR_HECY 0x61 /* header error/cyl */
|
||
|
|
#define XD_ERR_HEHD 0x62 /* header error/head */
|
||
|
|
#define XD_ERR_NOCY 0x63 /* not on cylinder */
|
||
|
|
#define XD_ERR_SEEK 0x64 /* seek error */
|
||
|
|
/* fatal hardware error */
|
||
|
|
#define XD_ERR_ILSS 0x70 /* illegal sector size */
|
||
|
|
/* misc */
|
||
|
|
#define XD_ERR_SEC 0x80 /* soft ecc */
|
||
|
|
/* requires manual intervention */
|
||
|
|
#define XD_ERR_WPER 0x90 /* write protected */
|
||
|
|
/* FATAL errors */
|
||
|
|
#define XD_ERR_IRAM 0xe1 /* IRAM self test failed */
|
||
|
|
#define XD_ERR_MT3 0xe3 /* maint test 3 failed (DSKCEL RAM) */
|
||
|
|
#define XD_ERR_MT4 0xe4 /* maint test 4 failed (Header shift reg) */
|
||
|
|
#define XD_ERR_MT5 0xe5 /* maint test 5 failed (VMEDMA regs) */
|
||
|
|
#define XD_ERR_MT6 0xe6 /* maint test 6 failed (REGCEL chip) */
|
||
|
|
#define XD_ERR_MT7 0xe7 /* maint test 7 failed (buff. parity) */
|
||
|
|
#define XD_ERR_MT8 0xe8 /* maint test 8 failed (fifo) */
|
||
|
|
#define XD_ERR_IOCK 0xf0 /* iopb checksume miscompare */
|
||
|
|
#define XD_ERR_IODM 0xf1 /* iopb dma fatal */
|
||
|
|
#define XD_ERR_IOAL 0xf2 /* iopb allignment error */
|
||
|
|
#define XD_ERR_FIRM 0xf3 /* firmware error n*/
|
||
|
|
#define XD_ERR_MMOD 0xf5 /* illegal maint mode test number */
|
||
|
|
#define XD_ERR_ACFL 0xf6 /* ACFAIL asserted */
|