104 lines
4.0 KiB
C
104 lines
4.0 KiB
C
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/* $NetBSD: hid_601.h,v 1.1 1999/12/18 01:33:45 thorpej Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Hardware Implementation Dependent registers for the PowerPC 601.
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*/
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/*
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* HID0 (SPR 1008) -- Checkstop Enable/Disable and Status register
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*/
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/* v- feature bits -v */
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#define HID0_601_EHP 0x00000001 /* enable HP_SNP_REQ# */
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#define HID0_601_EMC 0x00000002 /* main cache error */
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#define HID0_601_PAR 0x00000004 /* precharge of ARTRY#/SHD# disabled */
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#define HID0_601_LM 0x00000008 /* little endian mode */
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#define HID0_601_DRL 0x00000010 /* alt sec rld of load/store miss */
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#define HID0_601_DRF 0x00000020 /* alt sec rld of insn fetch miss */
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/* v- checkstop enable/disable bits -v */
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#define HID0_601_EPP 0x00000040 /* i/o protocol checkstop */
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#define HID0_601_EIU 0x00000080 /* invalid uCode checkstop */
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#define HID0_601_ECP 0x00000100 /* cache parity checkstop */
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#define HID0_601_EBD 0x00000200 /* data bus parity checkstop */
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#define HID0_601_EBA 0x00000400 /* address bus parity checkstop */
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#define HID0_601_EDT 0x00000800 /* dispatch timeout checkstop */
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#define HID0_601_ESH 0x00001000 /* sequencer timeout checkstop */
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#define HID0_601_ECD 0x00002000 /* cache checkstop */
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#define HID0_601_ETD 0x00004000 /* TLB checkstop */
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#define HID0_601_EM 0x00008000 /* machine checkstop */
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#define HID0_601_ES 0x00010000 /* uCode checkstop */
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/* 0x00020000 reserved */
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/* 0x00040000 reserved */
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/* 0x00080000 reserved */
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/* v- status bits -- correspond to enable bits above -v */
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#define HID0_601_PP 0x00100000
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#define HID0_601_IU 0x00200000
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#define HID0_601_CP 0x00400000
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#define HID0_601_BD 0x00800000
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#define HID0_601_BA 0x01000000
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#define HID0_601_DT 0x02000000
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#define HID0_601_SH 0x04000000
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#define HID0_601_CD 0x08000000
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#define HID0_601_TD 0x10000000
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#define HID0_601_M 0x20000000
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#define HID0_601_S 0x40000000
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#define HID0_601_CE 0x80000000 /* master checkstop enable */
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/*
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* HID1 (SPR 1009) -- Debug Modes register
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*/
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/* XXX */
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/*
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* HID2 (SPR 1010) -- Instruction Address Breakpoint Register
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*/
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/*
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* HID5 (SPR 1013) -- Data Address Breakpoint Register
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*/
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/*
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* HID15 (SPR 1023) -- Processor ID Register
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*/
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#define HID15_601_PID 0x0000000f /* processor ID mask */
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