583 lines
14 KiB
Plaintext
583 lines
14 KiB
Plaintext
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* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
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* M68000 Hi-Performance Microprocessor Division
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* M68040 Software Package
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*
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* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
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* All rights reserved.
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*
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* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
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* To the maximum extent permitted by applicable law,
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* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
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* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
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* PARTICULAR PURPOSE and any warranty against infringement with
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* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
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* and any accompanying written materials.
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*
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* To the maximum extent permitted by applicable law,
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* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
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* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
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* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
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* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
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* SOFTWARE. Motorola assumes no responsibility for the maintenance
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* and support of the SOFTWARE.
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*
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* You are hereby granted a copyright license to use, modify, and
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* distribute the SOFTWARE so long as this entire notice is retained
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* without alteration in any modified and/or redistributed versions,
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* and that such modified versions are clearly identified as such.
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* No licenses are granted by implication, estoppel or otherwise
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* under any patents or trademarks of Motorola, Inc.
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*
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* do_func.sa 3.4 2/18/91
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*
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* Do_func performs the unimplemented operation. The operation
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* to be performed is determined from the lower 7 bits of the
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* extension word (except in the case of fmovecr and fsincos).
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* The opcode and tag bits form an index into a jump table in
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* tbldo.sa. Cases of zero, infinity and NaN are handled in
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* do_func by forcing the default result. Normalized and
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* denormalized (there are no unnormalized numbers at this
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* point) are passed onto the emulation code.
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*
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* CMDREG1B and STAG are extracted from the fsave frame
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* and combined to form the table index. The function called
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* will start with a0 pointing to the ETEMP operand. Dyadic
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* functions can find FPTEMP at -12(a0).
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*
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* Called functions return their result in fp0. Sincos returns
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* sin(x) in fp0 and cos(x) in fp1.
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*
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DO_FUNC IDNT 2,1 Motorola 040 Floating Point Software Package
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section 8
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include fpsp.h
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xref t_dz2
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xref t_operr
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xref t_inx2
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xref t_resdnrm
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xref dst_nan
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xref src_nan
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xref nrm_set
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xref sto_cos
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xref tblpre
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xref slognp1,slogn,slog10,slog2
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xref slognd,slog10d,slog2d
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xref smod,srem
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xref sscale
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xref smovcr
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PONE dc.l $3fff0000,$80000000,$00000000 ;+1
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MONE dc.l $bfff0000,$80000000,$00000000 ;-1
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PZERO dc.l $00000000,$00000000,$00000000 ;+0
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MZERO dc.l $80000000,$00000000,$00000000 ;-0
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PINF dc.l $7fff0000,$00000000,$00000000 ;+inf
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MINF dc.l $ffff0000,$00000000,$00000000 ;-inf
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QNAN dc.l $7fff0000,$ffffffff,$ffffffff ;non-signaling nan
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PPIBY2 dc.l $3FFF0000,$C90FDAA2,$2168C235 ;+PI/2
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MPIBY2 dc.l $bFFF0000,$C90FDAA2,$2168C235 ;-PI/2
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xdef do_func
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do_func:
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clr.b CU_ONLY(a6)
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*
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* Check for fmovecr. It does not follow the format of fp gen
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* unimplemented instructions. The test is on the upper 6 bits;
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* if they are $17, the inst is fmovecr. Call entry smovcr
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* directly.
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*
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bfextu CMDREG1B(a6){0:6},d0 ;get opclass and src fields
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cmpi.l #$17,d0 ;if op class and size fields are $17,
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* ;it is FMOVECR; if not, continue
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bne.b not_fmovecr
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jmp smovcr ;fmovecr; jmp directly to emulation
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not_fmovecr:
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move.w CMDREG1B(a6),d0
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and.l #$7F,d0
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cmpi.l #$38,d0 ;if the extension is >= $38,
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bge.b serror ;it is illegal
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bfextu STAG(a6){0:3},d1
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lsl.l #3,d0 ;make room for STAG
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add.l d1,d0 ;combine for final index into table
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lea.l tblpre,a1 ;start of monster jump table
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move.l (a1,d0.w*4),a1 ;real target address
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lea.l ETEMP(a6),a0 ;a0 is pointer to src op
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move.l USER_FPCR(a6),d1
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and.l #$FF,d1 ; discard all but rounding mode/prec
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fmove.l #0,fpcr
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jmp (a1)
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*
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* ERROR
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*
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xdef serror
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serror:
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st.b STORE_FLG(a6)
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rts
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*
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* These routines load forced values into fp0. They are called
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* by index into tbldo.
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*
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* Load a signed zero to fp0 and set inex2/ainex
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*
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xdef snzrinx
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snzrinx:
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btst.b #sign_bit,LOCAL_EX(a0) ;get sign of source operand
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bne.b ld_mzinx ;if negative, branch
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bsr ld_pzero ;bsr so we can return and set inx
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bra t_inx2 ;now, set the inx for the next inst
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ld_mzinx:
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bsr ld_mzero ;if neg, load neg zero, return here
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bra t_inx2 ;now, set the inx for the next inst
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*
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* Load a signed zero to fp0; do not set inex2/ainex
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*
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xdef szero
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szero:
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btst.b #sign_bit,LOCAL_EX(a0) ;get sign of source operand
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bne ld_mzero ;if neg, load neg zero
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bra ld_pzero ;load positive zero
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*
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* Load a signed infinity to fp0; do not set inex2/ainex
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*
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xdef sinf
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sinf:
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btst.b #sign_bit,LOCAL_EX(a0) ;get sign of source operand
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bne ld_minf ;if negative branch
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bra ld_pinf
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*
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* Load a signed one to fp0; do not set inex2/ainex
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*
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xdef sone
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sone:
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btst.b #sign_bit,LOCAL_EX(a0) ;check sign of source
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bne ld_mone
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bra ld_pone
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*
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* Load a signed pi/2 to fp0; do not set inex2/ainex
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*
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xdef spi_2
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spi_2:
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btst.b #sign_bit,LOCAL_EX(a0) ;check sign of source
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bne ld_mpi2
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bra ld_ppi2
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*
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* Load either a +0 or +inf for plus/minus operand
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*
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xdef szr_inf
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szr_inf:
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btst.b #sign_bit,LOCAL_EX(a0) ;check sign of source
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bne ld_pzero
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bra ld_pinf
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*
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* Result is either an operr or +inf for plus/minus operand
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* [Used by slogn, slognp1, slog10, and slog2]
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*
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xdef sopr_inf
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sopr_inf:
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btst.b #sign_bit,LOCAL_EX(a0) ;check sign of source
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bne t_operr
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bra ld_pinf
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*
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* FLOGNP1
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*
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xdef sslognp1
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sslognp1:
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fmovem.x (a0),fp0
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fcmp.b #-1,fp0
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fbgt slognp1
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fbeq t_dz2 ;if = -1, divide by zero exception
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fmove.l #0,FPSR ;clr N flag
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bra t_operr ;take care of operands < -1
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*
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* FETOXM1
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*
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xdef setoxm1i
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setoxm1i:
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btst.b #sign_bit,LOCAL_EX(a0) ;check sign of source
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bne ld_mone
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bra ld_pinf
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*
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* FLOGN
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*
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* Test for 1.0 as an input argument, returning +zero. Also check
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* the sign and return operr if negative.
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*
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xdef sslogn
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sslogn:
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btst.b #sign_bit,LOCAL_EX(a0)
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bne t_operr ;take care of operands < 0
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cmpi.w #$3fff,LOCAL_EX(a0) ;test for 1.0 input
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bne slogn
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cmpi.l #$80000000,LOCAL_HI(a0)
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bne slogn
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tst.l LOCAL_LO(a0)
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bne slogn
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fmove.x PZERO,fp0
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rts
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xdef sslognd
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sslognd:
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btst.b #sign_bit,LOCAL_EX(a0)
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beq slognd
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bra t_operr ;take care of operands < 0
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*
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* FLOG10
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*
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xdef sslog10
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sslog10:
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btst.b #sign_bit,LOCAL_EX(a0)
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bne t_operr ;take care of operands < 0
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cmpi.w #$3fff,LOCAL_EX(a0) ;test for 1.0 input
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bne slog10
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cmpi.l #$80000000,LOCAL_HI(a0)
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bne slog10
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tst.l LOCAL_LO(a0)
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bne slog10
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fmove.x PZERO,fp0
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rts
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xdef sslog10d
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sslog10d:
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btst.b #sign_bit,LOCAL_EX(a0)
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beq slog10d
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bra t_operr ;take care of operands < 0
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*
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* FLOG2
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*
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xdef sslog2
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sslog2:
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btst.b #sign_bit,LOCAL_EX(a0)
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bne t_operr ;take care of operands < 0
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cmpi.w #$3fff,LOCAL_EX(a0) ;test for 1.0 input
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bne slog2
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cmpi.l #$80000000,LOCAL_HI(a0)
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bne slog2
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tst.l LOCAL_LO(a0)
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bne slog2
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fmove.x PZERO,fp0
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rts
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xdef sslog2d
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sslog2d:
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btst.b #sign_bit,LOCAL_EX(a0)
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beq slog2d
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bra t_operr ;take care of operands < 0
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*
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* FMOD
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*
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pmodt:
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* ;$21 fmod
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* ;dtag,stag
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dc.l smod ; 00,00 norm,norm = normal
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dc.l smod_oper ; 00,01 norm,zero = nan with operr
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dc.l smod_fpn ; 00,10 norm,inf = fpn
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dc.l smod_snan ; 00,11 norm,nan = nan
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dc.l smod_zro ; 01,00 zero,norm = +-zero
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dc.l smod_oper ; 01,01 zero,zero = nan with operr
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dc.l smod_zro ; 01,10 zero,inf = +-zero
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dc.l smod_snan ; 01,11 zero,nan = nan
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dc.l smod_oper ; 10,00 inf,norm = nan with operr
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dc.l smod_oper ; 10,01 inf,zero = nan with operr
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dc.l smod_oper ; 10,10 inf,inf = nan with operr
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dc.l smod_snan ; 10,11 inf,nan = nan
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dc.l smod_dnan ; 11,00 nan,norm = nan
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dc.l smod_dnan ; 11,01 nan,zero = nan
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dc.l smod_dnan ; 11,10 nan,inf = nan
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dc.l smod_dnan ; 11,11 nan,nan = nan
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xdef pmod
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pmod:
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clr.b FPSR_QBYTE(a6) ; clear quotient field
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bfextu STAG(a6){0:3},d0 ;stag = d0
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bfextu DTAG(a6){0:3},d1 ;dtag = d1
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*
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* Alias extended denorms to norms for the jump table.
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*
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bclr.l #2,d0
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bclr.l #2,d1
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lsl.b #2,d1
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or.b d0,d1 ;d1{3:2} = dtag, d1{1:0} = stag
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* ;Tag values:
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* ;00 = norm or denorm
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* ;01 = zero
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* ;10 = inf
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* ;11 = nan
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lea pmodt,a1
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move.l (a1,d1.w*4),a1
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jmp (a1)
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smod_snan:
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bra src_nan
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smod_dnan:
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bra dst_nan
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smod_oper:
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bra t_operr
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smod_zro:
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move.b ETEMP(a6),d1 ;get sign of src op
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move.b FPTEMP(a6),d0 ;get sign of dst op
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eor.b d0,d1 ;get exor of sign bits
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btst.l #7,d1 ;test for sign
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beq.b smod_zsn ;if clr, do not set sign big
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bset.b #q_sn_bit,FPSR_QBYTE(a6) ;set q-byte sign bit
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smod_zsn:
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btst.l #7,d0 ;test if + or -
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beq ld_pzero ;if pos then load +0
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bra ld_mzero ;else neg load -0
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smod_fpn:
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move.b ETEMP(a6),d1 ;get sign of src op
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move.b FPTEMP(a6),d0 ;get sign of dst op
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eor.b d0,d1 ;get exor of sign bits
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btst.l #7,d1 ;test for sign
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beq.b smod_fsn ;if clr, do not set sign big
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bset.b #q_sn_bit,FPSR_QBYTE(a6) ;set q-byte sign bit
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smod_fsn:
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tst.b DTAG(a6) ;filter out denormal destination case
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bpl.b smod_nrm ;
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lea.l FPTEMP(a6),a0 ;a0<- addr(FPTEMP)
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bra t_resdnrm ;force UNFL(but exact) result
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smod_nrm:
|
||
|
|
fmove.l USER_FPCR(a6),fpcr ;use user's rmode and precision
|
||
|
|
fmove.x FPTEMP(a6),fp0 ;return dest to fp0
|
||
|
|
rts
|
||
|
|
|
||
|
|
*
|
||
|
|
* FREM
|
||
|
|
*
|
||
|
|
premt:
|
||
|
|
* ;$25 frem
|
||
|
|
* ;dtag,stag
|
||
|
|
dc.l srem ; 00,00 norm,norm = normal
|
||
|
|
dc.l srem_oper ; 00,01 norm,zero = nan with operr
|
||
|
|
dc.l srem_fpn ; 00,10 norm,inf = fpn
|
||
|
|
dc.l srem_snan ; 00,11 norm,nan = nan
|
||
|
|
dc.l srem_zro ; 01,00 zero,norm = +-zero
|
||
|
|
dc.l srem_oper ; 01,01 zero,zero = nan with operr
|
||
|
|
dc.l srem_zro ; 01,10 zero,inf = +-zero
|
||
|
|
dc.l srem_snan ; 01,11 zero,nan = nan
|
||
|
|
dc.l srem_oper ; 10,00 inf,norm = nan with operr
|
||
|
|
dc.l srem_oper ; 10,01 inf,zero = nan with operr
|
||
|
|
dc.l srem_oper ; 10,10 inf,inf = nan with operr
|
||
|
|
dc.l srem_snan ; 10,11 inf,nan = nan
|
||
|
|
dc.l srem_dnan ; 11,00 nan,norm = nan
|
||
|
|
dc.l srem_dnan ; 11,01 nan,zero = nan
|
||
|
|
dc.l srem_dnan ; 11,10 nan,inf = nan
|
||
|
|
dc.l srem_dnan ; 11,11 nan,nan = nan
|
||
|
|
|
||
|
|
xdef prem
|
||
|
|
prem:
|
||
|
|
clr.b FPSR_QBYTE(a6) ;clear quotient field
|
||
|
|
bfextu STAG(a6){0:3},d0 ;stag = d0
|
||
|
|
bfextu DTAG(a6){0:3},d1 ;dtag = d1
|
||
|
|
*
|
||
|
|
* Alias extended denorms to norms for the jump table.
|
||
|
|
*
|
||
|
|
bclr #2,d0
|
||
|
|
bclr #2,d1
|
||
|
|
|
||
|
|
lsl.b #2,d1
|
||
|
|
or.b d0,d1 ;d1{3:2} = dtag, d1{1:0} = stag
|
||
|
|
* ;Tag values:
|
||
|
|
* ;00 = norm or denorm
|
||
|
|
* ;01 = zero
|
||
|
|
* ;10 = inf
|
||
|
|
* ;11 = nan
|
||
|
|
lea premt,a1
|
||
|
|
move.l (a1,d1.w*4),a1
|
||
|
|
jmp (a1)
|
||
|
|
|
||
|
|
srem_snan:
|
||
|
|
bra src_nan
|
||
|
|
srem_dnan:
|
||
|
|
bra dst_nan
|
||
|
|
srem_oper:
|
||
|
|
bra t_operr
|
||
|
|
srem_zro:
|
||
|
|
move.b ETEMP(a6),d1 ;get sign of src op
|
||
|
|
move.b FPTEMP(a6),d0 ;get sign of dst op
|
||
|
|
eor.b d0,d1 ;get exor of sign bits
|
||
|
|
btst.l #7,d1 ;test for sign
|
||
|
|
beq.b srem_zsn ;if clr, do not set sign big
|
||
|
|
bset.b #q_sn_bit,FPSR_QBYTE(a6) ;set q-byte sign bit
|
||
|
|
srem_zsn:
|
||
|
|
btst.l #7,d0 ;test if + or -
|
||
|
|
beq ld_pzero ;if pos then load +0
|
||
|
|
bra ld_mzero ;else neg load -0
|
||
|
|
|
||
|
|
srem_fpn:
|
||
|
|
move.b ETEMP(a6),d1 ;get sign of src op
|
||
|
|
move.b FPTEMP(a6),d0 ;get sign of dst op
|
||
|
|
eor.b d0,d1 ;get exor of sign bits
|
||
|
|
btst.l #7,d1 ;test for sign
|
||
|
|
beq.b srem_fsn ;if clr, do not set sign big
|
||
|
|
bset.b #q_sn_bit,FPSR_QBYTE(a6) ;set q-byte sign bit
|
||
|
|
srem_fsn:
|
||
|
|
tst.b DTAG(a6) ;filter out denormal destination case
|
||
|
|
bpl.b srem_nrm ;
|
||
|
|
lea.l FPTEMP(a6),a0 ;a0<- addr(FPTEMP)
|
||
|
|
bra t_resdnrm ;force UNFL(but exact) result
|
||
|
|
srem_nrm:
|
||
|
|
fmove.l USER_FPCR(a6),fpcr ;use user's rmode and precision
|
||
|
|
fmove.x FPTEMP(a6),fp0 ;return dest to fp0
|
||
|
|
rts
|
||
|
|
*
|
||
|
|
* FSCALE
|
||
|
|
*
|
||
|
|
pscalet:
|
||
|
|
* ;$26 fscale
|
||
|
|
* ;dtag,stag
|
||
|
|
dc.l sscale ; 00,00 norm,norm = result
|
||
|
|
dc.l sscale ; 00,01 norm,zero = fpn
|
||
|
|
dc.l scl_opr ; 00,10 norm,inf = nan with operr
|
||
|
|
dc.l scl_snan ; 00,11 norm,nan = nan
|
||
|
|
dc.l scl_zro ; 01,00 zero,norm = +-zero
|
||
|
|
dc.l scl_zro ; 01,01 zero,zero = +-zero
|
||
|
|
dc.l scl_opr ; 01,10 zero,inf = nan with operr
|
||
|
|
dc.l scl_snan ; 01,11 zero,nan = nan
|
||
|
|
dc.l scl_inf ; 10,00 inf,norm = +-inf
|
||
|
|
dc.l scl_inf ; 10,01 inf,zero = +-inf
|
||
|
|
dc.l scl_opr ; 10,10 inf,inf = nan with operr
|
||
|
|
dc.l scl_snan ; 10,11 inf,nan = nan
|
||
|
|
dc.l scl_dnan ; 11,00 nan,norm = nan
|
||
|
|
dc.l scl_dnan ; 11,01 nan,zero = nan
|
||
|
|
dc.l scl_dnan ; 11,10 nan,inf = nan
|
||
|
|
dc.l scl_dnan ; 11,11 nan,nan = nan
|
||
|
|
|
||
|
|
xdef pscale
|
||
|
|
pscale:
|
||
|
|
bfextu STAG(a6){0:3},d0 ;stag in d0
|
||
|
|
bfextu DTAG(a6){0:3},d1 ;dtag in d1
|
||
|
|
bclr.l #2,d0 ;alias denorm into norm
|
||
|
|
bclr.l #2,d1 ;alias denorm into norm
|
||
|
|
lsl.b #2,d1
|
||
|
|
or.b d0,d1 ;d1{4:2} = dtag, d1{1:0} = stag
|
||
|
|
* ;dtag values stag values:
|
||
|
|
* ;000 = norm 00 = norm
|
||
|
|
* ;001 = zero 01 = zero
|
||
|
|
* ;010 = inf 10 = inf
|
||
|
|
* ;011 = nan 11 = nan
|
||
|
|
* ;100 = dnrm
|
||
|
|
*
|
||
|
|
*
|
||
|
|
lea.l pscalet,a1 ;load start of jump table
|
||
|
|
move.l (a1,d1.w*4),a1 ;load a1 with label depending on tag
|
||
|
|
jmp (a1) ;go to the routine
|
||
|
|
|
||
|
|
scl_opr:
|
||
|
|
bra t_operr
|
||
|
|
|
||
|
|
scl_dnan:
|
||
|
|
bra dst_nan
|
||
|
|
|
||
|
|
scl_zro:
|
||
|
|
btst.b #sign_bit,FPTEMP_EX(a6) ;test if + or -
|
||
|
|
beq ld_pzero ;if pos then load +0
|
||
|
|
bra ld_mzero ;if neg then load -0
|
||
|
|
scl_inf:
|
||
|
|
btst.b #sign_bit,FPTEMP_EX(a6) ;test if + or -
|
||
|
|
beq ld_pinf ;if pos then load +inf
|
||
|
|
bra ld_minf ;else neg load -inf
|
||
|
|
scl_snan:
|
||
|
|
bra src_nan
|
||
|
|
*
|
||
|
|
* FSINCOS
|
||
|
|
*
|
||
|
|
xdef ssincosz
|
||
|
|
ssincosz:
|
||
|
|
btst.b #sign_bit,ETEMP(a6) ;get sign
|
||
|
|
beq.b sincosp
|
||
|
|
fmove.x MZERO,fp0
|
||
|
|
bra.b sincoscom
|
||
|
|
sincosp:
|
||
|
|
fmove.x PZERO,fp0
|
||
|
|
sincoscom:
|
||
|
|
fmovem.x PONE,fp1 ;do not allow FPSR to be affected
|
||
|
|
bra sto_cos ;store cosine result
|
||
|
|
|
||
|
|
xdef ssincosi
|
||
|
|
ssincosi:
|
||
|
|
fmove.x QNAN,fp1 ;load NAN
|
||
|
|
bsr sto_cos ;store cosine result
|
||
|
|
fmove.x QNAN,fp0 ;load NAN
|
||
|
|
bra t_operr
|
||
|
|
|
||
|
|
xdef ssincosnan
|
||
|
|
ssincosnan:
|
||
|
|
move.l ETEMP_EX(a6),FP_SCR1(a6)
|
||
|
|
move.l ETEMP_HI(a6),FP_SCR1+4(a6)
|
||
|
|
move.l ETEMP_LO(a6),FP_SCR1+8(a6)
|
||
|
|
bset.b #signan_bit,FP_SCR1+4(a6)
|
||
|
|
fmovem.x FP_SCR1(a6),fp1
|
||
|
|
bsr sto_cos
|
||
|
|
bra src_nan
|
||
|
|
*
|
||
|
|
* This code forces default values for the zero, inf, and nan cases
|
||
|
|
* in the transcendentals code. The CC bits must be set in the
|
||
|
|
* stacked FPSR to be correctly reported.
|
||
|
|
*
|
||
|
|
***Returns +PI/2
|
||
|
|
xdef ld_ppi2
|
||
|
|
ld_ppi2:
|
||
|
|
fmove.x PPIBY2,fp0 ;load +pi/2
|
||
|
|
bra t_inx2 ;set inex2 exc
|
||
|
|
|
||
|
|
***Returns -PI/2
|
||
|
|
xdef ld_mpi2
|
||
|
|
ld_mpi2:
|
||
|
|
fmove.x MPIBY2,fp0 ;load -pi/2
|
||
|
|
or.l #neg_mask,USER_FPSR(a6) ;set N bit
|
||
|
|
bra t_inx2 ;set inex2 exc
|
||
|
|
|
||
|
|
***Returns +inf
|
||
|
|
xdef ld_pinf
|
||
|
|
ld_pinf:
|
||
|
|
fmove.x PINF,fp0 ;load +inf
|
||
|
|
or.l #inf_mask,USER_FPSR(a6) ;set I bit
|
||
|
|
rts
|
||
|
|
|
||
|
|
***Returns -inf
|
||
|
|
xdef ld_minf
|
||
|
|
ld_minf:
|
||
|
|
fmove.x MINF,fp0 ;load -inf
|
||
|
|
or.l #neg_mask+inf_mask,USER_FPSR(a6) ;set N and I bits
|
||
|
|
rts
|
||
|
|
|
||
|
|
***Returns +1
|
||
|
|
xdef ld_pone
|
||
|
|
ld_pone:
|
||
|
|
fmove.x PONE,fp0 ;load +1
|
||
|
|
rts
|
||
|
|
|
||
|
|
***Returns -1
|
||
|
|
xdef ld_mone
|
||
|
|
ld_mone:
|
||
|
|
fmove.x MONE,fp0 ;load -1
|
||
|
|
or.l #neg_mask,USER_FPSR(a6) ;set N bit
|
||
|
|
rts
|
||
|
|
|
||
|
|
***Returns +0
|
||
|
|
xdef ld_pzero
|
||
|
|
ld_pzero:
|
||
|
|
fmove.x PZERO,fp0 ;load +0
|
||
|
|
or.l #z_mask,USER_FPSR(a6) ;set Z bit
|
||
|
|
rts
|
||
|
|
|
||
|
|
***Returns -0
|
||
|
|
xdef ld_mzero
|
||
|
|
ld_mzero:
|
||
|
|
fmove.x MZERO,fp0 ;load -0
|
||
|
|
or.l #neg_mask+z_mask,USER_FPSR(a6) ;set N and Z bits
|
||
|
|
rts
|
||
|
|
|
||
|
|
end
|