208 lines
6.3 KiB
C
208 lines
6.3 KiB
C
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/*
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* Copyright (c) 1993 Philip A. Nelson.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Philip A. Nelson.
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* 4. The name of Philip A. Nelson may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY PHILIP NELSON ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL PHILIP NELSON BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* dpreg.h: definitions for the dp driver.
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*
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* $Id: scnreg.h,v 1.1.1.1 1993/09/09 23:53:52 phil Exp $
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*/
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/* Constants. */
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#ifdef COMDEF_SPEED
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#undef TTYDEF_SPEED
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#define TTYDEF_SPEED COMDEF_SPEED /* default baud rate */
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#endif
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#define SCN_FIRST_ADR 0x28000000 /* address of first RS232 port */
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#define SCN_FIRST_MAP_ADR 0xFFC80000 /* mapped address of first port */
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#define SCN_SIZE 0x8 /* address space for port */
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#define SCN_CONSOLE 0 /* minor number of console */
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#define SCN_CON_MAP_STAT 0xFFC80001 /* raw addresses for console */
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#define SCN_CON_MAP_DATA 0xFFC80003 /* Mapped .... */
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#define SCN_CONSOLE_STAT 0x28000001 /* raw addresses for console */
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#define SCN_CONSOLE_DATA 0x28000003 /* Unmapped .... */
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/* SCN2691 registers, values. */
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#define LINE_SZ 0x08
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#define UART_SZ 0x10
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#define MR_ADR (line_base+0)
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#define STAT_ADR (line_base+1)
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#define SPEED_ADR (line_base+1)
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#define CMD_ADR (line_base+2)
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#define DATA_ADR (line_base+3)
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#define IPCR_ADR (uart_base+4)
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#define ACR_ADR (uart_base+4)
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#define ISR_ADR (uart_base+5)
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#define IMR_ADR (uart_base+5)
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#define IP_ADR (uart_base+13)
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#define OPCR_ADR (uart_base+13)
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#define SET_OP_ADR (uart_base+14)
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#define CLR_OP_ADR (uart_base+15)
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/* Data Values */
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#define LC_ODD 0x04
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#define LC_EVEN 0x00
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#define LC_NONE 0x10
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#define LC_STOP1 0x07
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#define LC_STOP2 0x0f
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#define LC_BITS5 0x00
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#define LC_BITS6 0x01
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#define LC_BITS7 0x02
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#define LC_BITS8 0x03
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#define LC_CHARS 0x03
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#define LC_CHARS_SHIFT 0x08
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#define LC_SP_GRP 0x10
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#define LC_SP_BOTH 0x20
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#define RTS_BIT 0x1
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#define CTS_BIT 0x1
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#define DTR_BIT 0x4
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#define DCD_BIT 0x4
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/* CR (command) register values. */
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#define CMD_ENA_RX 0x01
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#define CMD_DIS_RX 0x02
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#define CMD_ENA_TX 0x04
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#define CMD_DIS_TX 0x08
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#define CMD_MR1 0x10
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#define CMD_RESET_RX 0x20
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#define CMD_RESET_TX 0x30
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#define CMD_RESET_ERR 0x40
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#define CMD_RESET_BRK 0x50
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#define CMD_START_BRK 0x60
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#define CMD_STOP_BRK 0x70
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/* SR register */
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#define SR_RX_RDY 0x01
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#define SR_TX_RDY 0x04
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#define SR_BREAK 0x80
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#define SR_FRAME 0x40
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#define SR_PARITY 0x20
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#define SR_OVERRUN 0x10
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/* Output port configuration. */
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#define OPCR_CONFIG 0x00
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/* Input port interrupt config. */
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#define ACR_CTS 0x01
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#define ACR_DCD 0x04
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#define IPCR_CTS 0x10
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#define IPCR_DCD 0x40
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/* Interrupt configurations. */
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#define IMR_IP_INT 0x80
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#define IMR_BRK_INT 0x04
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#define IMR_RX_INT 0x02
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#define IMR_TX_INT 0x01
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#define IMR_BRKB_INT 0x40
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#define IMR_RXB_INT 0x20
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#define IMR_TXB_INT 0x10
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/* If we need a delay.... */
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#define DELAY(x) {int i; for (i=0; i<x*10000; i++); }
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#define istart(rs) \
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(WR_ADR(u_char, rs->opset_port, (RTS_BIT | DTR_BIT) << (rs)->a_or_b))
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#define istop(rs) \
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(WR_ADR(u_char, rs->opclr_port, RTS_BIT << (rs)->a_or_b))
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#define get_dcd(rs) \
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(RD_ADR(u_char, rs->ip_port) & (DCD_BIT << (1-rs->a_or_b)))
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#define tx_rdy(rs) \
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(RD_ADR(u_char, rs->stat_port) & SR_TX_RDY)
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/* Interrupts on and off. */
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#define tx_ints_off(rs) \
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{ rs->uart->imr_int_bits &= ~(IMR_TX_INT) << (4*rs->a_or_b); \
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WR_ADR (u_char, rs->uart->imr_port, rs->uart->imr_int_bits); }
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#define tx_ints_on(rs) \
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{ rs->uart->imr_int_bits |= (IMR_TX_INT) << (4*rs->a_or_b); \
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WR_ADR (u_char, rs->uart->imr_port, rs->uart->imr_int_bits); }
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#define rx_ints_off(rs) \
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{ rs->uart->imr_int_bits &= ~(IMR_RX_INT) << (4*rs->a_or_b); \
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WR_ADR (u_char, rs->uart->imr_port, rs->uart->imr_int_bits); }
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#define rx_ints_on(rs) \
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{ rs->uart->imr_int_bits |= (IMR_RX_INT) << (4*rs->a_or_b); \
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WR_ADR (u_char, rs->uart->imr_port, rs->uart->imr_int_bits); }
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/* Structure definitions. */
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typedef unsigned long port_t;
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/* The DUART description table */
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struct duart_info {
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char i_speed[2], o_speed[2]; /* Channel A and B speeds. */
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char i_code[2], o_code[2]; /* Channel A and B speeds. */
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char speed_grp; /* ACR bit 7 */
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char acr_int_bits; /* ACR bits 0-6 */
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char imr_int_bits; /* IMR bits current set. */
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port_t isr_port;
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port_t imr_port;
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port_t ipcr_port;
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port_t opcr_port;
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};
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/* RS232 device structure, one per device. */
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struct rs232_s {
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int unit; /* unit number of this line (base 0) */
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struct duart_info *uart; /* pointer to uart struct */
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char a_or_b; /* 0 => A, 1 => B */
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long scn_bits; /* Temp! for TIOCM ... */
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port_t xmit_port; /* i/o ports */
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port_t recv_port;
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port_t mr_port;
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port_t stat_port; /* sra or srb */
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port_t speed_port; /* csra or csrb */
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port_t cmd_port; /* cra or crb */
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port_t acr_port;
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port_t ip_port;
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port_t opset_port;
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port_t opclr_port;
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unsigned char lstatus; /* last line status */
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unsigned framing_errors; /* error counts (no reporting yet) */
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unsigned overrun_errors;
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unsigned parity_errors;
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unsigned break_interrupts;
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};
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