76 lines
2.5 KiB
ArmAsm
76 lines
2.5 KiB
ArmAsm
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/* $NetBSD: srtbegin.S,v 1.1 2002/02/23 05:41:14 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include <arm/armreg.h>
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ENTRY(start)
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/*
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* We assume we've been loaded VA==PA, or that the MMU
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* is disabled. Make sure the MMU is disabled so that
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* we don't have to care about the caches.
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*/
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mrc p15, 0, r2, c1, c0, 0
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bic r2, r2, #CPU_CONTROL_MMU_ENABLE
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mcr p15, 0, r2, c1, c0, 0
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nop
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nop
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nop
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/* Clear the BSS. */
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add r1, pc, #(Lbss - . - 8)
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ldmia r1, {r1, r2}
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sub r2, r2, r1
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mov r3, #0
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1: strb r3, [r1], #0x01
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subs r2, r2, #0x01
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bgt 1b
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/* Set the stack pointer */
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add sp, pc, #(Lstack - . - 8) /* XXX for now */
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b _C_LABEL(main)
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Lbss:
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.word _C_LABEL(_edata)
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.word _C_LABEL(_end)
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Lstack:
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.space 1024 /* XXX for now */
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