2019-12-23 21:57:30 +03:00
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/* $NetBSD: mt2131.c,v 1.7 2019/12/23 18:57:30 thorpej Exp $ */
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2011-08-04 05:45:37 +04:00
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/*
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* Copyright (c) 2008, 2011 Jonathan A. Kollasch
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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2019-12-23 21:57:30 +03:00
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__KERNEL_RCSID(0, "$NetBSD: mt2131.c,v 1.7 2019/12/23 18:57:30 thorpej Exp $");
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2011-08-04 05:45:37 +04:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kmem.h>
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#include <sys/syslog.h>
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#include <sys/proc.h>
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2011-08-05 02:24:29 +04:00
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#include <sys/module.h>
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2011-08-04 05:45:37 +04:00
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#include <dev/i2c/mt2131var.h>
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#define PWR 0x07
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#define UPC_1 0x0b
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#define AGC_RL 0x10
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#define MISC_2 0x15
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#define IF1 1220
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#define IF2 44000
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#define REF 16000
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static const uint8_t mt2131_initstring[] = {
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0x01,
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0x50, 0x00, 0x50, 0x80, 0x00, 0x49,
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0xfa, 0x88, 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
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0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80, 0xff, 0x68,
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0xa0, 0xff, 0xdd, 0x00, 0x00
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};
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static const uint8_t mt2131_agcinitstring[] = {
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AGC_RL,
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0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
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};
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struct mt2131_softc {
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device_t parent;
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i2c_tag_t tag;
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i2c_addr_t addr;
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uint32_t frequency;
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uint32_t bandwidth;
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};
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static int mt2131_init(struct mt2131_softc *);
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static int mt2131_read(struct mt2131_softc *, uint8_t, uint8_t *);
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static int mt2131_write(struct mt2131_softc *, uint8_t, uint8_t);
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struct mt2131_softc *
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mt2131_open(device_t parent, i2c_tag_t t, i2c_addr_t a)
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{
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struct mt2131_softc *sc;
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int ret;
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uint8_t cmd, reg;
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2011-08-06 00:51:09 +04:00
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cmd = reg = 0;
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2011-08-04 05:45:37 +04:00
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/* get id reg */
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2019-12-23 21:57:30 +03:00
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ret = iic_acquire_bus(t, 0);
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if (ret == 0) {
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ret = iic_exec(t, I2C_OP_READ_WITH_STOP, a, &cmd, 1, ®, 1,
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0);
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iic_release_bus(t, 0);
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}
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2011-08-04 05:45:37 +04:00
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if (ret) {
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2011-08-06 00:51:09 +04:00
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device_printf(parent, "%s(): read fail\n", __func__);
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2011-08-04 05:45:37 +04:00
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return NULL;
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}
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2011-08-06 00:51:09 +04:00
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if ((reg & 0xfe) != 0x3e) {
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device_printf(parent, "%s(): chip id %02x unknown\n",
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__func__, reg);
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2011-08-04 05:45:37 +04:00
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return NULL;
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2011-08-06 00:51:09 +04:00
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}
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2011-08-04 05:45:37 +04:00
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sc = kmem_alloc(sizeof(*sc), KM_SLEEP);
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sc->parent = parent;
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sc->tag = t;
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sc->addr = a;
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mt2131_init(sc);
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return sc;
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}
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void
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mt2131_close(struct mt2131_softc *sc)
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{
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kmem_free(sc, sizeof(*sc));
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}
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int
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mt2131_tune_dtv(struct mt2131_softc *sc, const struct dvb_frontend_parameters *p)
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{
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2011-08-06 00:51:09 +04:00
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int rv, i;
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2011-08-04 05:45:37 +04:00
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uint64_t o1, o2;
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uint64_t d1, d2;
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uint32_t r1, r2;
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uint32_t fr;
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uint8_t b[7];
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uint8_t regval;
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mt2131_init(sc);
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b[0] = 0x01;
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if(p->frequency != 0 &&
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(p->frequency < 50000000 || p->frequency > 1000000000))
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return EINVAL;
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fr = p->frequency / 1000;
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o1 = fr + IF1 * 1000;
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o2 = o1 - fr - IF2;
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d1 = (o1 * 8192)/REF;
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d2 = (o2 * 8192)/REF;
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r1 = d1/8192;
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r2 = d2/8192;
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b[1] = (d1 & 0x1fe0) >> 5;
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b[2] = (d1 & 0x001f);
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b[3] = r1;
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b[4] = (d2 & 0x1fe0) >> 5;
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b[5] = (d2 & 0x001f);
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b[6] = r2;
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2019-12-23 21:57:30 +03:00
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rv = iic_acquire_bus(sc->tag, 0);
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if (rv == 0) {
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rv = iic_exec(sc->tag, I2C_OP_WRITE_WITH_STOP, sc->addr, b, 7,
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NULL, 0, 0);
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iic_release_bus(sc->tag, 0);
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}
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2011-08-04 05:45:37 +04:00
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regval = (fr - 27501) / 55000;
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if(regval > 0x13)
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regval = 0x13;
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rv = mt2131_write(sc, UPC_1, regval);
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if (rv != 0)
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2011-08-06 00:51:09 +04:00
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device_printf(sc->parent, "%s write failed\n", __func__);
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2011-08-04 05:45:37 +04:00
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sc->frequency = (o1 - o2 - IF2) * 1000;
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2011-08-06 00:51:09 +04:00
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for (i = 0; i < 100; i++) {
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kpause("mt2131", true, 1, NULL);
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2011-08-04 05:45:37 +04:00
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rv = mt2131_read(sc, 0x08, ®val);
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2011-08-06 00:51:09 +04:00
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if (rv != 0)
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device_printf(sc->parent, "%s read failed\n", __func__);
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2011-08-04 05:45:37 +04:00
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if (( regval & 0x88 ) == 0x88 ) {
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2011-08-06 00:51:09 +04:00
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return 0;
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2011-08-04 05:45:37 +04:00
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}
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}
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2011-08-06 00:51:09 +04:00
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device_printf(sc->parent, "mt2131 not locked, %02x\n", b[1]);
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2011-08-04 05:45:37 +04:00
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return rv;
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}
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static int
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mt2131_init(struct mt2131_softc *sc)
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{
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int ret;
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2019-12-23 21:57:30 +03:00
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ret = iic_acquire_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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if (ret)
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return -1;
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ret = iic_exec(sc->tag, I2C_OP_WRITE_WITH_STOP, sc->addr,
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2019-12-23 21:57:30 +03:00
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mt2131_initstring, sizeof(mt2131_initstring), NULL, 0, 0);
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iic_release_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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if (ret)
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return -1;
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ret = mt2131_write(sc, UPC_1, 0x09);
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ret = mt2131_write(sc, MISC_2, 0x47);
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ret = mt2131_write(sc, PWR, 0xf2);
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ret = mt2131_write(sc, UPC_1, 0x01);
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2019-12-23 21:57:30 +03:00
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ret = iic_acquire_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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if (ret)
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return -1;
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ret = iic_exec(sc->tag, I2C_OP_WRITE_WITH_STOP, sc->addr,
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mt2131_agcinitstring, sizeof(mt2131_agcinitstring),
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2019-12-23 21:57:30 +03:00
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NULL, 0, 0);
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iic_release_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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if (ret)
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return -1;
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return 0;
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}
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static int
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mt2131_read(struct mt2131_softc *sc, uint8_t r, uint8_t *v)
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{
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int ret;
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2019-12-23 21:57:30 +03:00
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ret = iic_acquire_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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if (ret)
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return ret;
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ret = iic_exec(sc->tag, I2C_OP_READ_WITH_STOP, sc->addr,
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2019-12-23 21:57:30 +03:00
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&r, 1, v, 1, 0);
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2011-08-04 05:45:37 +04:00
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2019-12-23 21:57:30 +03:00
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iic_release_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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return ret;
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}
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static int
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mt2131_write(struct mt2131_softc *sc, uint8_t a, uint8_t v)
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{
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int ret;
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uint8_t b[] = { a, v };
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2019-12-23 21:57:30 +03:00
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ret = iic_acquire_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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if (ret)
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return ret;
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ret = iic_exec(sc->tag, I2C_OP_READ_WITH_STOP, sc->addr,
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2019-12-23 21:57:30 +03:00
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b, sizeof(b), NULL, 0, 0);
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2011-08-04 05:45:37 +04:00
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2019-12-23 21:57:30 +03:00
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iic_release_bus(sc->tag, 0);
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2011-08-04 05:45:37 +04:00
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return ret;
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}
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2011-08-05 02:24:29 +04:00
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2015-03-07 17:16:51 +03:00
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MODULE(MODULE_CLASS_DRIVER, mt2131, "i2cexec");
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2011-08-05 02:24:29 +04:00
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static int
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mt2131_modcmd(modcmd_t cmd, void *priv)
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{
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if (cmd == MODULE_CMD_INIT || cmd == MODULE_CMD_FINI)
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return 0;
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return ENOTTY;
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}
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