2002-03-24 18:45:29 +03:00
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/* $NetBSD: ioebreg.h,v 1.1 2002/03/24 15:47:19 bjh21 Exp $ */
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2000-05-10 01:55:44 +04:00
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/*
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* This file is in the public domain.
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*
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* Derived from:
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* RISC OS 3 Programmer's Reference Manual
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* A3010/A3020/A4000 Technical Reference Manual
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*/
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/* Acorn IOEB (Input/Output Extension Block) registers */
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#ifndef _IOEBREG_H_
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#define _IOEBREG_H_
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/*
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* IOEB starts at a rather high offset because it avoids the ranges
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* used on older machines.
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*/
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#define IOEB_REG_VIDCTL 18 /* Video control latch */
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#define IOEB_REG_ID 20 /* Device ID */
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#define IOEB_REG_SPEED 21 /* Clock speed (A4?) */
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#define IOEB_REG_INTRCLR 22 /* Printer interrupt clear */
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#define IOEB_REG_MONID 28 /* Monitor ID */
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#define IOEB_REG_VGATEST 29 /* VGA test pin/SCART sound ??? */
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#define IOEB_REG_JOY1 30 /* Joystick 1 */
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#define IOEB_REG_JOY2 31 /* Joystick 2 */
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/* The IOEB is connected to D[3:0], so its internal registers are 4-bit */
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#define IOEB_VIDCTL_HSINV 0x1 /* Invert horizontal sync */
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#define IOEB_VIDCTL_VSINV 0x2 /* Invert vertical sync */
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#define IOEB_VIDCTL_CLK_MASK 0xc /* VIDCLK select */
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#define IOEB_VIDCTL_CLK_24MHZ 0x0 /* 24 MHz */
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#define IOEB_VIDCTL_CLK_25MHZ 0x4 /* 25.175 MHz */
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#define IOEB_VIDCTL_CLK_36MHZ 0x8 /* 36 MHz */
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#define IOEB_ID_IOEB 0x5
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#endif
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