598 lines
18 KiB
C
598 lines
18 KiB
C
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/* $NetBSD: bus.h,v 1.1 1998/01/11 21:26:04 thorpej Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (C) 1997 Scott Reynolds. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _HP300_BUS_H_
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#define _HP300_BUS_H_
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/*
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* Values for the hp300 bus space tag, not to be used directly by MI code.
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*/
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#define HP300_BUS_SPACE_INTIO 0 /* space is intio space */
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#define HP300_BUS_SPACE_DIO 1 /* space is dio space */
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/*
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* Bus address and size types
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*/
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typedef u_long bus_addr_t;
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typedef u_long bus_size_t;
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/*
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* Access methods for bus resources and address space.
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*/
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typedef int bus_space_tag_t;
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typedef u_long bus_space_handle_t;
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/*
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* int bus_space_map __P((bus_space_tag_t t, bus_addr_t addr,
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* bus_size_t size, int flags, bus_space_handle_t *bshp));
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*
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* Map a region of bus space.
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*/
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#define BUS_SPACE_MAP_CACHEABLE 0x01
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#define BUS_SPACE_MAP_LINEAR 0x02
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int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t,
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int, bus_space_handle_t *));
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/*
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* void bus_space_unmap __P((bus_space_tag_t t,
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* bus_space_handle_t bsh, bus_size_t size));
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*
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* Unmap a region of bus space.
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*/
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void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
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/*
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* int bus_space_subregion __P((bus_space_tag_t t,
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* bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
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* bus_space_handle_t *nbshp));
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*
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* Get a new handle for a subregion of an already-mapped area of bus space.
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*/
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int bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp));
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/*
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* int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t, rstart,
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* bus_addr_t rend, bus_size_t size, bus_size_t align,
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* bus_size_t boundary, int flags, bus_addr_t *addrp,
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* bus_space_handle_t *bshp));
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*
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* Allocate a region of bus space.
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*/
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int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart,
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bus_addr_t rend, bus_size_t size, bus_size_t align,
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bus_size_t boundary, int cacheable, bus_addr_t *addrp,
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bus_space_handle_t *bshp));
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/*
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* int bus_space_free __P((bus_space_tag_t t,
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* bus_space_handle_t bsh, bus_size_t size));
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*
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* Free a region of bus space.
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*/
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void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size));
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/*
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* int hp300_bus_space_probe __P((bus_space_tag_t t,
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* bus_space_handle_t bsh, bus_size_t offset, int sz));
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*
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* Probe the bus at t/bsh/offset, using sz as the size of the load.
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*
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* This is a machine-dependent extension, and is not to be used by
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* machine-independent code.
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*/
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int hp300_bus_space_probe __P((bus_space_tag_t t,
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bus_space_handle_t bsh, bus_size_t offset, int sz));
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/*
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* u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset));
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*
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* Read a 1, 2, 4, or 8 byte quantity from bus space
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* described by tag/handle/offset.
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*/
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#define bus_space_read_1(t, h, o) \
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((void) t, (*(volatile u_int8_t *)((h) + (o))))
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#define bus_space_read_2(t, h, o) \
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((void) t, (*(volatile u_int16_t *)((h) + (o))))
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#define bus_space_read_4(t, h, o) \
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((void) t, (*(volatile u_int32_t *)((h) + (o))))
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#if 0 /* Cause a link error for bus_space_read_8 */
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#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
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#endif
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/*
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* void bus_space_read_multi_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* u_intN_t *addr, size_t count));
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*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle/offset and copy into buffer provided.
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*/
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#define bus_space_read_multi_1(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movb a0@,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0)
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#define bus_space_read_multi_2(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movw a0@,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0)
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#define bus_space_read_multi_4(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movl a0@,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0)
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#if 0 /* Cause a link error for bus_space_read_multi_8 */
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#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
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#endif
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/*
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* void bus_space_read_region_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* u_intN_t *addr, size_t count));
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*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle and starting at `offset' and copy into
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* buffer provided.
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*/
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#define bus_space_read_region_1(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movb a0@+,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0)
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#define bus_space_read_region_2(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movw a0@+,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0)
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#define bus_space_read_region_4(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movl a0@+,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0)
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#if 0 /* Cause a link error for bus_space_read_region_8 */
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#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
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#endif
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/*
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* void bus_space_write_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* u_intN_t value));
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*
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* Write the 1, 2, 4, or 8 byte value `value' to bus space
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* described by tag/handle/offset.
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*/
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#define bus_space_write_1(t, h, o, v) \
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((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))))
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#define bus_space_write_2(t, h, o, v) \
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((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))))
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#define bus_space_write_4(t, h, o, v) \
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((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))))
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#if 0 /* Cause a link error for bus_space_write_8 */
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#define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
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#endif
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/*
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* void bus_space_write_multi_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* const u_intN_t *addr, size_t count));
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*
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* Write `count' 1, 2, 4, or 8 byte quantities from the buffer
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* provided to bus space described by tag/handle/offset.
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*/
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#define bus_space_write_multi_1(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movb a1@+,a0@ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0)
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#define bus_space_write_multi_2(t, h, o, a, c) do { \
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(void) t; \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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|
|
1: movw a1@+,a0@ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (a), "g" (c) : \
|
||
|
|
"a0","a1","d0"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define bus_space_write_multi_4(t, h, o, a, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,a1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movl a1@+,a0@ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (a), "g" (c) : \
|
||
|
|
"a0","a1","d0"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#if 0 /* Cause a link error for bus_space_write_8 */
|
||
|
|
#define bus_space_write_multi_8(t, h, o, a, c) \
|
||
|
|
!!! bus_space_write_multi_8 unimplimented !!!
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* void bus_space_write_region_N __P((bus_space_tag_t tag,
|
||
|
|
* bus_space_handle_t bsh, bus_size_t offset,
|
||
|
|
* const u_intN_t *addr, size_t count));
|
||
|
|
*
|
||
|
|
* Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
|
||
|
|
* to bus space described by tag/handle starting at `offset'.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define bus_space_write_region_1(t, h, o, a, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,a1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movb a1@+,a0@+ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (a), "g" (c) : \
|
||
|
|
"a0","a1","d0"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define bus_space_write_region_2(t, h, o, a, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,a1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movw a1@+,a0@+ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (a), "g" (c) : \
|
||
|
|
"a0","a1","d0"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define bus_space_write_region_4(t, h, o, a, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,a1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movl a1@+,a0@+ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (a), "g" (c) : \
|
||
|
|
"a0","a1","d0"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#if 0 /* Cause a link error for bus_space_write_region_8 */
|
||
|
|
#define bus_space_write_region_8 \
|
||
|
|
!!! bus_space_write_region_8 unimplemented !!!
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* void bus_space_set_multi_N __P((bus_space_tag_t tag,
|
||
|
|
* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
|
||
|
|
* size_t count));
|
||
|
|
*
|
||
|
|
* Write the 1, 2, 4, or 8 byte value `val' to bus space described
|
||
|
|
* by tag/handle/offset `count' times.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define bus_space_set_multi_1(t, h, o, val, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,d1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movb d1,a0@ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (val), "g" (c) : \
|
||
|
|
"a0","d0","d1"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define bus_space_set_multi_2(t, h, o, val, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,d1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movw d1,a0@ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (val), "g" (c) : \
|
||
|
|
"a0","d0","d1"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define bus_space_set_multi_4(t, h, o, val, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,d1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movl d1,a0@ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (val), "g" (c) : \
|
||
|
|
"a0","d0","d1"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#if 0 /* Cause a link error for bus_space_set_multi_8 */
|
||
|
|
#define bus_space_set_multi_8 \
|
||
|
|
!!! bus_space_set_multi_8 unimplemented !!!
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* void bus_space_set_region_N __P((bus_space_tag_t tag,
|
||
|
|
* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
|
||
|
|
* size_t count));
|
||
|
|
*
|
||
|
|
* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
|
||
|
|
* by tag/handle starting at `offset'.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define bus_space_set_region_1(t, h, o, val, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,d1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movb d1,a0@+ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (val), "g" (c) : \
|
||
|
|
"a0","d0","d1"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define bus_space_set_region_2(t, h, o, val, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,d1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movw d1,a0@+ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (val), "g" (c) : \
|
||
|
|
"a0","d0","d1"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define bus_space_set_region_4(t, h, o, val, c) do { \
|
||
|
|
(void) t; \
|
||
|
|
__asm __volatile (" \
|
||
|
|
movl %0,a0 ; \
|
||
|
|
movl %1,d1 ; \
|
||
|
|
movl %2,d0 ; \
|
||
|
|
1: movl d1,a0@+ ; \
|
||
|
|
subql #1,d0 ; \
|
||
|
|
jne 1b" : \
|
||
|
|
: \
|
||
|
|
"r" ((h) + (o)), "g" (val), "g" (c) : \
|
||
|
|
"a0","d0","d1"); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#if 0 /* Cause a link error for bus_space_set_region_8 */
|
||
|
|
#define bus_space_set_region_8 \
|
||
|
|
!!! bus_space_set_region_8 unimplemented !!!
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* void bus_space_copy_region_N __P((bus_space_tag_t tag,
|
||
|
|
* bus_space_handle_t bsh1, bus_size_t off1,
|
||
|
|
* bus_space_handle_t bsh2, bus_size_t off2,
|
||
|
|
* bus_size_t count));
|
||
|
|
*
|
||
|
|
* Copy `count' 1, 2, 4, or 8 byte values from bus space starting
|
||
|
|
* at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define __HP300_copy_region_N(BYTES) \
|
||
|
|
static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
|
||
|
|
__P((bus_space_tag_t, \
|
||
|
|
bus_space_handle_t bsh1, bus_size_t off1, \
|
||
|
|
bus_space_handle_t bsh2, bus_size_t off2, \
|
||
|
|
bus_size_t count)); \
|
||
|
|
\
|
||
|
|
static __inline void \
|
||
|
|
__CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c) \
|
||
|
|
bus_space_tag_t t; \
|
||
|
|
bus_space_handle_t h1, h2; \
|
||
|
|
bus_size_t o1, o2, c; \
|
||
|
|
{ \
|
||
|
|
bus_size_t o; \
|
||
|
|
\
|
||
|
|
if ((h1 + o1) >= (h2 + o2)) { \
|
||
|
|
/* src after dest: copy forward */ \
|
||
|
|
for (o = 0; c != 0; c--, o += BYTES) \
|
||
|
|
__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
|
||
|
|
__CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
|
||
|
|
} else { \
|
||
|
|
/* dest after src: copy backwards */ \
|
||
|
|
for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
|
||
|
|
__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
|
||
|
|
__CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
|
||
|
|
} \
|
||
|
|
}
|
||
|
|
__HP300_copy_region_N(1)
|
||
|
|
__HP300_copy_region_N(2)
|
||
|
|
__HP300_copy_region_N(4)
|
||
|
|
#if 0 /* Cause a link error for bus_space_copy_region_8 */
|
||
|
|
#define bus_space_copy_region_8 \
|
||
|
|
!!! bus_space_copy_region_8 unimplemented !!!
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#undef __HP300_copy_region_N
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Bus read/write barrier methods.
|
||
|
|
*
|
||
|
|
* void bus_space_barrier __P((bus_space_tag_t tag,
|
||
|
|
* bus_space_handle_t bsh, bus_size_t offset,
|
||
|
|
* bus_size_t len, int flags));
|
||
|
|
*
|
||
|
|
* Note: the 680x0 does not currently require barriers, but we must
|
||
|
|
* provide the flags to MI code.
|
||
|
|
*/
|
||
|
|
#define bus_space_barrier(t, h, o, l, f) \
|
||
|
|
((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
|
||
|
|
#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
|
||
|
|
#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
|
||
|
|
|
||
|
|
#endif /* _HP300_BUS_H_ */
|