NetBSD/sys/arch/ofppc/include/cpu.h

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/* $NetBSD: cpu.h,v 1.24 2011/06/20 06:35:40 matt Exp $ */
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/*
* Copyright (C) 1995-1997 Wolfgang Solfrank.
* Copyright (C) 1995-1997 TooLs GmbH.
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* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by TooLs GmbH.
* 4. The name of TooLs GmbH may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _OFPPC_CPU_H_
#define _OFPPC_CPU_H_
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#if defined(_KERNEL) && !defined(_MODULE)
SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes: Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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#define CPU_MAXNUM 16
extern char bootpath[];
#endif /* _KERNEL */
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#include <powerpc/cpu.h>
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#endif /* _OFPPC_CPU_H_ */