1996-08-27 20:28:08 +04:00
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/* $NetBSD: apecs_lca_bus_mem.c,v 1.5 1996/08/27 16:29:24 cgd Exp $ */
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1996-04-12 10:07:05 +04:00
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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1996-04-12 08:36:12 +04:00
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#include <sys/param.h>
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1996-08-27 20:28:08 +04:00
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#include <sys/systm.h>
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1996-04-12 08:36:12 +04:00
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#include <sys/malloc.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <alpha/pci/apecsreg.h>
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#include <alpha/pci/lcareg.h>
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#if (APECS_PCI_SPARSE != LCA_PCI_SPARSE) || (APECS_PCI_DENSE != LCA_PCI_DENSE)
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#error Memory addresses do not match up?
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#endif
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1996-06-10 04:01:09 +04:00
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#define CHIP apecs_lca
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1996-06-12 01:25:25 +04:00
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/* Dense region 1 */
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#define CHIP_D_MEM_W1_START(v) 0x00000000
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#define CHIP_D_MEM_W1_END(v) 0xffffffff
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#define CHIP_D_MEM_W1_BASE(v) APECS_PCI_DENSE
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#define CHIP_D_MEM_W1_MASK(v) 0xffffffff
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1996-06-10 04:01:09 +04:00
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/* Sparse region 1 */
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#define CHIP_S_MEM_W1_START(v) 0x00000000
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#define CHIP_S_MEM_W1_END(v) 0x00ffffff
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#define CHIP_S_MEM_W1_BASE(v) APECS_PCI_SPARSE
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#define CHIP_S_MEM_W1_MASK(v) 0x07ffffff
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/* Sparse region 2 */
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#define CHIP_S_MEM_W2_START(v) 0x01000000 /* XXX from HAXR1 */
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#define CHIP_S_MEM_W2_END(v) 0xfeffffff /* XXX from HAXR1 */
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#define CHIP_S_MEM_W2_BASE(v) APECS_PCI_SPARSE
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#define CHIP_S_MEM_W2_MASK(v) 0x07ffffff
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1996-04-12 08:36:12 +04:00
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#include "pcs_bus_mem_common.c"
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