1996-05-08 09:55:04 +04:00
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/* $NetBSD: wdscreg.h,v 1.2 1996/05/08 05:55:10 thorpej Exp $ */
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1996-04-18 22:30:49 +04:00
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/*
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* Copyright (c) 1994 Christian E. Hopps
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)dmareg.h
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*/
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#ifndef _MVME68K_DEV_WDSCREG_H_
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#define _MVME68K_DEV_WDSCREG_H_
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#define DMAC_CSR_ENABLE (1 << 0) /* Enable the DMAC */
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#define DMAC_CSR_TABLE (1 << 1) /* Select Table Mode */
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#define DMAC_CSR_WRITE (1 << 2) /* Write data from RAM to SCSI */
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#define DMAC_CSR_TBUSERR (1 << 3) /* Bus error during table walk */
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#define DMAC_CSR_DBUSERR (1 << 4) /* Bus error during data xfer */
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#define DMAC_CSR_TSIZE (1 << 5) /* Table addr. not in 32 bits */
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#define DMAC_CSR_8BITS (1 << 6) /* Non-8 bit handshake */
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#define DMAC_CSR_DONE (1 << 7) /* Transfer complete, or error */
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#define DMAC_SR_HOLDING 0x0f /* Data holding state */
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#define DMAC_SR_INCREMENT 0xf0 /* Increment value */
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#endif
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