NetBSD/share/man/man4/ath.4

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.\" $NetBSD: ath.4,v 1.11 2006/09/12 15:00:29 dillo Exp $
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.\" Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting
.\" All rights reserved.
.\""
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.\"
.\" Note: This man page was taken by Perry Metzger almost entirely
.\" from the "ath" and "ath_hal" man pages in FreeBSD. I claim no
.\" copyright because there was nearly no original work performed in
.\" doing so. Maintainers should check the FreeBSD originals for
.\" updates against the following two revisions and incorporate them
.\" if needed:
.\"
.\" $FreeBSD: /repoman/r/ncvs/src/share/man/man4/ath.4,v 1.16 2004/02/18 08:30:08 maxim Exp $
.\" parts from $FreeBSD: /repoman/r/ncvs/src/share/man/man4/ath_hal.4,v 1.7 2004/01/07 20:49:51 blackend Exp $
.\"
.Dd November 1, 2005
.Dt ATH 4
.Os
.Sh NAME
.Nm ath
.Nd Atheros IEEE 802.11 driver
.Sh SYNOPSIS
.Cd "ath* at pci? dev ? function ?"
.Cd "ath* at cardbus? function ?"
.Sh DESCRIPTION
The
.Nm
driver provides support for wireless network adapters based on
the Atheros AR5210, AR5211, and AR5212 chips.
Chip-specific support is provided by the Atheros Hardware Access Layer
(HAL), which is currently available only in binary form for selected
architectures.
.Pp
Supported features include 802.11 and 802.3 frames, power management, BSS,
IBSS, and host-based access point operation modes.
All host/device interaction is via DMA.
.Pp
The
.Nm
driver encapsulates all IP and ARP traffic as 802.11 frames, however
it can receive either 802.11 or 802.3 frames.
Transmit speed and operating mode is selectable
depending on your hardware.
.Pp
AR5210-based devices support 802.11a operation with transmit speeds
of 6 Mbps, 9 Mbps, 12 Mbps, 18 Mbps, 24 Mbps, 36 Mbps, 48 Mbps, and 54 Mbps.
.Pp
AR5211-based devices support 802.11a and 802.11b operation with transmit
speeds as above for 802.11a operation and
1Mbps, 2Mbps, 5.5 Mbps and 11Mbps for 802.11b operation.
.Pp
AR5212-based devices support 802.11a, 802.11b, and 802.11g operation
with transmit speeds appropriate to each.
.Pp
All chips also support an Atheros Turbo Mode (TM) that operates in the
802.11a frequency range with 2x the transmit speeds.
(This mode is, however, only interoperable with other Atheros-based devices.)
.Pp
The actual transmit speed used is dependent on signal quality and the
.Dq rate control
algorithm employed by the driver.
All chips support WEP encryption.
AR5211 and AR5212 support the AES, TKIP, and Michael cryptographic
operations required for WPA but at this time the driver does not support them.
To enable encryption, use
.Xr ifconfig 8 .
.Pp
By default, the
.Nm
driver configures the card for BSS operation (aka infrastructure
mode).
This mode requires the use of an access point (base station).
.Pp
The
.Nm
driver also supports the standard IBSS point-to-point mode
where stations can communicate amongst themselves without the
aid of an access point.
.Pp
The driver may also be configured to operate in hostap mode.
In this mode a host may function as an access point (base station).
Access points are different than operating in IBSS mode.
They operate in BSS mode.
They allow for easier roaming and bridge all ethernet traffic such
that machines connected via an access point appear to be on the local
ethernet segment.
.Pp
For more information on configuring this device, see
.Xr ifconfig 8 .
.Pp
Devices supported by the
.Nm
driver come in either CardBus or mini-PCI packages.
Wireless cards in CardBus slots may be inserted and ejected on the fly.
.Pp
The following cards are among those supported by the
.Nm
driver:
.Pp
.Bl -column -compact "Samsung SWL-5200N" "AR5212" "CardBus" "a/b/g"
.Em "Card Chip Bus Standard"
Airlink AWLH4030 AR5212 PCI b/g
Aztech WL830PC AR5212 CardBus b/g
Belkin F6D3000 AR5212 PCI a/b/g
D-Link DWL-A650 AR5210 CardBus a
D-Link DWL-AB650 AR5211 CardBus a/b
D-Link DWL-A520 AR5210 PCI a
D-Link DWL-AG520 AR5212 PCI a/b/g
D-Link DWL-AG650 AR5212 CardBus a/b/g
D-Link DWL-G520 AR5212 PCI b/g
D-Link DWL-G650B AR5212 CardBus b/g
Elecom LD-WL54AG AR5212 CardBus a/b/g
Elecom LD-WL54 AR5211 CardBus a
Fujitsu E5454 AR5212 CardBus a/b/g
Fujitsu FMV-JW481 AR5212 CardBus a/b/g
Fujitsu E5454 AR5212 CardBus a/b/g
HP NC4000 AR5212 PCI a/b/g
I/O Data WN-AB AR5212 CardBus a/b
I/O Data WN-AG AR5212 CardBus a/b/g
I/O Data WN-A54 AR5212 CardBus a
Linksys WMP55AG AR5212 PCI a/b/g
Linksys WPC51AB AR5211 CardBus a/b
Linksys WPC55AG AR5212 CardBus a/b/g
NEC PA-WL/54AG AR5212 CardBus a/b/g
Netgear WAG311 AR5212 PCI a/b/g
Netgear WAB501 AR5211 CardBus a/b
Netgear WAG511 AR5212 CardBus a/b/g
Netgear WG311 AR5212 PCI b/g
Netgear WG511T AR5212 CardBus b/g
Orinoco 8480 AR5212 CardBus a/b/g
Orinoco 8470WD AR5212 CardBus a/b/g
Proxim Skyline 4030 AR5210 CardBus a
Proxim Skyline 4032 AR5210 PCI a
Samsung SWL-5200N AR5212 CardBus a/b/g
SMC SMC2735W AR5210 CardBus a
Sony PCWA-C700 AR5212 CardBus a/b
Sony PCWA-C300S AR5212 CardBus b/g
Sony PCWA-C500 AR5210 CardBus a
3Com 3CRPAG175 AR5212 CardBus a/b/g
.El
.Pp
An up to date list can be found at
.Pa http://customerproducts.atheros.com/customerproducts .
.Sh DIAGNOSTICS
.Bl -diag
.It "ath%d: unable to attach hardware; HAL status %u"
The Atheros Hardware Access Layer was unable to configure the hardware
as requested.
The status code is explained in the HAL include file
.Pa contrib/sys/dev/ic/athhal.h .
.It "ath%d: failed to allocate descriptors: %d"
The driver was unable to allocate contiguous memory for the transmit
and receive descriptors.
This usually indicates system memory is scarce and/or fragmented.
.It "ath%d: unable to setup a data xmit queue!"
The request to the HAL to setup the transmit queue for normal
data frames failed.
This should not happen.
.It "ath%d: unable to setup a beacon xmit queue!"
The request to the HAL to setup the transmit queue for 802.11 beacon frames
2004-10-04 23:12:52 +04:00
failed.
This should not happen.
.It "ath%d: 802.11 address: %s"
The MAC address programmed in the EEPROM is displayed.
.It "ath%d: hardware error; resetting"
An unrecoverable error in the hardware occurred.
Errors of this sort include unrecoverable DMA errors.
The driver will reset the hardware and continue.
.It "ath%d: rx FIFO overrun; resetting"
The receive FIFO in the hardware overflowed before the data could be
transferred to the host.
This typically occurs because the hardware ran short of receive
descriptors and had no place to transfer received data.
The driver will reset the hardware and continue.
.It "ath%d: unable to reset hardware; hal status %u"
The Atheros Hardware Access Layer was unable to reset the hardware
as requested.
The status code is explained in the HAL include file
.Pa contrib/sys/dev/ic/athhal.h .
This should not happen.
.It "ath%d: unable to start recv logic"
The driver was unable to restart frame reception.
This should not happen.
.It "ath%d: device timeout"
A frame dispatched to the hardware for transmission did not complete in time.
The driver will reset the hardware and continue.
This should not happen.
.It "ath%d: bogus xmit rate 0x%x"
An invalid transmit rate was specified for an outgoing frame.
The frame is discarded.
This should not happen.
.It "ath%d: ath_chan_set: unable to reset channel %u (%u Mhz)"
The Atheros Hardware Access Layer was unable to reset the hardware
when switching channels during scanning.
This should not happen.
.It "ath%d: unable to allocate channel table"
The driver was unable to allocate memory for the table used to hold
the set of available channels.
.It "ath%d: unable to collect channel list from hal"
A problem occurred while querying the HAL to find the set of available
channels for the device.
This should not happen.
.It "ath%d: %s: %dM -\*[Gt] %dM (%d ok, %d err, %d retr)"
The driver's rate control algorithm changed the current rate for transmitting
frames.
This message is temporarily enabled for normal use to help in diagnosing
and improving the rate control algorithm.
The message indicates the new and old transmit rates and the statistics
it used to decide on this change.
.It "ath%d: failed to enable memory mapping"
The driver was unable to enable memory-mapped I/O to the PCI device registers.
This should not happen.
.It "ath%d: failed to enable bus mastering"
The driver was unable to enable the device as a PCI bus master for doing DMA.
This should not happen.
.It "ath%d: cannot map register space"
The driver was unable to map the device registers into the host address space.
This should not happen.
.It "ath%d: could not map interrupt"
The driver was unable to allocate an IRQ for the device interrupt.
This should not happen.
.It "ath%d: could not establish interrupt"
The driver was unable to install the device interrupt handler.
This should not happen.
.El
.Sh SEE ALSO
.Xr arp 4 ,
.Xr cardbus 4 ,
.Xr ifmedia 4 ,
.Xr netintro 4 ,
.Xr pci 4 ,
.Xr ifconfig 8
.Sh HISTORY
The
.Nm
device driver first appeared in
.Fx 5.2 .
It was ported to
.Nx 2.0 .
.Sh AUTHORS
.An -nosplit
The
.Nm
driver was originally written by
.An Sam Leffler ,
and was ported to
.Nx
by
.An David Young .
.Sh CAVEATS
Different regulatory domains have different default channels for adhoc
mode.
See
.Xr ifconfig 8
for information on how to change the channel.
Different regulatory domains may not be able to communicate with each
other with 802.11a as different regulatory domains do not necessarily
have overlapping channels.
.Pp
Revision A1 of the D-LINK DWL-G520 and DWL-G650 are based on an
Intersil PrismGT chip and are not supported by this driver.
.Pp
Revision v3 of the Netgear WG311 is based on a Marvell Libertas
88W8335 and is not supported by tis driver.
.Pp
The HAL module is constructed from a binary component and
operating system-dependent source code.
Redistribution and use in source and binary forms, without
modification, are permitted provided that the conditions
set forth in
.Pa src/contrib/sys/dev/ic/athhal-COPYRIGHT
are observed.
.Sh BUGS
Performance in lossy environments is suboptimal.
The algorithm used to select the rate for transmitted packets is
very simplistic.
There is no software retransmit; only hardware retransmit is used.
Contributors are encouraged to replace the existing rate control algorithm
with a better one (hint: all the information needed is available to the driver).
.Pp
The driver does not fully enable power-save operation of the chip;
consequently power use is suboptimal.