1996-05-17 00:31:28 +04:00
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/* $NetBSD: esp.c,v 1.46 1996/05/16 20:31:28 pk Exp $ */
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1994-11-20 23:51:32 +03:00
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1993-10-02 13:22:00 +03:00
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/*
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1994-09-18 03:48:32 +04:00
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* Copyright (c) 1994 Peter Galbavy
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1995-11-28 23:49:12 +03:00
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* Copyright (c) 1995 Paul Kranenburg
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1994-09-18 03:48:32 +04:00
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* All rights reserved.
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1993-10-02 13:22:00 +03:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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1994-09-18 03:48:32 +04:00
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* This product includes software developed by Peter Galbavy
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1996-04-01 02:38:29 +04:00
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* 4. The name of the author may not be used to endorse or promote products
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1994-09-18 03:48:32 +04:00
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* derived from this software without specific prior written permission.
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1993-10-02 13:22:00 +03:00
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*
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1994-09-18 03:48:32 +04:00
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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1993-10-02 13:22:00 +03:00
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*/
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/*
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1994-09-18 03:48:32 +04:00
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* Based on aic6360 by Jarle Greipsland
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*
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* Acknowledgements: Many of the algorithms used in this driver are
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* inspired by the work of Julian Elischer (julian@tfs.com) and
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* Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
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1993-10-02 13:22:00 +03:00
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*/
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1994-09-18 03:48:32 +04:00
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#include <sys/types.h>
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1993-10-02 13:22:00 +03:00
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#include <sys/param.h>
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1994-09-18 03:48:32 +04:00
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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1993-10-02 13:22:00 +03:00
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#include <sys/device.h>
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1994-09-18 03:48:32 +04:00
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/queue.h>
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1993-10-02 13:22:00 +03:00
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1994-09-18 03:48:32 +04:00
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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1995-11-28 23:49:12 +03:00
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#include <scsi/scsi_message.h>
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1993-10-02 13:22:00 +03:00
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#include <machine/cpu.h>
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1994-09-18 03:48:32 +04:00
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#include <machine/autoconf.h>
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#include <sparc/dev/sbusvar.h>
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#include <sparc/dev/dmareg.h>
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#include <sparc/dev/dmavar.h>
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#include <sparc/dev/espreg.h>
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#include <sparc/dev/espvar.h>
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1996-04-01 02:38:29 +04:00
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int esp_debug = 0; /*ESP_SHOWPHASE|ESP_SHOWMISC|ESP_SHOWTRAC|ESP_SHOWCMDS;*/
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1994-09-18 03:48:32 +04:00
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1995-06-02 17:43:30 +04:00
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/*static*/ void espattach __P((struct device *, struct device *, void *));
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/*static*/ int espmatch __P((struct device *, void *, void *));
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1995-12-19 02:58:31 +03:00
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/*static*/ int espprint __P((void *, char *));
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1995-06-02 17:43:30 +04:00
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/*static*/ u_int esp_adapter_info __P((struct esp_softc *));
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/*static*/ void espreadregs __P((struct esp_softc *));
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/*static*/ void espselect __P((struct esp_softc *,
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1995-11-28 23:49:12 +03:00
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u_char, u_char, u_char *, u_char));
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1995-06-02 17:43:30 +04:00
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/*static*/ void esp_scsi_reset __P((struct esp_softc *));
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/*static*/ void esp_reset __P((struct esp_softc *));
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/*static*/ void esp_init __P((struct esp_softc *, int));
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/*static*/ int esp_scsi_cmd __P((struct scsi_xfer *));
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/*static*/ int esp_poll __P((struct esp_softc *, struct ecb *));
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/*static*/ void esp_sched __P((struct esp_softc *));
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/*static*/ void esp_done __P((struct ecb *));
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/*static*/ void esp_msgin __P((struct esp_softc *));
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/*static*/ void esp_msgout __P((struct esp_softc *));
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/*static*/ int espintr __P((struct esp_softc *));
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/*static*/ void esp_timeout __P((void *arg));
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1995-10-24 19:03:57 +03:00
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/*static*/ void esp_abort __P((struct esp_softc *, struct ecb *));
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1996-03-14 22:44:30 +03:00
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int esp_stp2cpb __P((struct esp_softc *, int));
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int esp_cpb2stp __P((struct esp_softc *, int));
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1994-09-18 03:48:32 +04:00
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/* Linkup to the rest of the kernel */
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1996-03-17 05:00:30 +03:00
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struct cfattach esp_ca = {
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sizeof(struct esp_softc), espmatch, espattach
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};
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struct cfdriver esp_cd = {
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NULL, "esp", DV_DULL
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1993-10-02 13:22:00 +03:00
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};
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1994-09-18 03:48:32 +04:00
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struct scsi_adapter esp_switch = {
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esp_scsi_cmd,
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1995-07-24 11:33:32 +04:00
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minphys, /* no max at this level; handled by DMA code */
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1995-01-02 23:21:01 +03:00
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NULL,
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NULL,
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1993-10-02 13:22:00 +03:00
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};
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1994-09-18 03:48:32 +04:00
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struct scsi_device esp_dev = {
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NULL, /* Use default error handler */
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NULL, /* have a queue, served by this */
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NULL, /* have no async handler */
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NULL, /* Use default 'done' routine */
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};
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1993-10-02 13:22:00 +03:00
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1995-09-15 00:38:53 +04:00
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int
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espprint(aux, name)
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void *aux;
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char *name;
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{
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if (name != NULL)
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printf("%s: scsibus ", name);
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return UNCONF;
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}
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1994-10-03 00:59:56 +03:00
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int
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1994-11-23 10:02:02 +03:00
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espmatch(parent, vcf, aux)
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1994-10-03 00:59:56 +03:00
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struct device *parent;
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1994-11-23 10:02:02 +03:00
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void *vcf, *aux;
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1994-10-03 00:59:56 +03:00
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{
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1994-11-23 10:02:02 +03:00
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struct cfdata *cf = vcf;
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1994-10-03 00:59:56 +03:00
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register struct confargs *ca = aux;
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register struct romaux *ra = &ca->ca_ra;
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if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
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return (0);
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1994-10-15 08:48:47 +03:00
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if (ca->ca_bustype == BUS_SBUS)
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return (1);
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ra->ra_len = NBPG;
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return (probeget(ra->ra_vaddr, 1) != -1);
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1994-10-03 00:59:56 +03:00
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}
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1993-10-02 13:22:00 +03:00
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/*
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1994-09-18 03:48:32 +04:00
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* Attach this instance, and then all the sub-devices
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1993-10-02 13:22:00 +03:00
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*/
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void
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1994-09-18 03:48:32 +04:00
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espattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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1993-10-02 13:22:00 +03:00
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{
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1994-09-18 03:48:32 +04:00
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register struct confargs *ca = aux;
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struct esp_softc *sc = (void *)self;
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struct bootpath *bp;
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1996-05-17 00:31:28 +04:00
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int dmachild = strncmp(parent->dv_xname, "sbus", 4) != 0;
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1994-09-18 03:48:32 +04:00
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/*
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* Make sure things are sane. I don't know if this is ever
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* necessary, but it seem to be in all of Torek's code.
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*/
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if (ca->ca_ra.ra_nintr != 1) {
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printf(": expected 1 interrupt, got %d\n", ca->ca_ra.ra_nintr);
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1993-10-02 13:22:00 +03:00
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return;
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}
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1994-09-18 03:48:32 +04:00
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sc->sc_pri = ca->ca_ra.ra_intr[0].int_pri;
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printf(" pri %d", sc->sc_pri);
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1993-10-02 13:22:00 +03:00
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/*
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1994-09-18 03:48:32 +04:00
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* Map my registers in, if they aren't already in virtual
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* address space.
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1993-10-02 13:22:00 +03:00
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*/
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1994-09-18 03:48:32 +04:00
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if (ca->ca_ra.ra_vaddr)
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1995-12-19 02:58:31 +03:00
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sc->sc_reg = (volatile u_char *) ca->ca_ra.ra_vaddr;
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1994-09-18 03:48:32 +04:00
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else {
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1995-12-19 02:58:31 +03:00
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sc->sc_reg = (volatile u_char *)
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1995-12-11 15:43:14 +03:00
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mapiodev(ca->ca_ra.ra_reg, 0, ca->ca_ra.ra_len, ca->ca_bustype);
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1994-09-18 03:48:32 +04:00
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}
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/* Other settings */
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1994-10-03 00:59:56 +03:00
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sc->sc_node = ca->ca_ra.ra_node;
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if (ca->ca_bustype == BUS_SBUS) {
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sc->sc_id = getpropint(sc->sc_node, "initiator-id", 7);
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sc->sc_freq = getpropint(sc->sc_node, "clock-frequency", -1);
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} else {
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sc->sc_id = 7;
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sc->sc_freq = 24000000;
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}
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1994-09-18 03:48:32 +04:00
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if (sc->sc_freq < 0)
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sc->sc_freq = ((struct sbus_softc *)
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sc->sc_dev.dv_parent)->sc_clockfreq;
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/* gimme Mhz */
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sc->sc_freq /= 1000000;
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1995-11-03 19:47:43 +03:00
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if (dmachild) {
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sc->sc_dma = (struct dma_softc *)parent;
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1994-09-18 03:48:32 +04:00
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sc->sc_dma->sc_esp = sc;
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1995-11-03 19:47:43 +03:00
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} else {
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/*
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* find the DMA by poking around the dma device structures
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*
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* What happens here is that if the dma driver has not been
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* configured, then this returns a NULL pointer. Then when the
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* dma actually gets configured, it does the opposing test, and
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* if the sc->sc_esp field in it's softc is NULL, then tries to
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* find the matching esp driver.
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*
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*/
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1995-11-28 23:49:12 +03:00
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sc->sc_dma = (struct dma_softc *)
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getdevunit("dma", sc->sc_dev.dv_unit);
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1995-11-03 19:47:43 +03:00
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/*
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* and a back pointer to us, for DMA
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*/
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if (sc->sc_dma)
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sc->sc_dma->sc_esp = sc;
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}
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1994-09-18 03:48:32 +04:00
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/*
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* It is necessary to try to load the 2nd config register here,
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* to find out what rev the esp chip is, else the esp_reset
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* will not set up the defaults correctly.
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*/
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sc->sc_cfg1 = sc->sc_id | ESPCFG1_PARENB;
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1995-09-06 16:35:38 +04:00
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sc->sc_cfg2 = ESPCFG2_SCSI2 | ESPCFG2_RPE;
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1994-09-18 03:48:32 +04:00
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sc->sc_cfg3 = ESPCFG3_CDB;
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1995-12-19 02:58:31 +03:00
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ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2);
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1994-09-18 03:48:32 +04:00
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1995-12-19 02:58:31 +03:00
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if ((ESP_READ_REG(sc, ESP_CFG2) & ~ESPCFG2_RSVD) != (ESPCFG2_SCSI2 | ESPCFG2_RPE)) {
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1993-10-02 13:22:00 +03:00
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printf(": ESP100");
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1994-09-18 03:48:32 +04:00
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sc->sc_rev = ESP100;
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1993-10-02 13:22:00 +03:00
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} else {
|
1995-10-24 19:03:57 +03:00
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sc->sc_cfg2 = ESPCFG2_SCSI2 | ESPCFG2_FE;
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1995-12-19 02:58:31 +03:00
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ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2);
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1994-09-18 03:48:32 +04:00
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sc->sc_cfg3 = 0;
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1995-12-19 02:58:31 +03:00
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ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3);
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1995-10-24 19:03:57 +03:00
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sc->sc_cfg3 = (ESPCFG3_CDB | ESPCFG3_FCLK);
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1995-12-19 02:58:31 +03:00
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ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3);
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if (ESP_READ_REG(sc, ESP_CFG3) != (ESPCFG3_CDB | ESPCFG3_FCLK)) {
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1993-10-02 13:22:00 +03:00
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printf(": ESP100A");
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1994-09-18 03:48:32 +04:00
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sc->sc_rev = ESP100A;
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1993-10-02 13:22:00 +03:00
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} else {
|
1994-09-18 03:48:32 +04:00
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sc->sc_cfg3 = 0;
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1995-12-19 02:58:31 +03:00
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ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3);
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1994-09-18 03:48:32 +04:00
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printf(": ESP200");
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sc->sc_rev = ESP200;
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1993-10-02 13:22:00 +03:00
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}
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}
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1995-11-28 23:49:12 +03:00
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/*
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* This is the value used to start sync negotiations
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* Note that the ESP register "SYNCTP" is programmed
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* in "clocks per byte", and has a minimum value of 4.
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* The SCSI period used in negotiation is one-fourth
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* of the time (in nanoseconds) needed to transfer one byte.
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* Since the chip's clock is given in MHz, we have the following
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* formula: 4 * period = (1000 / freq) * 4
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*/
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sc->sc_minsync = 1000 / sc->sc_freq;
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/*
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* Alas, we must now modify the value a bit, because it's
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* only valid when can switch on FASTCLK and FASTSCSI bits
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* in config register 3...
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*/
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|
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|
switch (sc->sc_rev) {
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|
|
case ESP100:
|
1996-02-12 18:59:51 +03:00
|
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|
sc->sc_maxxfer = 64 * 1024;
|
1995-11-29 01:49:31 +03:00
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|
sc->sc_minsync = 0; /* No synch on old chip? */
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|
|
|
break;
|
1995-11-28 23:49:12 +03:00
|
|
|
case ESP100A:
|
1996-02-12 18:59:51 +03:00
|
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|
sc->sc_maxxfer = 64 * 1024;
|
1995-11-28 23:49:12 +03:00
|
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|
sc->sc_minsync = esp_cpb2stp(sc, 5); /* Min clocks/byte is 5 */
|
|
|
|
break;
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|
|
|
case ESP200:
|
1996-02-12 18:59:51 +03:00
|
|
|
sc->sc_maxxfer = 16 * 1024 * 1024;
|
1995-11-28 23:49:12 +03:00
|
|
|
/* XXX - do actually set FAST* bits */
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->sc_ccf = FREQTOCCF(sc->sc_freq);
|
|
|
|
|
|
|
|
/* The value *must not* be == 1. Make it 2 */
|
|
|
|
if (sc->sc_ccf == 1)
|
|
|
|
sc->sc_ccf = 2;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The recommended timeout is 250ms. This register is loaded
|
|
|
|
* with a value calculated as follows, from the docs:
|
|
|
|
*
|
|
|
|
* (timout period) x (CLK frequency)
|
|
|
|
* reg = -------------------------------------
|
|
|
|
* 8192 x (Clock Conversion Factor)
|
|
|
|
*
|
|
|
|
* Since CCF has a linear relation to CLK, this generally computes
|
|
|
|
* to the constant of 153.
|
|
|
|
*/
|
|
|
|
sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
|
|
|
|
|
|
|
|
/* CCF register only has 3 bits; 0 is actually 8 */
|
|
|
|
sc->sc_ccf &= 7;
|
|
|
|
|
|
|
|
/* Reset state & bus */
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_state = 0;
|
1994-11-05 12:35:54 +03:00
|
|
|
esp_init(sc, 1);
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
printf(" %dMhz, target %d\n", sc->sc_freq, sc->sc_id);
|
|
|
|
|
|
|
|
/* add me to the sbus structures */
|
|
|
|
sc->sc_sd.sd_reset = (void *) esp_reset;
|
1994-10-15 11:57:20 +03:00
|
|
|
#if defined(SUN4C) || defined(SUN4M)
|
1995-11-03 19:47:43 +03:00
|
|
|
if (ca->ca_bustype == BUS_SBUS) {
|
|
|
|
if (dmachild)
|
|
|
|
sbus_establish(&sc->sc_sd, sc->sc_dev.dv_parent);
|
|
|
|
else
|
|
|
|
sbus_establish(&sc->sc_sd, &sc->sc_dev);
|
|
|
|
}
|
1994-10-15 11:57:20 +03:00
|
|
|
#endif /* SUN4C || SUN4M */
|
1994-09-18 03:48:32 +04:00
|
|
|
|
|
|
|
/* and the interuppts */
|
|
|
|
sc->sc_ih.ih_fun = (void *) espintr;
|
1993-10-02 13:22:00 +03:00
|
|
|
sc->sc_ih.ih_arg = sc;
|
1994-09-18 03:48:32 +04:00
|
|
|
intr_establish(sc->sc_pri, &sc->sc_ih);
|
1994-05-27 06:38:15 +04:00
|
|
|
evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* fill in the prototype scsi_link.
|
|
|
|
*/
|
|
|
|
sc->sc_link.adapter_softc = sc;
|
1995-01-02 23:21:01 +03:00
|
|
|
sc->sc_link.adapter_target = sc->sc_id;
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_link.adapter = &esp_switch;
|
|
|
|
sc->sc_link.device = &esp_dev;
|
1995-01-02 23:21:01 +03:00
|
|
|
sc->sc_link.openings = 2;
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* If the boot path is "esp" at the moment and it's me, then
|
|
|
|
* walk our pointer to the sub-device, ready for the config
|
|
|
|
* below.
|
|
|
|
*/
|
|
|
|
bp = ca->ca_ra.ra_bp;
|
1994-10-03 00:59:56 +03:00
|
|
|
switch (ca->ca_bustype) {
|
|
|
|
case BUS_SBUS:
|
|
|
|
if (bp != NULL && strcmp(bp->name, "esp") == 0 &&
|
|
|
|
SAME_ESP(sc, bp, ca))
|
1995-08-18 14:43:46 +04:00
|
|
|
bootpath_store(1, bp + 1);
|
1994-10-03 00:59:56 +03:00
|
|
|
break;
|
|
|
|
default:
|
1995-08-18 14:43:46 +04:00
|
|
|
if (bp != NULL && strcmp(bp->name, "esp") == 0 &&
|
|
|
|
bp->val[0] == -1 && bp->val[1] == sc->sc_dev.dv_unit)
|
|
|
|
bootpath_store(1, bp + 1);
|
1994-10-03 00:59:56 +03:00
|
|
|
break;
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Now try to attach all the sub-devices
|
|
|
|
*/
|
1995-09-15 00:38:53 +04:00
|
|
|
config_found(self, &sc->sc_link, espprint);
|
1995-08-18 14:43:46 +04:00
|
|
|
|
|
|
|
bootpath_store(1, NULL);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* This is the generic esp reset function. It does not reset the SCSI bus,
|
|
|
|
* only this controllers, but kills any on-going commands, and also stops
|
|
|
|
* and resets the DMA.
|
|
|
|
*
|
|
|
|
* After reset, registers are loaded with the defaults from the attach
|
|
|
|
* routine above.
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1996-04-01 02:38:29 +04:00
|
|
|
void
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_reset(sc)
|
|
|
|
struct esp_softc *sc;
|
1993-10-02 13:22:00 +03:00
|
|
|
{
|
1994-09-18 03:48:32 +04:00
|
|
|
|
|
|
|
/* reset DMA first */
|
|
|
|
DMA_RESET(sc->sc_dma);
|
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
/* reset SCSI chip */
|
|
|
|
ESPCMD(sc, ESPCMD_RSTCHIP);
|
1994-09-18 03:48:32 +04:00
|
|
|
ESPCMD(sc, ESPCMD_NOP);
|
|
|
|
DELAY(500);
|
|
|
|
|
|
|
|
/* do these backwards, and fall through */
|
|
|
|
switch (sc->sc_rev) {
|
|
|
|
case ESP200:
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_CFG3, sc->sc_cfg3);
|
1994-09-18 03:48:32 +04:00
|
|
|
case ESP100A:
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_CFG2, sc->sc_cfg2);
|
1994-09-18 03:48:32 +04:00
|
|
|
case ESP100:
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_CFG1, sc->sc_cfg1);
|
|
|
|
ESP_WRITE_REG(sc, ESP_CCF, sc->sc_ccf);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF, 0);
|
|
|
|
ESP_WRITE_REG(sc, ESP_TIMEOUT, sc->sc_timeout);
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf("%s: unknown revision code, assuming ESP100\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_CFG1, sc->sc_cfg1);
|
|
|
|
ESP_WRITE_REG(sc, ESP_CCF, sc->sc_ccf);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF, 0);
|
|
|
|
ESP_WRITE_REG(sc, ESP_TIMEOUT, sc->sc_timeout);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Reset the SCSI bus, but not the chip
|
1994-05-27 06:38:15 +04:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
void
|
|
|
|
esp_scsi_reset(sc)
|
|
|
|
struct esp_softc *sc;
|
|
|
|
{
|
1995-11-03 19:47:43 +03:00
|
|
|
/* stop DMA first, as the chip will return to Bus Free phase */
|
|
|
|
DMACSR(sc->sc_dma) &= ~D_EN_DMA;
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
printf("esp: resetting SCSI bus\n");
|
|
|
|
ESPCMD(sc, ESPCMD_RSTSCSI);
|
|
|
|
}
|
1994-05-27 06:38:15 +04:00
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Initialize esp state machine
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
void
|
1994-11-05 12:35:54 +03:00
|
|
|
esp_init(sc, doreset)
|
1993-10-02 13:22:00 +03:00
|
|
|
struct esp_softc *sc;
|
1994-11-05 12:35:54 +03:00
|
|
|
int doreset;
|
1993-10-02 13:22:00 +03:00
|
|
|
{
|
1994-09-18 03:48:32 +04:00
|
|
|
struct ecb *ecb;
|
|
|
|
int r;
|
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[ESP_INIT(%d)] ", doreset));
|
1994-11-05 12:35:54 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_state == 0) { /* First time through */
|
|
|
|
TAILQ_INIT(&sc->ready_list);
|
|
|
|
TAILQ_INIT(&sc->nexus_list);
|
|
|
|
TAILQ_INIT(&sc->free_list);
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_nexus = NULL;
|
1994-09-18 03:48:32 +04:00
|
|
|
ecb = sc->sc_ecb;
|
|
|
|
bzero(ecb, sizeof(sc->sc_ecb));
|
|
|
|
for (r = 0; r < sizeof(sc->sc_ecb) / sizeof(*ecb); r++) {
|
|
|
|
TAILQ_INSERT_TAIL(&sc->free_list, ecb, chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
ECB_SETQ(ecb, ECB_QFREE);
|
1994-09-18 03:48:32 +04:00
|
|
|
ecb++;
|
|
|
|
}
|
1994-11-21 04:56:38 +03:00
|
|
|
bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
|
1994-09-18 03:48:32 +04:00
|
|
|
} else {
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_flags |= ESP_ABORTING;
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_state = ESP_IDLE;
|
1996-02-12 18:59:51 +03:00
|
|
|
ecb = sc->sc_nexus;
|
|
|
|
if (ecb != NULL) {
|
|
|
|
ecb->xs->error = XS_TIMEOUT;
|
|
|
|
esp_done(ecb);
|
|
|
|
sc->sc_nexus = NULL;
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
while ((ecb = sc->nexus_list.tqh_first) != NULL) {
|
1995-12-01 04:00:55 +03:00
|
|
|
ecb->xs->error = XS_TIMEOUT;
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_done(ecb);
|
|
|
|
}
|
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* reset the chip to a known state
|
|
|
|
*/
|
|
|
|
esp_reset(sc);
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
|
|
|
|
for (r = 0; r < 8; r++) {
|
|
|
|
struct esp_tinfo *tp = &sc->sc_tinfo[r];
|
1996-05-17 00:31:28 +04:00
|
|
|
/* XXX - config flags per target: low bits: no reselect; high bits: no synch */
|
|
|
|
int fl = sc->sc_dev.dv_cfdata->cf_flags;
|
1994-11-05 12:35:54 +03:00
|
|
|
|
1996-05-17 00:31:28 +04:00
|
|
|
tp->flags = ((sc->sc_minsync && !(fl & (1<<(r+8))))
|
|
|
|
? T_NEGOTIATE : 0) |
|
|
|
|
((fl & (1<<r)) ? T_RSELECTOFF : 0) |
|
1996-02-12 18:59:51 +03:00
|
|
|
T_NEED_TO_RESET;
|
1994-09-18 03:48:32 +04:00
|
|
|
tp->period = sc->sc_minsync;
|
1995-11-29 01:49:31 +03:00
|
|
|
tp->offset = 0;
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_flags &= ~ESP_ABORTING;
|
|
|
|
|
|
|
|
if (doreset) {
|
|
|
|
sc->sc_state = ESP_SBR;
|
|
|
|
ESPCMD(sc, ESPCMD_RSTSCSI);
|
|
|
|
return;
|
|
|
|
}
|
1996-04-01 02:38:29 +04:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_state = ESP_IDLE;
|
1995-11-03 19:47:43 +03:00
|
|
|
esp_sched(sc);
|
1994-09-18 03:48:32 +04:00
|
|
|
return;
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
/*
|
|
|
|
* Read the ESP registers, and save their contents for later use.
|
|
|
|
* ESP_STAT, ESP_STEP & ESP_INTR are mostly zeroed out when reading
|
|
|
|
* ESP_INTR - so make sure it is the last read.
|
|
|
|
*
|
|
|
|
* I think that (from reading the docs) most bits in these registers
|
|
|
|
* only make sense when he DMA CSR has an interrupt showing. Call only
|
|
|
|
* if an interrupt is pending.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
espreadregs(sc)
|
|
|
|
struct esp_softc *sc;
|
|
|
|
{
|
|
|
|
|
1995-12-19 02:58:31 +03:00
|
|
|
sc->sc_espstat = ESP_READ_REG(sc, ESP_STAT);
|
1995-11-28 23:49:12 +03:00
|
|
|
/* Only the stepo bits are of interest */
|
1995-12-19 02:58:31 +03:00
|
|
|
sc->sc_espstep = ESP_READ_REG(sc, ESP_STEP) & ESPSTEP_MASK;
|
|
|
|
sc->sc_espintr = ESP_READ_REG(sc, ESP_INTR);
|
1995-11-28 23:49:12 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Determine the SCSI bus phase, return either a real SCSI bus phase
|
|
|
|
* or some pseudo phase we use to detect certain exceptions.
|
|
|
|
*/
|
|
|
|
|
|
|
|
sc->sc_phase = (sc->sc_espintr & ESPINTR_DIS)
|
|
|
|
? /* Disconnected */ BUSFREE_PHASE
|
|
|
|
: sc->sc_espstat & ESPSTAT_PHASE;
|
|
|
|
|
|
|
|
ESP_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ",
|
|
|
|
sc->sc_espintr, sc->sc_espstat, sc->sc_espstep));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Convert Synchronous Transfer Period to chip register Clock Per Byte value.
|
|
|
|
*/
|
1996-03-14 22:44:30 +03:00
|
|
|
int
|
1995-11-28 23:49:12 +03:00
|
|
|
esp_stp2cpb(sc, period)
|
|
|
|
struct esp_softc *sc;
|
1996-03-14 22:44:30 +03:00
|
|
|
int period;
|
1995-11-28 23:49:12 +03:00
|
|
|
{
|
|
|
|
int v;
|
|
|
|
v = (sc->sc_freq * period) / 250;
|
|
|
|
if (esp_cpb2stp(sc, v) < period)
|
|
|
|
/* Correct round-down error */
|
|
|
|
v++;
|
|
|
|
return v;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Convert chip register Clock Per Byte value to Synchronous Transfer Period.
|
|
|
|
*/
|
1996-03-14 22:44:30 +03:00
|
|
|
int
|
1995-11-28 23:49:12 +03:00
|
|
|
esp_cpb2stp(sc, cpb)
|
|
|
|
struct esp_softc *sc;
|
|
|
|
int cpb;
|
|
|
|
{
|
|
|
|
return ((250 * cpb) / sc->sc_freq);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Send a command to a target, set the driver state to ESP_SELECTING
|
|
|
|
* and let the caller take care of the rest.
|
|
|
|
*
|
|
|
|
* Keeping this as a function allows me to say that this may be done
|
|
|
|
* by DMA instead of programmed I/O soon.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
espselect(sc, target, lun, cmd, clen)
|
|
|
|
struct esp_softc *sc;
|
|
|
|
u_char target, lun;
|
|
|
|
u_char *cmd;
|
|
|
|
u_char clen;
|
|
|
|
{
|
|
|
|
struct esp_tinfo *ti = &sc->sc_tinfo[target];
|
|
|
|
int i;
|
|
|
|
|
|
|
|
ESP_TRACE(("[espselect(t%d,l%d,cmd:%x)] ", target, lun, *(u_char *)cmd));
|
|
|
|
|
|
|
|
/* new state ESP_SELECTING */
|
|
|
|
sc->sc_state = ESP_SELECTING;
|
|
|
|
|
1996-02-12 18:59:51 +03:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
/*
|
|
|
|
* The docs say the target register is never reset, and I
|
|
|
|
* can't think of a better place to set it
|
|
|
|
*/
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_SELID, target);
|
1995-11-28 23:49:12 +03:00
|
|
|
if (ti->flags & T_SYNCMODE) {
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF, ti->offset);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCTP, esp_stp2cpb(sc, ti->period));
|
1995-11-28 23:49:12 +03:00
|
|
|
} else {
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF, 0);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCTP, 0);
|
1995-11-28 23:49:12 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Who am I. This is where we tell the target that we are
|
|
|
|
* happy for it to disconnect etc.
|
|
|
|
*/
|
1996-05-17 00:31:28 +04:00
|
|
|
ESP_WRITE_REG(sc, ESP_FIFO,
|
|
|
|
MSG_IDENTIFY(lun, (ti->flags & T_RSELECTOFF)?0:1));
|
1995-11-28 23:49:12 +03:00
|
|
|
|
|
|
|
if (ti->flags & T_NEGOTIATE) {
|
|
|
|
/* Arbitrate, select and stop after IDENTIFY message */
|
|
|
|
ESPCMD(sc, ESPCMD_SELATNS);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Now the command into the FIFO */
|
|
|
|
for (i = 0; i < clen; i++)
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_FIFO, *cmd++);
|
1995-11-28 23:49:12 +03:00
|
|
|
|
|
|
|
/* And get the targets attention */
|
|
|
|
ESPCMD(sc, ESPCMD_SELATN);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
1993-10-02 13:22:00 +03:00
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* Start a SCSI-command
|
|
|
|
* This function is called by the higher level SCSI-driver to queue/run
|
|
|
|
* SCSI-commands.
|
|
|
|
*/
|
1996-04-01 02:38:29 +04:00
|
|
|
int
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_scsi_cmd(xs)
|
|
|
|
struct scsi_xfer *xs;
|
|
|
|
{
|
|
|
|
struct scsi_link *sc_link = xs->sc_link;
|
|
|
|
struct esp_softc *sc = sc_link->adapter_softc;
|
|
|
|
struct ecb *ecb;
|
|
|
|
int s, flags;
|
1996-04-01 02:38:29 +04:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[esp_scsi_cmd] "));
|
1996-04-01 02:38:29 +04:00
|
|
|
ESP_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
|
1994-09-18 03:48:32 +04:00
|
|
|
sc_link->target));
|
|
|
|
|
|
|
|
flags = xs->flags;
|
|
|
|
|
|
|
|
/* Get a esp command block */
|
1995-01-02 23:21:01 +03:00
|
|
|
s = splbio();
|
|
|
|
ecb = sc->free_list.tqh_first;
|
|
|
|
if (ecb) {
|
|
|
|
TAILQ_REMOVE(&sc->free_list, ecb, chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
ECB_SETQ(ecb, ECB_QNONE);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1995-01-02 23:21:01 +03:00
|
|
|
splx(s);
|
1996-04-01 02:38:29 +04:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
if (ecb == NULL) {
|
|
|
|
ESP_MISC(("TRY_AGAIN_LATER"));
|
|
|
|
return TRY_AGAIN_LATER;
|
1994-05-27 06:38:15 +04:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
|
|
|
|
/* Initialize ecb */
|
|
|
|
ecb->xs = xs;
|
|
|
|
bcopy(xs->cmd, &ecb->cmd, xs->cmdlen);
|
|
|
|
ecb->clen = xs->cmdlen;
|
|
|
|
ecb->daddr = xs->data;
|
|
|
|
ecb->dleft = xs->datalen;
|
|
|
|
ecb->stat = 0;
|
1996-02-12 18:59:51 +03:00
|
|
|
|
1995-01-02 23:21:01 +03:00
|
|
|
s = splbio();
|
1994-09-18 03:48:32 +04:00
|
|
|
TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
ECB_SETQ(ecb, ECB_QREADY);
|
1994-09-18 03:48:32 +04:00
|
|
|
timeout(esp_timeout, ecb, (xs->timeout*hz)/1000);
|
|
|
|
|
|
|
|
if (sc->sc_state == ESP_IDLE)
|
|
|
|
esp_sched(sc);
|
|
|
|
|
1995-01-02 23:21:01 +03:00
|
|
|
splx(s);
|
|
|
|
|
|
|
|
if (flags & SCSI_POLL) {
|
|
|
|
/* Not allowed to use interrupts, use polling instead */
|
|
|
|
return esp_poll(sc, ecb);
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
|
|
|
|
1995-01-02 23:21:01 +03:00
|
|
|
ESP_MISC(("SUCCESSFULLY_QUEUED"));
|
|
|
|
return SUCCESSFULLY_QUEUED;
|
|
|
|
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Used when interrupt driven I/O isn't allowed, e.g. during boot.
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
int
|
|
|
|
esp_poll(sc, ecb)
|
|
|
|
struct esp_softc *sc;
|
|
|
|
struct ecb *ecb;
|
1993-10-02 13:22:00 +03:00
|
|
|
{
|
1994-09-18 03:48:32 +04:00
|
|
|
struct scsi_xfer *xs = ecb->xs;
|
1995-10-24 19:03:57 +03:00
|
|
|
int count = xs->timeout * 100;
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[esp_poll] "));
|
1994-09-18 03:48:32 +04:00
|
|
|
while (count) {
|
|
|
|
if (DMA_ISINTR(sc->sc_dma)) {
|
|
|
|
espintr(sc);
|
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
#if alternatively
|
1995-12-19 02:58:31 +03:00
|
|
|
if (ESP_READ_REG(sc, ESP_STAT) & ESPSTAT_INT)
|
1995-11-03 19:47:43 +03:00
|
|
|
espintr(sc);
|
|
|
|
#endif
|
1994-09-18 03:48:32 +04:00
|
|
|
if (xs->flags & ITSDONE)
|
|
|
|
break;
|
1995-10-24 19:03:57 +03:00
|
|
|
DELAY(10);
|
1995-06-02 17:43:30 +04:00
|
|
|
if (sc->sc_state == ESP_IDLE) {
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[esp_poll: rescheduling] "));
|
1995-06-02 17:43:30 +04:00
|
|
|
esp_sched(sc);
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
count--;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (count == 0) {
|
|
|
|
ESP_MISC(("esp_poll: timeout"));
|
|
|
|
esp_timeout((caddr_t)ecb);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
|
|
|
|
return COMPLETE;
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1994-05-27 06:38:15 +04:00
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* LOW LEVEL SCSI UTILITIES
|
1994-05-27 06:38:15 +04:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1994-05-27 06:38:15 +04:00
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Schedule a scsi operation. This has now been pulled out of the interrupt
|
|
|
|
* handler so that we may call it from esp_scsi_cmd and esp_done. This may
|
|
|
|
* save us an unecessary interrupt just to get things going. Should only be
|
|
|
|
* called when state == ESP_IDLE and at bio pl.
|
1994-05-27 06:38:15 +04:00
|
|
|
*/
|
|
|
|
void
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_sched(sc)
|
|
|
|
struct esp_softc *sc;
|
1993-10-02 13:22:00 +03:00
|
|
|
{
|
1994-09-18 03:48:32 +04:00
|
|
|
struct scsi_link *sc_link;
|
|
|
|
struct ecb *ecb;
|
|
|
|
int t;
|
1996-04-01 02:38:29 +04:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[esp_sched] "));
|
|
|
|
if (sc->sc_state != ESP_IDLE)
|
|
|
|
panic("esp_sched: not IDLE (state=%d)", sc->sc_state);
|
|
|
|
|
|
|
|
if (sc->sc_flags & ESP_ABORTING)
|
|
|
|
return;
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-05-27 06:38:15 +04:00
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Find first ecb in ready queue that is for a target/lunit
|
|
|
|
* combinations that is not busy.
|
1994-05-27 06:38:15 +04:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
for (ecb = sc->ready_list.tqh_first; ecb; ecb = ecb->chain.tqe_next) {
|
|
|
|
sc_link = ecb->xs->sc_link;
|
|
|
|
t = sc_link->target;
|
|
|
|
if (!(sc->sc_tinfo[t].lubusy & (1 << sc_link->lun))) {
|
1995-06-02 17:43:30 +04:00
|
|
|
struct esp_tinfo *ti = &sc->sc_tinfo[t];
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1995-10-24 19:03:57 +03:00
|
|
|
if ((ecb->flags & ECB_QBITS) != ECB_QREADY)
|
|
|
|
panic("esp: busy entry on ready list");
|
1994-09-18 03:48:32 +04:00
|
|
|
TAILQ_REMOVE(&sc->ready_list, ecb, chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
ECB_SETQ(ecb, ECB_QNONE);
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_nexus = ecb;
|
|
|
|
sc->sc_flags = 0;
|
|
|
|
sc->sc_prevphase = INVALID_PHASE;
|
|
|
|
sc->sc_dp = ecb->daddr;
|
|
|
|
sc->sc_dleft = ecb->dleft;
|
|
|
|
ti->lubusy |= (1<<sc_link->lun);
|
1995-11-03 19:47:43 +03:00
|
|
|
/*XXX*/if (sc->sc_msgpriq) {
|
|
|
|
printf("esp: message queue not empty: %x!\n", sc->sc_msgpriq);
|
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
/*XXX*/sc->sc_msgpriq = sc->sc_msgout = 0;
|
|
|
|
espselect(sc, t, sc_link->lun,
|
|
|
|
(u_char *)&ecb->cmd, ecb->clen);
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
} else
|
|
|
|
ESP_MISC(("%d:%d busy\n", t, sc_link->lun));
|
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* POST PROCESSING OF SCSI_CMD (usually current)
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
void
|
|
|
|
esp_done(ecb)
|
|
|
|
struct ecb *ecb;
|
1994-05-27 06:38:15 +04:00
|
|
|
{
|
1994-09-18 03:48:32 +04:00
|
|
|
struct scsi_xfer *xs = ecb->xs;
|
|
|
|
struct scsi_link *sc_link = xs->sc_link;
|
|
|
|
struct esp_softc *sc = sc_link->adapter_softc;
|
1995-10-24 19:03:57 +03:00
|
|
|
struct esp_tinfo *ti = &sc->sc_tinfo[sc_link->target];
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[esp_done(error:%x)] ", xs->error));
|
1994-05-27 06:38:15 +04:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
untimeout(esp_timeout, ecb);
|
|
|
|
|
1993-10-02 13:22:00 +03:00
|
|
|
/*
|
1996-04-01 02:38:29 +04:00
|
|
|
* Now, if we've come here with no error code, i.e. we've kept the
|
1994-09-18 03:48:32 +04:00
|
|
|
* initial XS_NOERROR, and the status code signals that we should
|
1996-04-01 02:38:29 +04:00
|
|
|
* check sense, we'll need to set up a request sense cmd block and
|
|
|
|
* push the command back into the ready queue *before* any other
|
1994-09-18 03:48:32 +04:00
|
|
|
* commands for this target/lunit, else we lose the sense info.
|
|
|
|
* We don't support chk sense conditions for the request sense cmd.
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1995-10-24 19:03:57 +03:00
|
|
|
if (xs->error == XS_NOERROR) {
|
|
|
|
if ((ecb->flags & ECB_ABORTED) != 0) {
|
1995-12-01 04:00:55 +03:00
|
|
|
xs->error = XS_TIMEOUT;
|
1995-10-24 19:03:57 +03:00
|
|
|
} else if ((ecb->flags & ECB_CHKSENSE) != 0) {
|
|
|
|
xs->error = XS_SENSE;
|
|
|
|
} else if ((ecb->stat & ST_MASK) == SCSI_CHECK) {
|
1994-09-18 03:48:32 +04:00
|
|
|
struct scsi_sense *ss = (void *)&ecb->cmd;
|
|
|
|
ESP_MISC(("requesting sense "));
|
|
|
|
/* First, save the return values */
|
|
|
|
xs->resid = ecb->dleft;
|
|
|
|
xs->status = ecb->stat;
|
|
|
|
/* Next, setup a request sense command block */
|
|
|
|
bzero(ss, sizeof(*ss));
|
1995-01-02 23:21:01 +03:00
|
|
|
ss->opcode = REQUEST_SENSE;
|
1995-11-28 23:49:12 +03:00
|
|
|
/*ss->byte2 = sc_link->lun << 5;*/
|
1994-09-18 03:48:32 +04:00
|
|
|
ss->length = sizeof(struct scsi_sense_data);
|
|
|
|
ecb->clen = sizeof(*ss);
|
|
|
|
ecb->daddr = (char *)&xs->sense;
|
|
|
|
ecb->dleft = sizeof(struct scsi_sense_data);
|
1995-10-24 19:03:57 +03:00
|
|
|
ecb->flags |= ECB_CHKSENSE;
|
1995-11-28 23:49:12 +03:00
|
|
|
/*XXX - must take off queue here */
|
1996-02-12 18:59:51 +03:00
|
|
|
if (ecb != sc->sc_nexus) {
|
1996-03-17 02:28:30 +03:00
|
|
|
panic("%s: esp_sched: floating ecb %p",
|
1996-02-12 18:59:51 +03:00
|
|
|
sc->sc_dev.dv_xname, ecb);
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
ECB_SETQ(ecb, ECB_QREADY);
|
|
|
|
ti->lubusy &= ~(1<<sc_link->lun);
|
|
|
|
ti->senses++;
|
1995-11-28 23:49:12 +03:00
|
|
|
timeout(esp_timeout, ecb, (xs->timeout*hz)/1000);
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_nexus == ecb) {
|
|
|
|
sc->sc_nexus = NULL;
|
|
|
|
sc->sc_state = ESP_IDLE;
|
|
|
|
esp_sched(sc);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
return;
|
1995-10-24 19:03:57 +03:00
|
|
|
} else {
|
|
|
|
xs->resid = ecb->dleft;
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
xs->flags |= ITSDONE;
|
|
|
|
|
1995-08-18 14:43:46 +04:00
|
|
|
#ifdef ESP_DEBUG
|
1994-09-18 03:48:32 +04:00
|
|
|
if (esp_debug & ESP_SHOWMISC) {
|
|
|
|
printf("err=0x%02x ",xs->error);
|
1995-11-28 23:49:12 +03:00
|
|
|
if (xs->error == XS_SENSE) {
|
|
|
|
printf("sense=%2x; ", xs->sense.error_code);
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
|
|
|
if ((xs->resid || xs->error > XS_SENSE) && esp_debug & ESP_SHOWMISC) {
|
|
|
|
if (xs->resid)
|
|
|
|
printf("esp_done: resid=%d\n", xs->resid);
|
|
|
|
if (xs->error)
|
|
|
|
printf("esp_done: error=%d\n", xs->error);
|
|
|
|
}
|
|
|
|
#endif
|
1993-10-02 13:22:00 +03:00
|
|
|
|
|
|
|
/*
|
1995-10-24 19:03:57 +03:00
|
|
|
* Remove the ECB from whatever queue it's on.
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1995-10-24 19:03:57 +03:00
|
|
|
switch (ecb->flags & ECB_QBITS) {
|
|
|
|
case ECB_QNONE:
|
|
|
|
if (ecb != sc->sc_nexus) {
|
1995-11-28 23:49:12 +03:00
|
|
|
panic("%s: floating ecb", sc->sc_dev.dv_xname);
|
1995-10-24 19:03:57 +03:00
|
|
|
}
|
1996-02-12 18:59:51 +03:00
|
|
|
sc->sc_nexus = NULL;
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_state = ESP_IDLE;
|
1995-10-24 19:03:57 +03:00
|
|
|
ti->lubusy &= ~(1<<sc_link->lun);
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_sched(sc);
|
1995-10-24 19:03:57 +03:00
|
|
|
break;
|
|
|
|
case ECB_QREADY:
|
1994-09-18 03:48:32 +04:00
|
|
|
TAILQ_REMOVE(&sc->ready_list, ecb, chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
break;
|
|
|
|
case ECB_QNEXUS:
|
|
|
|
TAILQ_REMOVE(&sc->nexus_list, ecb, chain);
|
|
|
|
ti->lubusy &= ~(1<<sc_link->lun);
|
|
|
|
break;
|
|
|
|
case ECB_QFREE:
|
1996-02-12 18:59:51 +03:00
|
|
|
panic("%s: dequeue: busy ecb on free list",
|
|
|
|
sc->sc_dev.dv_xname);
|
1995-10-24 19:03:57 +03:00
|
|
|
break;
|
1996-02-12 18:59:51 +03:00
|
|
|
default:
|
|
|
|
panic("%s: dequeue: unknown queue %d",
|
|
|
|
sc->sc_dev.dv_xname, ecb->flags & ECB_QBITS);
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1995-10-24 19:03:57 +03:00
|
|
|
|
|
|
|
/* Put it on the free list, and clear flags. */
|
1994-09-18 03:48:32 +04:00
|
|
|
TAILQ_INSERT_HEAD(&sc->free_list, ecb, chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
ecb->flags = ECB_QFREE;
|
1994-05-27 06:38:15 +04:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ti->cmds++;
|
1994-09-18 03:48:32 +04:00
|
|
|
scsi_done(xs);
|
|
|
|
return;
|
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* INTERRUPT/PROTOCOL ENGINE
|
|
|
|
*/
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* Schedule an outgoing message by prioritizing it, and asserting
|
|
|
|
* attention on the bus. We can only do this when we are the initiator
|
|
|
|
* else there will be an illegal command interrupt.
|
|
|
|
*/
|
|
|
|
#define esp_sched_msgout(m) \
|
|
|
|
do { \
|
|
|
|
ESP_MISC(("esp_sched_msgout %d ", m)); \
|
|
|
|
ESPCMD(sc, ESPCMD_SETATN); \
|
|
|
|
sc->sc_msgpriq |= (m); \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) & 0x80)
|
|
|
|
#define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
|
|
|
|
#define ISEXTMSG(m) ((m) == 1)
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* Get an incoming message as initiator.
|
|
|
|
*
|
|
|
|
* The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
|
|
|
|
* byte in the FIFO
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
esp_msgin(sc)
|
|
|
|
register struct esp_softc *sc;
|
|
|
|
{
|
1995-11-28 23:49:12 +03:00
|
|
|
register int v;
|
1996-04-01 02:38:29 +04:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[esp_msgin(curmsglen:%d)] ", sc->sc_imlen));
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1995-12-19 02:58:31 +03:00
|
|
|
if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) == 0) {
|
1995-11-28 23:49:12 +03:00
|
|
|
printf("%s: msgin: no msg byte available\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
1994-09-18 03:48:32 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Prepare for a new message. A message should (according
|
|
|
|
* to the SCSI standard) be transmitted in one single
|
|
|
|
* MESSAGE_IN_PHASE. If we have been in some other phase,
|
|
|
|
* then this is a new message.
|
|
|
|
*/
|
|
|
|
if (sc->sc_prevphase != MESSAGE_IN_PHASE) {
|
|
|
|
sc->sc_flags &= ~ESP_DROP_MSGI;
|
|
|
|
sc->sc_imlen = 0;
|
|
|
|
}
|
|
|
|
|
1995-12-19 02:58:31 +03:00
|
|
|
v = ESP_READ_REG(sc, ESP_FIFO);
|
1995-11-28 23:49:12 +03:00
|
|
|
ESP_MISC(("<msgbyte:0x%02x>", v));
|
|
|
|
|
|
|
|
#if 0
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_state == ESP_RESELECTED && sc->sc_imlen == 0) {
|
1993-10-02 13:22:00 +03:00
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Which target is reselecting us? (The ID bit really)
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_selid = v;
|
1995-06-02 17:43:30 +04:00
|
|
|
sc->sc_selid &= ~(1<<sc->sc_id);
|
1994-09-18 03:48:32 +04:00
|
|
|
ESP_MISC(("selid=0x%2x ", sc->sc_selid));
|
1995-11-28 23:49:12 +03:00
|
|
|
return;
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
#endif
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_imess[sc->sc_imlen] = v;
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
/*
|
|
|
|
* If we're going to reject the message, don't bother storing
|
|
|
|
* the incoming bytes. But still, we need to ACK them.
|
|
|
|
*/
|
1995-11-03 19:47:43 +03:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
if ((sc->sc_flags & ESP_DROP_MSGI)) {
|
|
|
|
ESPCMD(sc, ESPCMD_SETATN);
|
|
|
|
ESPCMD(sc, ESPCMD_MSGOK);
|
|
|
|
printf("<dropping msg byte %x>",
|
|
|
|
sc->sc_imess[sc->sc_imlen]);
|
|
|
|
return;
|
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
if (sc->sc_imlen >= ESP_MAX_MSG_LEN) {
|
|
|
|
esp_sched_msgout(SEND_REJECT);
|
|
|
|
sc->sc_flags |= ESP_DROP_MSGI;
|
|
|
|
} else {
|
|
|
|
sc->sc_imlen++;
|
1996-04-01 02:38:29 +04:00
|
|
|
/*
|
1995-11-28 23:49:12 +03:00
|
|
|
* This testing is suboptimal, but most
|
|
|
|
* messages will be of the one byte variety, so
|
|
|
|
* it should not effect performance
|
|
|
|
* significantly.
|
|
|
|
*/
|
|
|
|
if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0]))
|
|
|
|
goto gotit;
|
|
|
|
if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0]))
|
|
|
|
goto gotit;
|
|
|
|
if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
|
|
|
|
sc->sc_imlen == sc->sc_imess[1] + 2)
|
|
|
|
goto gotit;
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
/* Ack what we have so far */
|
|
|
|
ESPCMD(sc, ESPCMD_MSGOK);
|
|
|
|
return;
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
gotit:
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_MSGS(("gotmsg(%x)", sc->sc_imess[0]));
|
1993-10-02 13:22:00 +03:00
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Now we should have a complete message (1 byte, 2 byte
|
|
|
|
* and moderately long extended messages). We only handle
|
|
|
|
* extended messages which total length is shorter than
|
|
|
|
* ESP_MAX_MSG_LEN. Longer messages will be amputated.
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_state == ESP_HASNEXUS) {
|
|
|
|
struct ecb *ecb = sc->sc_nexus;
|
|
|
|
struct esp_tinfo *ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
|
|
|
|
|
|
|
|
switch (sc->sc_imess[0]) {
|
|
|
|
case MSG_CMDCOMPLETE:
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_MSGS(("cmdcomplete "));
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_dleft < 0) {
|
|
|
|
struct scsi_link *sc_link = ecb->xs->sc_link;
|
|
|
|
printf("esp: %d extra bytes from %d:%d\n",
|
1995-11-28 23:49:12 +03:00
|
|
|
-sc->sc_dleft,
|
|
|
|
sc_link->target, sc_link->lun);
|
1995-08-18 14:43:46 +04:00
|
|
|
sc->sc_dleft = 0;
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
|
|
|
ecb->xs->resid = ecb->dleft = sc->sc_dleft;
|
|
|
|
sc->sc_flags |= ESP_BUSFREE_OK;
|
1995-11-03 19:47:43 +03:00
|
|
|
break;
|
1994-09-18 03:48:32 +04:00
|
|
|
|
|
|
|
case MSG_MESSAGE_REJECT:
|
1995-11-03 19:47:43 +03:00
|
|
|
if (esp_debug & ESP_SHOWMSGS)
|
1994-09-18 03:48:32 +04:00
|
|
|
printf("%s: our msg rejected by target\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
1996-03-05 12:29:58 +03:00
|
|
|
#if 1 /* XXX - must remember last message */
|
|
|
|
sc_print_addr(ecb->xs->sc_link); printf("MSG_MESSAGE_REJECT>>");
|
1995-11-28 23:49:12 +03:00
|
|
|
#endif
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_flags & ESP_SYNCHNEGO) {
|
|
|
|
ti->period = ti->offset = 0;
|
|
|
|
sc->sc_flags &= ~ESP_SYNCHNEGO;
|
1995-11-28 23:49:12 +03:00
|
|
|
ti->flags &= ~T_NEGOTIATE;
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
|
|
|
/* Not all targets understand INITIATOR_DETECTED_ERR */
|
|
|
|
if (sc->sc_msgout == SEND_INIT_DET_ERR)
|
|
|
|
esp_sched_msgout(SEND_ABORT);
|
|
|
|
break;
|
|
|
|
case MSG_NOOP:
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_MSGS(("noop "));
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
case MSG_DISCONNECT:
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_MSGS(("disconnect "));
|
1994-09-18 03:48:32 +04:00
|
|
|
ti->dconns++;
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_flags |= ESP_DISCON;
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_flags |= ESP_BUSFREE_OK;
|
1996-02-23 02:35:04 +03:00
|
|
|
if ((ecb->xs->sc_link->quirks & SDEV_AUTOSAVE) == 0)
|
|
|
|
break;
|
|
|
|
/*FALLTHROUGH*/
|
1994-09-18 03:48:32 +04:00
|
|
|
case MSG_SAVEDATAPOINTER:
|
1995-11-28 23:49:12 +03:00
|
|
|
ESP_MSGS(("save datapointer "));
|
1994-09-18 03:48:32 +04:00
|
|
|
ecb->dleft = sc->sc_dleft;
|
|
|
|
ecb->daddr = sc->sc_dp;
|
|
|
|
break;
|
|
|
|
case MSG_RESTOREPOINTERS:
|
1995-11-28 23:49:12 +03:00
|
|
|
ESP_MSGS(("restore datapointer "));
|
1994-09-18 03:48:32 +04:00
|
|
|
if (!ecb) {
|
|
|
|
esp_sched_msgout(SEND_ABORT);
|
|
|
|
printf("%s: no DATAPOINTERs to restore\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
sc->sc_dp = ecb->daddr;
|
|
|
|
sc->sc_dleft = ecb->dleft;
|
|
|
|
break;
|
1995-11-28 23:49:12 +03:00
|
|
|
case MSG_PARITY_ERROR:
|
1996-02-12 18:59:51 +03:00
|
|
|
printf("%s:target%d: MSG_PARITY_ERROR\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
ecb->xs->sc_link->target);
|
1995-11-28 23:49:12 +03:00
|
|
|
break;
|
1994-09-18 03:48:32 +04:00
|
|
|
case MSG_EXTENDED:
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_MSGS(("extended(%x) ", sc->sc_imess[2]));
|
1994-09-18 03:48:32 +04:00
|
|
|
switch (sc->sc_imess[2]) {
|
|
|
|
case MSG_EXT_SDTR:
|
1995-11-28 23:49:12 +03:00
|
|
|
ESP_MSGS(("SDTR period %d, offset %d ",
|
|
|
|
sc->sc_imess[3], sc->sc_imess[4]));
|
1994-09-18 03:48:32 +04:00
|
|
|
ti->period = sc->sc_imess[3];
|
|
|
|
ti->offset = sc->sc_imess[4];
|
1995-11-29 01:49:31 +03:00
|
|
|
if (sc->sc_minsync == 0) {
|
|
|
|
/* We won't do synch */
|
|
|
|
ti->offset = 0;
|
|
|
|
esp_sched_msgout(SEND_SDTR);
|
|
|
|
} else if (ti->offset == 0) {
|
1995-11-28 23:49:12 +03:00
|
|
|
printf("%s:%d: async\n", "esp",
|
|
|
|
ecb->xs->sc_link->target);
|
1994-09-18 03:48:32 +04:00
|
|
|
ti->offset = 0;
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_flags &= ~ESP_SYNCHNEGO;
|
1994-09-18 03:48:32 +04:00
|
|
|
} else if (ti->period > 124) {
|
1995-11-28 23:49:12 +03:00
|
|
|
printf("%s:%d: async\n", "esp",
|
|
|
|
ecb->xs->sc_link->target);
|
1994-09-18 03:48:32 +04:00
|
|
|
ti->offset = 0;
|
|
|
|
esp_sched_msgout(SEND_SDTR);
|
1995-11-28 23:49:12 +03:00
|
|
|
} else {
|
|
|
|
int r = 250/ti->period;
|
|
|
|
int s = (100*250)/ti->period - 100*r;
|
|
|
|
int p;
|
|
|
|
p = esp_stp2cpb(sc, ti->period);
|
|
|
|
ti->period = esp_cpb2stp(sc, p);
|
1996-02-26 17:48:30 +03:00
|
|
|
#ifdef ESP_DEBUG
|
|
|
|
sc_print_addr(ecb->xs->sc_link);
|
|
|
|
#endif
|
1995-11-28 23:49:12 +03:00
|
|
|
if ((sc->sc_flags&ESP_SYNCHNEGO) == 0) {
|
|
|
|
/* Target initiated negotiation */
|
|
|
|
if (ti->flags & T_SYNCMODE) {
|
1996-02-26 17:48:30 +03:00
|
|
|
ti->flags &= ~T_SYNCMODE;
|
1995-11-28 23:49:12 +03:00
|
|
|
#ifdef ESP_DEBUG
|
1996-02-26 17:48:30 +03:00
|
|
|
printf("renegotiated ");
|
1995-11-28 23:49:12 +03:00
|
|
|
#endif
|
|
|
|
}
|
1996-02-26 17:48:30 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF,
|
|
|
|
0);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCTP,
|
|
|
|
0);
|
1995-11-28 23:49:12 +03:00
|
|
|
esp_sched_msgout(SEND_SDTR);
|
|
|
|
} else {
|
|
|
|
/* we are sync */
|
|
|
|
sc->sc_flags &= ~ESP_SYNCHNEGO;
|
1996-02-26 17:48:30 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF,
|
|
|
|
ti->offset);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCTP,
|
|
|
|
p);
|
1995-11-28 23:49:12 +03:00
|
|
|
ti->flags |= T_SYNCMODE;
|
1996-02-26 17:48:30 +03:00
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
#ifdef ESP_DEBUG
|
1996-02-26 17:48:30 +03:00
|
|
|
printf("max sync rate %d.%02dMb/s\n",
|
|
|
|
r, s);
|
1995-11-28 23:49:12 +03:00
|
|
|
#endif
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
ti->flags &= ~T_NEGOTIATE;
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
default: /* Extended messages we don't handle */
|
|
|
|
ESPCMD(sc, ESPCMD_SETATN);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_MSGS(("ident "));
|
1994-09-18 03:48:32 +04:00
|
|
|
/* thanks for that ident... */
|
1995-11-28 23:49:12 +03:00
|
|
|
if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
|
1994-09-18 03:48:32 +04:00
|
|
|
ESP_MISC(("unknown "));
|
1995-11-28 23:49:12 +03:00
|
|
|
printf("%s: unimplemented message: %d\n", sc->sc_dev.dv_xname, sc->sc_imess[0]);
|
1994-09-18 03:48:32 +04:00
|
|
|
ESPCMD(sc, ESPCMD_SETATN);
|
|
|
|
}
|
|
|
|
break;
|
1994-05-27 06:38:15 +04:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
} else if (sc->sc_state == ESP_RESELECTED) {
|
1996-03-14 22:44:30 +03:00
|
|
|
struct scsi_link *sc_link = NULL;
|
1994-09-18 03:48:32 +04:00
|
|
|
struct ecb *ecb;
|
1995-11-28 23:49:12 +03:00
|
|
|
struct esp_tinfo *ti;
|
1994-09-18 03:48:32 +04:00
|
|
|
u_char lunit;
|
1995-11-28 23:49:12 +03:00
|
|
|
|
|
|
|
if (MSG_ISIDENTIFY(sc->sc_imess[0])) { /* Identify? */
|
1994-09-18 03:48:32 +04:00
|
|
|
ESP_MISC(("searching "));
|
|
|
|
/*
|
|
|
|
* Search wait queue for disconnected cmd
|
|
|
|
* The list should be short, so I haven't bothered with
|
|
|
|
* any more sophisticated structures than a simple
|
1996-04-01 02:38:29 +04:00
|
|
|
* singly linked list.
|
1994-09-18 03:48:32 +04:00
|
|
|
*/
|
|
|
|
lunit = sc->sc_imess[0] & 0x07;
|
|
|
|
for (ecb = sc->nexus_list.tqh_first; ecb;
|
1995-11-28 23:49:12 +03:00
|
|
|
ecb = ecb->chain.tqe_next) {
|
1994-09-18 03:48:32 +04:00
|
|
|
sc_link = ecb->xs->sc_link;
|
|
|
|
if (sc_link->lun == lunit &&
|
|
|
|
sc->sc_selid == (1<<sc_link->target)) {
|
|
|
|
TAILQ_REMOVE(&sc->nexus_list, ecb,
|
|
|
|
chain);
|
1995-10-24 19:03:57 +03:00
|
|
|
ECB_SETQ(ecb, ECB_QNONE);
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
1994-05-27 06:38:15 +04:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
if (!ecb) { /* Invalid reselection! */
|
|
|
|
esp_sched_msgout(SEND_ABORT);
|
|
|
|
printf("esp: invalid reselect (idbit=0x%2x)\n",
|
|
|
|
sc->sc_selid);
|
|
|
|
} else { /* Reestablish nexus */
|
|
|
|
/*
|
|
|
|
* Setup driver data structures and
|
|
|
|
* do an implicit RESTORE POINTERS
|
|
|
|
*/
|
1995-11-28 23:49:12 +03:00
|
|
|
ti = &sc->sc_tinfo[sc_link->target];
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_nexus = ecb;
|
|
|
|
sc->sc_dp = ecb->daddr;
|
|
|
|
sc->sc_dleft = ecb->dleft;
|
|
|
|
sc->sc_tinfo[sc_link->target].lubusy
|
|
|
|
|= (1<<sc_link->lun);
|
1996-03-05 12:29:58 +03:00
|
|
|
if (ti->flags & T_SYNCMODE) {
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF,
|
|
|
|
ti->offset);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCTP,
|
|
|
|
esp_stp2cpb(sc, ti->period));
|
|
|
|
} else {
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCOFF, 0);
|
|
|
|
ESP_WRITE_REG(sc, ESP_SYNCTP, 0);
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
ESP_MISC(("... found ecb"));
|
|
|
|
sc->sc_state = ESP_HASNEXUS;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
printf("%s: bogus reselect (no IDENTIFY) %0x2x\n",
|
|
|
|
sc->sc_dev.dv_xname, sc->sc_selid);
|
|
|
|
esp_sched_msgout(SEND_DEV_RESET);
|
|
|
|
}
|
|
|
|
} else { /* Neither ESP_HASNEXUS nor ESP_RESELECTED! */
|
|
|
|
printf("%s: unexpected message in; will send DEV_RESET\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
esp_sched_msgout(SEND_DEV_RESET);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
/* Ack last message byte */
|
|
|
|
ESPCMD(sc, ESPCMD_MSGOK);
|
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
/* Done, reset message pointer. */
|
|
|
|
sc->sc_flags &= ~ESP_DROP_MSGI;
|
|
|
|
sc->sc_imlen = 0;
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Send the highest priority, scheduled message
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
void
|
|
|
|
esp_msgout(sc)
|
|
|
|
register struct esp_softc *sc;
|
1993-10-02 13:22:00 +03:00
|
|
|
{
|
1994-09-18 03:48:32 +04:00
|
|
|
struct esp_tinfo *ti;
|
|
|
|
struct ecb *ecb;
|
1996-02-12 18:59:51 +03:00
|
|
|
size_t size;
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[esp_msgout(priq:%x, prevphase:%x)]", sc->sc_msgpriq, sc->sc_prevphase));
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
|
|
|
|
/* Pick up highest priority message */
|
|
|
|
sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
|
|
|
|
sc->sc_omlen = 1; /* "Default" message len */
|
|
|
|
switch (sc->sc_msgout) {
|
1995-11-28 23:49:12 +03:00
|
|
|
case SEND_SDTR:
|
1994-09-18 03:48:32 +04:00
|
|
|
ecb = sc->sc_nexus;
|
|
|
|
ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_omess[0] = MSG_EXTENDED;
|
|
|
|
sc->sc_omess[1] = 3;
|
|
|
|
sc->sc_omess[2] = MSG_EXT_SDTR;
|
|
|
|
sc->sc_omess[3] = ti->period;
|
|
|
|
sc->sc_omess[4] = ti->offset;
|
|
|
|
sc->sc_omlen = 5;
|
|
|
|
break;
|
1994-09-18 03:48:32 +04:00
|
|
|
case SEND_IDENTIFY:
|
|
|
|
if (sc->sc_state != ESP_HASNEXUS) {
|
|
|
|
printf("esp at line %d: no nexus", __LINE__);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
ecb = sc->sc_nexus;
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_omess[0] = MSG_IDENTIFY(ecb->xs->sc_link->lun,0);
|
1993-10-02 13:22:00 +03:00
|
|
|
break;
|
1994-09-18 03:48:32 +04:00
|
|
|
case SEND_DEV_RESET:
|
|
|
|
sc->sc_omess[0] = MSG_BUS_DEV_RESET;
|
|
|
|
sc->sc_flags |= ESP_BUSFREE_OK;
|
1995-11-28 23:49:12 +03:00
|
|
|
ecb = sc->sc_nexus;
|
|
|
|
ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
|
|
|
|
ti->flags &= ~T_SYNCMODE;
|
|
|
|
ti->flags |= T_NEGOTIATE;
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
case SEND_PARITY_ERROR:
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_omess[0] = MSG_PARITY_ERROR;
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
case SEND_ABORT:
|
|
|
|
sc->sc_omess[0] = MSG_ABORT;
|
|
|
|
sc->sc_flags |= ESP_BUSFREE_OK;
|
|
|
|
break;
|
|
|
|
case SEND_INIT_DET_ERR:
|
|
|
|
sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
|
|
|
|
break;
|
|
|
|
case SEND_REJECT:
|
|
|
|
sc->sc_omess[0] = MSG_MESSAGE_REJECT;
|
1993-10-02 13:22:00 +03:00
|
|
|
break;
|
|
|
|
default:
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_omess[0] = MSG_NOOP;
|
|
|
|
break;
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_omp = sc->sc_omess;
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
#if 1
|
1994-09-18 03:48:32 +04:00
|
|
|
/* (re)send the message */
|
1996-02-12 18:59:51 +03:00
|
|
|
size = min(sc->sc_omlen, sc->sc_maxxfer);
|
|
|
|
DMA_SETUP(sc->sc_dma, &sc->sc_omp, &sc->sc_omlen, 0, &size);
|
|
|
|
/* Program the SCSI counter */
|
|
|
|
ESP_WRITE_REG(sc, ESP_TCL, size);
|
|
|
|
ESP_WRITE_REG(sc, ESP_TCM, size >> 8);
|
|
|
|
if (sc->sc_rev > ESP100A) {
|
|
|
|
ESP_WRITE_REG(sc, ESP_TCH, size >> 16);
|
|
|
|
}
|
|
|
|
/* load the count in */
|
|
|
|
ESPCMD(sc, ESPCMD_NOP|ESPCMD_DMA);
|
|
|
|
ESPCMD(sc, (size==0?ESPCMD_TRPAD:ESPCMD_TRANS)|ESPCMD_DMA);
|
|
|
|
DMA_GO(sc->sc_dma);
|
1995-11-28 23:49:12 +03:00
|
|
|
#else
|
|
|
|
{ int i;
|
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
for (i = 0; i < sc->sc_omlen; i++)
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, FIFO, sc->sc_omess[i]);
|
1995-11-28 23:49:12 +03:00
|
|
|
ESPCMD(sc, ESPCMD_TRANS);
|
|
|
|
#if test_stuck_on_msgout
|
|
|
|
printf("<<XXXmsgoutdoneXXX>>");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
#endif
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* This is the most critical part of the driver, and has to know
|
|
|
|
* how to deal with *all* error conditions and phases from the SCSI
|
|
|
|
* bus. If there are no errors and the DMA was active, then call the
|
|
|
|
* DMA pseudo-interrupt handler. If this returns 1, then that was it
|
|
|
|
* and we can return from here without further processing.
|
|
|
|
*
|
|
|
|
* Most of this needs verifying.
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1996-04-01 02:38:29 +04:00
|
|
|
int
|
1994-09-18 03:48:32 +04:00
|
|
|
espintr(sc)
|
|
|
|
register struct esp_softc *sc;
|
1993-10-02 13:22:00 +03:00
|
|
|
{
|
1995-11-03 19:47:43 +03:00
|
|
|
register struct ecb *ecb;
|
1994-09-18 03:48:32 +04:00
|
|
|
register struct scsi_link *sc_link;
|
|
|
|
struct esp_tinfo *ti;
|
|
|
|
int loop;
|
1996-02-12 18:59:51 +03:00
|
|
|
size_t size;
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
ESP_TRACE(("[espintr]"));
|
1996-04-01 02:38:29 +04:00
|
|
|
|
1994-05-27 06:38:15 +04:00
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* I have made some (maybe seriously flawed) assumptions here,
|
|
|
|
* but basic testing (uncomment the printf() below), show that
|
|
|
|
* certainly something happens when this loop is here.
|
|
|
|
*
|
|
|
|
* The idea is that many of the SCSI operations take very little
|
|
|
|
* time, and going away and getting interrupted is too high an
|
|
|
|
* overhead to pay. For example, selecting, sending a message
|
|
|
|
* and command and then doing some work can be done in one "pass".
|
|
|
|
*
|
|
|
|
* The DELAY is not variable because I do not understand that the
|
|
|
|
* DELAY loop should be fixed-time regardless of CPU speed, but
|
|
|
|
* I am *assuming* that the faster SCSI processors get things done
|
|
|
|
* quicker (sending a command byte etc), and so there is no
|
|
|
|
* need to be too slow.
|
|
|
|
*
|
|
|
|
* This is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1
|
|
|
|
* at 40Mhz. This needs testing.
|
1994-05-27 06:38:15 +04:00
|
|
|
*/
|
1994-11-05 12:35:54 +03:00
|
|
|
for (loop = 0; 1;loop++, DELAY(50/sc->sc_freq)) {
|
1994-09-18 03:48:32 +04:00
|
|
|
/* a feeling of deja-vu */
|
1995-10-24 19:03:57 +03:00
|
|
|
if (!DMA_ISINTR(sc->sc_dma))
|
|
|
|
return (loop != 0);
|
1994-09-18 03:48:32 +04:00
|
|
|
#if 0
|
|
|
|
if (loop)
|
|
|
|
printf("*");
|
|
|
|
#endif
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/* and what do the registers say... */
|
|
|
|
espreadregs(sc);
|
|
|
|
|
|
|
|
sc->sc_intrcnt.ev_count++;
|
1993-10-02 13:22:00 +03:00
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* At the moment, only a SCSI Bus Reset or Illegal
|
1995-11-28 23:49:12 +03:00
|
|
|
* Command are classed as errors. A disconnect is a
|
1994-09-18 03:48:32 +04:00
|
|
|
* valid condition, and we let the code check is the
|
|
|
|
* "ESP_BUSFREE_OK" flag was set before declaring it
|
|
|
|
* and error.
|
|
|
|
*
|
|
|
|
* Also, the status register tells us about "Gross
|
|
|
|
* Errors" and "Parity errors". Only the Gross Error
|
|
|
|
* is really bad, and the parity errors are dealt
|
|
|
|
* with later
|
|
|
|
*
|
|
|
|
* TODO
|
|
|
|
* If there are too many parity error, go to slow
|
|
|
|
* cable mode ?
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
/* SCSI Reset */
|
|
|
|
if (sc->sc_espintr & ESPINTR_SBR) {
|
1995-12-19 02:58:31 +03:00
|
|
|
if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) {
|
1995-11-03 19:47:43 +03:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
DELAY(1);
|
|
|
|
}
|
|
|
|
if (sc->sc_state != ESP_SBR) {
|
1994-09-18 03:48:32 +04:00
|
|
|
printf("%s: SCSI bus reset\n",
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
1994-11-05 12:35:54 +03:00
|
|
|
esp_init(sc, 0); /* Restart everything */
|
1994-09-18 03:48:32 +04:00
|
|
|
return 1;
|
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
#if 0
|
1995-11-03 19:47:43 +03:00
|
|
|
/*XXX*/ printf("<expected bus reset: "
|
1995-11-28 23:49:12 +03:00
|
|
|
"[intr %x, stat %x, step %d]>\n",
|
|
|
|
sc->sc_espintr, sc->sc_espstat,
|
|
|
|
sc->sc_espstep);
|
1995-11-03 19:47:43 +03:00
|
|
|
#endif
|
|
|
|
if (sc->sc_nexus)
|
|
|
|
panic("%s: nexus in reset state",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
sc->sc_state = ESP_IDLE;
|
|
|
|
esp_sched(sc);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
ecb = sc->sc_nexus;
|
|
|
|
|
|
|
|
#define ESPINTR_ERR (ESPINTR_SBR|ESPINTR_ILL)
|
|
|
|
if (sc->sc_espintr & ESPINTR_ERR ||
|
|
|
|
sc->sc_espstat & ESPSTAT_GE) {
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_espstat & ESPSTAT_GE) {
|
|
|
|
/* no target ? */
|
1995-12-19 02:58:31 +03:00
|
|
|
if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) {
|
1994-09-18 03:48:32 +04:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
DELAY(1);
|
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
if (sc->sc_state == ESP_HASNEXUS ||
|
|
|
|
sc->sc_state == ESP_SELECTING) {
|
1994-09-18 03:48:32 +04:00
|
|
|
ecb->xs->error = XS_DRIVER_STUFFUP;
|
|
|
|
esp_done(ecb);
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_espintr & ESPINTR_ILL) {
|
|
|
|
/* illegal command, out of sync ? */
|
1995-11-03 19:47:43 +03:00
|
|
|
printf("%s: illegal command: 0x%x (state %d, phase %x, prevphase %x)\n",
|
|
|
|
sc->sc_dev.dv_xname, sc->sc_lastcmd,
|
1996-04-01 02:38:29 +04:00
|
|
|
sc->sc_state, sc->sc_phase,
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_prevphase);
|
1995-12-19 02:58:31 +03:00
|
|
|
if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) {
|
1994-09-18 03:48:32 +04:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
DELAY(1);
|
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
esp_init(sc, 0); /* Restart everything */
|
1994-09-18 03:48:32 +04:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* Call if DMA is active.
|
|
|
|
*
|
|
|
|
* If DMA_INTR returns true, then maybe go 'round the loop
|
|
|
|
* again in case there is no more DMA queued, but a phase
|
|
|
|
* change is expected.
|
|
|
|
*/
|
1996-02-12 18:59:51 +03:00
|
|
|
if (DMA_ISACTIVE(sc->sc_dma)) {
|
|
|
|
DMA_INTR(sc->sc_dma);
|
1994-09-18 03:48:32 +04:00
|
|
|
/* If DMA active here, then go back to work... */
|
1996-02-12 18:59:51 +03:00
|
|
|
if (DMA_ISACTIVE(sc->sc_dma))
|
1994-09-18 03:48:32 +04:00
|
|
|
return 1;
|
1996-02-12 18:59:51 +03:00
|
|
|
|
|
|
|
if (sc->sc_dleft == 0 &&
|
|
|
|
(sc->sc_espstat & ESPSTAT_TC) == 0)
|
|
|
|
printf("%s: !TC [intr %x, stat %x, step %d]"
|
|
|
|
" prevphase %x, resid %x\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
sc->sc_espintr,
|
|
|
|
sc->sc_espstat,
|
|
|
|
sc->sc_espstep,
|
|
|
|
sc->sc_prevphase,
|
|
|
|
ecb?ecb->dleft:-1);
|
|
|
|
}
|
|
|
|
|
1996-02-26 17:48:30 +03:00
|
|
|
#if 0 /* Unreliable on some ESP revisions? */
|
1996-02-12 18:59:51 +03:00
|
|
|
if ((sc->sc_espstat & ESPSTAT_INT) == 0) {
|
|
|
|
printf("%s: spurious interrupt\n", sc->sc_dev.dv_xname);
|
|
|
|
return 1;
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1996-02-26 17:48:30 +03:00
|
|
|
#endif
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/*
|
|
|
|
* check for less serious errors
|
|
|
|
*/
|
|
|
|
if (sc->sc_espstat & ESPSTAT_PE) {
|
1995-11-03 19:47:43 +03:00
|
|
|
printf("%s: SCSI bus parity error\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_prevphase == MESSAGE_IN_PHASE)
|
|
|
|
esp_sched_msgout(SEND_PARITY_ERROR);
|
1996-04-01 02:38:29 +04:00
|
|
|
else
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_sched_msgout(SEND_INIT_DET_ERR);
|
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_espintr & ESPINTR_DIS) {
|
1996-02-12 18:59:51 +03:00
|
|
|
ESP_MISC(("<DISC [intr %x, stat %x, step %d]>",
|
|
|
|
sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
|
1995-12-19 02:58:31 +03:00
|
|
|
if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) {
|
1994-09-18 03:48:32 +04:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
DELAY(1);
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* This command must (apparently) be issued within
|
|
|
|
* 250mS of a disconnect. So here you are...
|
|
|
|
*/
|
|
|
|
ESPCMD(sc, ESPCMD_ENSEL);
|
|
|
|
if (sc->sc_state != ESP_IDLE) {
|
1995-11-28 23:49:12 +03:00
|
|
|
if ((sc->sc_flags & ESP_SYNCHNEGO)) {
|
1996-03-05 12:29:58 +03:00
|
|
|
#ifdef ESP_DEBUG
|
|
|
|
if (ecb)
|
|
|
|
sc_print_addr(ecb->xs->sc_link);
|
|
|
|
printf("sync nego not completed!\n");
|
|
|
|
#endif
|
|
|
|
sc->sc_flags &= ~ESP_SYNCHNEGO;
|
|
|
|
sc->sc_tinfo[ecb->xs->sc_link->target].offset = 0;
|
|
|
|
sc->sc_tinfo[ecb->xs->sc_link->target].flags &= ~T_NEGOTIATE;
|
1995-11-28 23:49:12 +03:00
|
|
|
}
|
|
|
|
/*XXX*/sc->sc_msgpriq = sc->sc_msgout = 0;
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
/* it may be OK to disconnect */
|
1996-02-26 17:48:30 +03:00
|
|
|
if (!(sc->sc_flags & ESP_BUSFREE_OK)) {
|
|
|
|
if (sc->sc_state == ESP_HASNEXUS) {
|
|
|
|
sc_print_addr(ecb->xs->sc_link);
|
|
|
|
printf("disconnect without"
|
|
|
|
"warning\n");
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
ecb->xs->error = XS_TIMEOUT;
|
1996-02-26 17:48:30 +03:00
|
|
|
} else if (sc->sc_flags & ESP_DISCON) {
|
1995-11-28 23:49:12 +03:00
|
|
|
TAILQ_INSERT_HEAD(&sc->nexus_list, ecb, chain);
|
|
|
|
ECB_SETQ(ecb, ECB_QNEXUS);
|
|
|
|
sc->sc_nexus = NULL;
|
|
|
|
sc->sc_flags &= ~ESP_DISCON;
|
|
|
|
sc->sc_state = ESP_IDLE;
|
1996-02-12 18:59:51 +03:00
|
|
|
#if ESP_DEBUG
|
|
|
|
if ((esp_debug & 0x10000) && ecb->dleft == 0) {
|
1996-04-01 02:38:29 +04:00
|
|
|
printf("%s: silly disconnect (ecb %p [stat %x])\n",
|
1996-02-12 18:59:51 +03:00
|
|
|
sc->sc_dev.dv_xname, ecb, ecb->stat);
|
|
|
|
}
|
|
|
|
#endif
|
1995-11-28 23:49:12 +03:00
|
|
|
esp_sched(sc);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_done(ecb);
|
|
|
|
return 1;
|
|
|
|
}
|
1996-02-12 18:59:51 +03:00
|
|
|
printf("%s: DISCONNECT in IDLE state!\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* did a message go out OK ? This must be broken */
|
|
|
|
if (sc->sc_prevphase == MESSAGE_OUT_PHASE &&
|
|
|
|
sc->sc_phase != MESSAGE_OUT_PHASE) {
|
|
|
|
/* we have sent it */
|
1996-02-26 17:48:30 +03:00
|
|
|
if (sc->sc_msgout == SEND_SDTR &&
|
1996-03-05 12:29:58 +03:00
|
|
|
(sc->sc_flags & ESP_SYNCHNEGO) == 0) {
|
1996-02-26 17:48:30 +03:00
|
|
|
/* We've just accepted new sync parameters */
|
|
|
|
sc->sc_tinfo[ecb->xs->sc_link->target].flags |=
|
|
|
|
T_SYNCMODE;
|
1996-03-05 12:29:58 +03:00
|
|
|
if (ecb) sc_print_addr(ecb->xs->sc_link);else printf("NO nexus: ");
|
|
|
|
printf("target put in SYNC mode\n");
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_msgpriq &= ~sc->sc_msgout;
|
|
|
|
sc->sc_msgout = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (sc->sc_state) {
|
|
|
|
|
1995-11-28 23:49:12 +03:00
|
|
|
case ESP_SBR:
|
|
|
|
printf("%s: waiting for SCSI Bus Reset to happen\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
return 1;
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
case ESP_RESELECTED:
|
|
|
|
/*
|
|
|
|
* we must be continuing a message ?
|
|
|
|
*/
|
|
|
|
if (sc->sc_phase != MESSAGE_IN_PHASE) {
|
|
|
|
printf("%s: target didn't identify\n",
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
1994-11-05 12:35:54 +03:00
|
|
|
esp_init(sc, 1);
|
1994-09-18 03:48:32 +04:00
|
|
|
return 1;
|
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
printf("<<RESELECT CONT'd>>");
|
|
|
|
#if XXXX
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_msgin(sc);
|
|
|
|
if (sc->sc_state != ESP_HASNEXUS) {
|
|
|
|
/* IDENTIFY fail?! */
|
|
|
|
printf("%s: identify failed\n",
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
1994-11-05 12:35:54 +03:00
|
|
|
esp_init(sc, 1);
|
1994-09-18 03:48:32 +04:00
|
|
|
return 1;
|
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
#endif
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
case ESP_IDLE:
|
1995-11-28 23:49:12 +03:00
|
|
|
if (sc->sc_flags & ESP_ICCS) printf("[[esp: BUMMER]]");
|
1994-09-18 03:48:32 +04:00
|
|
|
case ESP_SELECTING:
|
|
|
|
|
|
|
|
if (sc->sc_espintr & ESPINTR_RESEL) {
|
|
|
|
/*
|
|
|
|
* If we're trying to select a
|
|
|
|
* target ourselves, push our command
|
|
|
|
* back into the ready list.
|
|
|
|
*/
|
|
|
|
if (sc->sc_state == ESP_SELECTING) {
|
|
|
|
ESP_MISC(("backoff selector "));
|
1995-11-28 23:49:12 +03:00
|
|
|
sc_link = sc->sc_nexus->xs->sc_link;
|
|
|
|
ti = &sc->sc_tinfo[sc_link->target];
|
1994-09-18 03:48:32 +04:00
|
|
|
TAILQ_INSERT_HEAD(&sc->ready_list,
|
|
|
|
sc->sc_nexus, chain);
|
1995-11-03 19:47:43 +03:00
|
|
|
ECB_SETQ(sc->sc_nexus, ECB_QREADY);
|
1995-11-28 23:49:12 +03:00
|
|
|
ti->lubusy &= ~(1<<sc_link->lun);
|
|
|
|
ecb = sc->sc_nexus = NULL;
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
|
|
|
sc->sc_state = ESP_RESELECTED;
|
|
|
|
if (sc->sc_phase != MESSAGE_IN_PHASE) {
|
|
|
|
/*
|
|
|
|
* Things are seriously fucked up.
|
|
|
|
* Pull the brakes, i.e. reset
|
|
|
|
*/
|
1996-04-01 02:38:29 +04:00
|
|
|
printf("%s: target didn't identify\n",
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
1994-11-05 12:35:54 +03:00
|
|
|
esp_init(sc, 1);
|
1994-09-18 03:48:32 +04:00
|
|
|
return 1;
|
|
|
|
}
|
1995-12-19 02:58:31 +03:00
|
|
|
if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) != 2) {
|
1996-02-06 05:03:46 +03:00
|
|
|
printf("%s: RESELECT: %d bytes in FIFO!\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
ESP_READ_REG(sc, ESP_FFLAG) &
|
|
|
|
ESPFIFO_FF);
|
|
|
|
esp_init(sc, 1);
|
|
|
|
return 1;
|
1995-11-28 23:49:12 +03:00
|
|
|
}
|
1995-12-19 02:58:31 +03:00
|
|
|
sc->sc_selid = ESP_READ_REG(sc, ESP_FIFO);
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_selid &= ~(1<<sc->sc_id);
|
|
|
|
ESP_MISC(("selid=0x%2x ", sc->sc_selid));
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_msgin(sc); /* Handle identify message */
|
|
|
|
if (sc->sc_state != ESP_HASNEXUS) {
|
|
|
|
/* IDENTIFY fail?! */
|
|
|
|
printf("%s: identify failed\n",
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
1994-11-05 12:35:54 +03:00
|
|
|
esp_init(sc, 1);
|
1994-09-18 03:48:32 +04:00
|
|
|
return 1;
|
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
continue; /* ie. next phase expected soon */
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
#define ESPINTR_DONE (ESPINTR_FC|ESPINTR_BS)
|
|
|
|
if ((sc->sc_espintr & ESPINTR_DONE) == ESPINTR_DONE) {
|
|
|
|
ecb = sc->sc_nexus;
|
|
|
|
if (!ecb)
|
|
|
|
panic("esp: not nexus at sc->sc_nexus");
|
1995-11-28 23:49:12 +03:00
|
|
|
|
|
|
|
sc_link = ecb->xs->sc_link;
|
|
|
|
ti = &sc->sc_tinfo[sc_link->target];
|
|
|
|
|
1995-11-03 19:47:43 +03:00
|
|
|
switch (sc->sc_espstep) {
|
|
|
|
case 0:
|
|
|
|
printf("%s: select timeout/no disconnect\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
1995-11-28 23:49:12 +03:00
|
|
|
esp_abort(sc, ecb);
|
|
|
|
return 1;
|
1995-11-03 19:47:43 +03:00
|
|
|
case 1:
|
1995-11-28 23:49:12 +03:00
|
|
|
if ((ti->flags & T_NEGOTIATE) == 0) {
|
|
|
|
printf("%s: step 1 & !NEG\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
esp_abort(sc, ecb);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
if (sc->sc_phase != MESSAGE_OUT_PHASE) {
|
|
|
|
printf("%s: !MSGOUT\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
esp_abort(sc, ecb);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
/* Start negotiating */
|
|
|
|
ti->period = sc->sc_minsync;
|
|
|
|
ti->offset = 15;
|
|
|
|
sc->sc_msgpriq = SEND_SDTR;
|
1996-02-26 17:48:30 +03:00
|
|
|
sc->sc_flags |= ESP_SYNCHNEGO;
|
1995-11-28 23:49:12 +03:00
|
|
|
break;
|
1995-11-03 19:47:43 +03:00
|
|
|
case 3:
|
1995-11-28 23:49:12 +03:00
|
|
|
/*
|
|
|
|
* Grr, this is supposed to mean
|
|
|
|
* "target left command phase
|
|
|
|
* prematurely". It seems to happen
|
|
|
|
* regularly when sync mode is on.
|
|
|
|
* Look at FIFO to see if command
|
|
|
|
* went out.
|
|
|
|
* (Timing problems?)
|
|
|
|
*/
|
1995-12-19 02:58:31 +03:00
|
|
|
if ((ESP_READ_REG(sc, ESP_FFLAG)&ESPFIFO_FF) == 0) {
|
1995-11-28 23:49:12 +03:00
|
|
|
/* Hope for the best.. */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
printf("(%s:%d:%d): selection failed;"
|
|
|
|
" %d left in FIFO "
|
|
|
|
"[intr %x, stat %x, step %d]\n",
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_dev.dv_xname,
|
1995-11-28 23:49:12 +03:00
|
|
|
sc_link->target,
|
|
|
|
sc_link->lun,
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF,
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_espintr, sc->sc_espstat,
|
|
|
|
sc->sc_espstep);
|
1996-02-12 18:59:51 +03:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_flags |= ESP_ABORTING;
|
|
|
|
esp_sched_msgout(SEND_ABORT);
|
1995-11-03 19:47:43 +03:00
|
|
|
return 1;
|
|
|
|
case 2:
|
|
|
|
/* Select stuck at Command Phase */
|
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
case 4:
|
|
|
|
/* So far, everything went fine */
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_msgpriq = 0;
|
1995-11-03 19:47:43 +03:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
#if 0
|
|
|
|
/* Why set msgpriq? (and not raise ATN) */
|
1994-09-18 03:48:32 +04:00
|
|
|
if (ecb->xs->flags & SCSI_RESET)
|
|
|
|
sc->sc_msgpriq = SEND_DEV_RESET;
|
1995-11-28 23:49:12 +03:00
|
|
|
else if (ti->flags & T_NEGOTIATE)
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_msgpriq =
|
|
|
|
SEND_IDENTIFY | SEND_SDTR;
|
|
|
|
else
|
|
|
|
sc->sc_msgpriq = SEND_IDENTIFY;
|
1995-11-03 19:47:43 +03:00
|
|
|
#endif
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_state = ESP_HASNEXUS;
|
1995-11-28 23:49:12 +03:00
|
|
|
/*???sc->sc_flags = 0; */
|
|
|
|
sc->sc_prevphase = INVALID_PHASE; /* ?? */
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_dp = ecb->daddr;
|
|
|
|
sc->sc_dleft = ecb->dleft;
|
|
|
|
ti->lubusy |= (1<<sc_link->lun);
|
|
|
|
break;
|
1995-11-28 23:49:12 +03:00
|
|
|
} else {
|
|
|
|
printf("%s: unexpected status after select"
|
|
|
|
": [intr %x, stat %x, step %x]\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
sc->sc_espintr, sc->sc_espstat,
|
|
|
|
sc->sc_espstep);
|
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
DELAY(1);
|
|
|
|
esp_abort(sc, ecb);
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
if (sc->sc_state == ESP_IDLE) {
|
|
|
|
printf("%s: stray interrupt\n", sc->sc_dev.dv_xname);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
break;
|
1994-09-18 03:48:32 +04:00
|
|
|
|
|
|
|
case ESP_HASNEXUS:
|
1995-11-28 23:49:12 +03:00
|
|
|
if (sc->sc_flags & ESP_ICCS) {
|
|
|
|
unsigned char msg;
|
|
|
|
|
|
|
|
sc->sc_flags &= ~ESP_ICCS;
|
|
|
|
|
|
|
|
if (!(sc->sc_espintr & ESPINTR_DONE)) {
|
|
|
|
printf("%s: ICCS: "
|
|
|
|
": [intr %x, stat %x, step %x]\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
sc->sc_espintr, sc->sc_espstat,
|
|
|
|
sc->sc_espstep);
|
|
|
|
}
|
1995-12-19 02:58:31 +03:00
|
|
|
if ((ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) != 2) {
|
1995-11-28 23:49:12 +03:00
|
|
|
printf("%s: ICCS: expected 2, got %d "
|
|
|
|
": [intr %x, stat %x, step %x]\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF,
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_espintr, sc->sc_espstat,
|
|
|
|
sc->sc_espstep);
|
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
esp_abort(sc, ecb);
|
|
|
|
return 1;
|
|
|
|
}
|
1995-12-19 02:58:31 +03:00
|
|
|
ecb->stat = ESP_READ_REG(sc, ESP_FIFO);
|
|
|
|
msg = ESP_READ_REG(sc, ESP_FIFO);
|
1995-11-28 23:49:12 +03:00
|
|
|
ESP_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
|
|
|
|
if (msg == MSG_CMDCOMPLETE) {
|
|
|
|
sc->sc_flags |= ESP_BUSFREE_OK;
|
|
|
|
ecb->xs->resid = ecb->dleft = sc->sc_dleft;
|
|
|
|
} else
|
|
|
|
printf("%s: STATUS_PHASE: msg %d\n",
|
|
|
|
sc->sc_dev.dv_xname, msg);
|
|
|
|
ESPCMD(sc, ESPCMD_MSGOK);
|
|
|
|
continue; /* ie. wait for disconnect */
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
default:
|
1995-11-03 19:47:43 +03:00
|
|
|
panic("%s: invalid state: %d",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
sc->sc_state);
|
1994-09-18 03:48:32 +04:00
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
|
|
|
|
/*
|
1994-09-18 03:48:32 +04:00
|
|
|
* Driver is now in state ESP_HASNEXUS, i.e. we
|
|
|
|
* have a current command working the SCSI bus.
|
1993-10-02 13:22:00 +03:00
|
|
|
*/
|
1994-09-18 03:48:32 +04:00
|
|
|
if (sc->sc_state != ESP_HASNEXUS || ecb == NULL) {
|
|
|
|
panic("esp no nexus");
|
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
switch (sc->sc_phase) {
|
|
|
|
case MESSAGE_OUT_PHASE:
|
|
|
|
ESP_PHASE(("MESSAGE_OUT_PHASE "));
|
|
|
|
esp_msgout(sc);
|
|
|
|
sc->sc_prevphase = MESSAGE_OUT_PHASE;
|
|
|
|
break;
|
|
|
|
case MESSAGE_IN_PHASE:
|
|
|
|
ESP_PHASE(("MESSAGE_IN_PHASE "));
|
1995-11-28 23:49:12 +03:00
|
|
|
if (sc->sc_espintr & ESPINTR_BS) {
|
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
sc->sc_flags |= ESP_WAITI;
|
|
|
|
ESPCMD(sc, ESPCMD_TRANS);
|
|
|
|
} else if (sc->sc_espintr & ESPINTR_FC) {
|
|
|
|
if ((sc->sc_flags & ESP_WAITI) == 0) {
|
|
|
|
printf("%s: MSGIN: unexpected FC bit: "
|
|
|
|
"[intr %x, stat %x, step %x]\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
sc->sc_espintr, sc->sc_espstat,
|
|
|
|
sc->sc_espstep);
|
|
|
|
}
|
|
|
|
sc->sc_flags &= ~ESP_WAITI;
|
|
|
|
esp_msgin(sc);
|
|
|
|
} else {
|
|
|
|
printf("%s: MSGIN: weird bits: "
|
|
|
|
"[intr %x, stat %x, step %x]\n",
|
1995-11-03 19:47:43 +03:00
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
sc->sc_espintr, sc->sc_espstat,
|
|
|
|
sc->sc_espstep);
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_prevphase = MESSAGE_IN_PHASE;
|
|
|
|
break;
|
1995-11-28 23:49:12 +03:00
|
|
|
case COMMAND_PHASE: {
|
1994-09-18 03:48:32 +04:00
|
|
|
/* well, this means send the command again */
|
1995-11-28 23:49:12 +03:00
|
|
|
u_char *cmd = (u_char *)&ecb->cmd;
|
|
|
|
int i;
|
|
|
|
|
1994-09-18 03:48:32 +04:00
|
|
|
ESP_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
|
|
|
|
ecb->cmd.opcode, ecb->clen));
|
1995-12-19 02:58:31 +03:00
|
|
|
if (ESP_READ_REG(sc, ESP_FFLAG) & ESPFIFO_FF) {
|
1994-09-18 03:48:32 +04:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
|
|
|
DELAY(1);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1995-11-28 23:49:12 +03:00
|
|
|
/* Now the command into the FIFO */
|
|
|
|
for (i = 0; i < ecb->clen; i++)
|
1995-12-19 02:58:31 +03:00
|
|
|
ESP_WRITE_REG(sc, ESP_FIFO, *cmd++);
|
1995-11-28 23:49:12 +03:00
|
|
|
ESPCMD(sc, ESPCMD_TRANS);
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_prevphase = COMMAND_PHASE;
|
1995-11-28 23:49:12 +03:00
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
break;
|
|
|
|
case DATA_OUT_PHASE:
|
|
|
|
ESP_PHASE(("DATA_OUT_PHASE [%d] ", sc->sc_dleft));
|
1995-08-18 14:43:46 +04:00
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
1996-02-12 18:59:51 +03:00
|
|
|
size = min(sc->sc_dleft, sc->sc_maxxfer);
|
|
|
|
DMA_SETUP(sc->sc_dma, &sc->sc_dp, &sc->sc_dleft,
|
|
|
|
0, &size);
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_prevphase = DATA_OUT_PHASE;
|
1996-02-12 18:59:51 +03:00
|
|
|
goto setup_xfer;
|
1994-09-18 03:48:32 +04:00
|
|
|
case DATA_IN_PHASE:
|
|
|
|
ESP_PHASE(("DATA_IN_PHASE "));
|
1995-11-28 23:49:12 +03:00
|
|
|
if (sc->sc_rev == ESP100)
|
|
|
|
ESPCMD(sc, ESPCMD_FLUSH);
|
1996-02-12 18:59:51 +03:00
|
|
|
size = min(sc->sc_dleft, sc->sc_maxxfer);
|
|
|
|
DMA_SETUP(sc->sc_dma, &sc->sc_dp, &sc->sc_dleft,
|
|
|
|
1, &size);
|
1994-09-18 03:48:32 +04:00
|
|
|
sc->sc_prevphase = DATA_IN_PHASE;
|
1996-02-12 18:59:51 +03:00
|
|
|
setup_xfer:
|
|
|
|
/* Program the SCSI counter */
|
|
|
|
ESP_WRITE_REG(sc, ESP_TCL, size);
|
|
|
|
ESP_WRITE_REG(sc, ESP_TCM, size >> 8);
|
|
|
|
if (sc->sc_rev > ESP100A) {
|
|
|
|
ESP_WRITE_REG(sc, ESP_TCH, size >> 16);
|
|
|
|
}
|
|
|
|
/* load the count in */
|
|
|
|
ESPCMD(sc, ESPCMD_NOP|ESPCMD_DMA);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Note that if `size' is 0, we've already transceived
|
|
|
|
* all the bytes we want but we're still in DATA PHASE.
|
|
|
|
* Apparently, the device needs padding. Also, a
|
|
|
|
* transfer size of 0 means "maximum" to the chip
|
|
|
|
* DMA logic.
|
|
|
|
*/
|
|
|
|
ESPCMD(sc,
|
|
|
|
(size==0?ESPCMD_TRPAD:ESPCMD_TRANS)|ESPCMD_DMA);
|
|
|
|
DMA_GO(sc->sc_dma);
|
1995-11-28 23:49:12 +03:00
|
|
|
return 1;
|
1994-09-18 03:48:32 +04:00
|
|
|
case STATUS_PHASE:
|
|
|
|
ESP_PHASE(("STATUS_PHASE "));
|
1995-11-28 23:49:12 +03:00
|
|
|
sc->sc_flags |= ESP_ICCS;
|
1994-09-18 03:48:32 +04:00
|
|
|
ESPCMD(sc, ESPCMD_ICCS);
|
|
|
|
sc->sc_prevphase = STATUS_PHASE;
|
|
|
|
break;
|
|
|
|
case INVALID_PHASE:
|
|
|
|
break;
|
|
|
|
case BUSFREE_PHASE:
|
|
|
|
if (sc->sc_flags & ESP_BUSFREE_OK) {
|
|
|
|
/*It's fun the 1st time.. */
|
|
|
|
sc->sc_flags &= ~ESP_BUSFREE_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
panic("esp: bogus bus phase\n");
|
|
|
|
}
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
1995-11-03 19:47:43 +03:00
|
|
|
panic("esp: should not get here..");
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|
|
|
|
|
1995-10-24 19:03:57 +03:00
|
|
|
void
|
|
|
|
esp_abort(sc, ecb)
|
|
|
|
struct esp_softc *sc;
|
|
|
|
struct ecb *ecb;
|
|
|
|
{
|
|
|
|
if (ecb == sc->sc_nexus) {
|
|
|
|
if (sc->sc_state == ESP_HASNEXUS) {
|
|
|
|
sc->sc_flags |= ESP_ABORTING;
|
|
|
|
esp_sched_msgout(SEND_ABORT);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (sc->sc_state == ESP_IDLE)
|
|
|
|
esp_sched(sc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1993-10-02 13:22:00 +03:00
|
|
|
void
|
1994-09-18 03:48:32 +04:00
|
|
|
esp_timeout(arg)
|
|
|
|
void *arg;
|
1993-10-02 13:22:00 +03:00
|
|
|
{
|
1994-09-18 03:48:32 +04:00
|
|
|
int s = splbio();
|
|
|
|
struct ecb *ecb = (struct ecb *)arg;
|
|
|
|
struct esp_softc *sc;
|
1996-04-01 02:38:29 +04:00
|
|
|
struct scsi_xfer *xs = ecb->xs;
|
1995-10-24 19:03:57 +03:00
|
|
|
|
|
|
|
sc = xs->sc_link->adapter_softc;
|
|
|
|
sc_print_addr(xs->sc_link);
|
|
|
|
again:
|
1996-03-14 22:44:30 +03:00
|
|
|
printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], "
|
|
|
|
"<state %d, nexus %p, phase(c %x, p %x), resid %x, msg(q %x,o %x) %s>",
|
1996-02-12 18:59:51 +03:00
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
ecb, ecb->flags, ecb->dleft, ecb->stat,
|
|
|
|
sc->sc_state, sc->sc_nexus, sc->sc_phase, sc->sc_prevphase,
|
1996-02-26 17:48:30 +03:00
|
|
|
sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
|
|
|
|
DMA_ISACTIVE(sc->sc_dma) ? "DMA active" : "");
|
1996-02-12 18:59:51 +03:00
|
|
|
#if ESP_DEBUG > 0
|
|
|
|
printf("TRACE: %s.", ecb->trace);
|
|
|
|
#endif
|
1995-10-24 19:03:57 +03:00
|
|
|
|
|
|
|
if (ecb->flags & ECB_ABORTED) {
|
|
|
|
/* abort timed out */
|
|
|
|
printf(" AGAIN\n");
|
1995-11-03 19:47:43 +03:00
|
|
|
esp_init(sc, 1);
|
1995-10-24 19:03:57 +03:00
|
|
|
} else {
|
|
|
|
/* abort the operation that has timed out */
|
|
|
|
printf("\n");
|
|
|
|
xs->error = XS_TIMEOUT;
|
|
|
|
ecb->flags |= ECB_ABORTED;
|
|
|
|
esp_abort(sc, ecb);
|
|
|
|
/* 2 secs for the abort */
|
|
|
|
if ((xs->flags & SCSI_POLL) == 0)
|
|
|
|
timeout(esp_timeout, ecb, 2 * hz);
|
|
|
|
else {
|
|
|
|
int count = 200000;
|
|
|
|
while (count) {
|
|
|
|
if (DMA_ISINTR(sc->sc_dma)) {
|
|
|
|
espintr(sc);
|
|
|
|
}
|
|
|
|
if (xs->flags & ITSDONE)
|
|
|
|
break;
|
|
|
|
DELAY(10);
|
|
|
|
--count;
|
|
|
|
}
|
|
|
|
if (count == 0)
|
|
|
|
goto again;
|
|
|
|
}
|
|
|
|
}
|
1994-09-18 03:48:32 +04:00
|
|
|
splx(s);
|
1993-10-02 13:22:00 +03:00
|
|
|
}
|