113 lines
3.4 KiB
C
113 lines
3.4 KiB
C
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/* $NetBSD: itvar.h,v 1.1 2006/05/13 09:02:19 xtraeme Exp $ */
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/* $OpenBSD: itvar.h,v 1.2 2003/11/05 20:57:10 grange Exp $ */
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/*
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* Copyright (c) 2006 Juan Romero Pardines <juan@xtrarom.org>
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* Copyright (c) 2003 Julien Bordet <zejames@greyhats.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITD TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITD TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_ISA_ITVAR_H
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#define _DEV_ISA_ITVAR_H
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#define IT_NUM_SENSORS 15
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/* Identification chip registers */
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#define IT_VENDORID 0x58
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#define IT_REV_8705 0x90
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#define IT_COREID 0x5b
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#define IT_REV_8712 0x12
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/* Control registers */
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#define IT_ADDR 0x05
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#define IT_DATA 0x06
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/* Data registers */
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#define IT_CONFIG 0x00
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#define IT_ISR1 0x01
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#define IT_ISR2 0x02
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#define IT_ISR3 0x03
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#define IT_SMI1 0x04
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#define IT_SMI2 0x05
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#define IT_SMI3 0x06
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#define IT_IMR1 0x07
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#define IT_IMR2 0x08
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#define IT_IMR3 0x09
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#define IT_VID 0x0a
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#define IT_FAN 0x0b
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#define IT_VOLTENABLE 0x50
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#define IT_TEMPENABLE 0x51
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#define IT_FANMINBASE 0x10
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#define IT_FANENABLE 0x13
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#define IT_SENSORFANBASE 0x0d /* Fan from 0x0d to 0x0f */
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#define IT_SENSORVOLTBASE 0x20 /* Fan from 0x20 to 0x28 */
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#define IT_SENSORTEMPBASE 0x29 /* Fan from 0x29 to 0x2b */
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#define IT_VOLTMAXBASE 0x30
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#define IT_VOLTMINBASE 0x31
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#define IT_TEMPMAXBASE 0x40
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#define IT_TEMPMINBASE 0x41
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/* Reserved registers, used for probing the chip */
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#define IT_RES48 0x48
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#define IT_RES48_DEFAULT 0x2d
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#define IT_RES52 0x52
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#define IT_RES52_DEFAULT 0x7d
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#define IT_VREF (4096) /* Vref = 4.096 V */
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/*
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* sc->sensors sub-intervals for each unit type.
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*/
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static const struct envsys_range it_ranges[] = {
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{ 7, 7, ENVSYS_STEMP },
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{ 8, 10, ENVSYS_SFANRPM },
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{ 1, 0, ENVSYS_SVOLTS_AC }, /* None */
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{ 0, 6, ENVSYS_SVOLTS_DC },
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{ 1, 0, ENVSYS_SOHMS }, /* None */
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{ 1, 0, ENVSYS_SWATTS }, /* None */
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{ 1, 0, ENVSYS_SAMPS } /* None */
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};
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struct it_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct timeval lastread; /* only allow reads every 1.5 secs */
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struct sysmon_envsys sc_sysmon;
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envsys_tre_data_t sc_data[IT_NUM_SENSORS];
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envsys_basic_info_t sc_info[IT_NUM_SENSORS];
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uint8_t (*it_readreg)(struct it_softc *, int);
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void (*it_writereg)(struct it_softc *, int, int);
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};
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#endif /* _DEV_ISA_ITVAR_H_ */
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