2003-10-26 00:19:01 +04:00
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/* $NetBSD: if_elmc_mca.c,v 1.14 2003/10/25 20:19:01 mycroft Exp $ */
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2001-03-17 02:03:15 +03:00
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Rafal K. Boni and Jaromir Dolecek.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
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*
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* The 3c523-specific hooks were derived from Linux driver (file
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* drivers/net/3c523.[ch]).
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*
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* This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
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*/
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2001-11-13 10:38:28 +03:00
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#include <sys/cdefs.h>
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2003-10-26 00:19:01 +04:00
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__KERNEL_RCSID(0, "$NetBSD: if_elmc_mca.c,v 1.14 2003/10/25 20:19:01 mycroft Exp $");
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2001-11-13 10:38:28 +03:00
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2001-03-17 02:03:15 +03:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_types.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#include <machine/bus.h>
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#include <dev/ic/i82586reg.h>
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#include <dev/ic/i82586var.h>
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#include <dev/mca/mcadevs.h>
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#include <dev/mca/mcavar.h>
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#include <dev/mca/3c523reg.h>
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struct elmc_mca_softc {
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struct ie_softc sc_ie;
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bus_space_tag_t sc_regt; /* space tag for registers */
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bus_space_handle_t sc_regh; /* space handle for registers */
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void *sc_ih; /* interrupt handle */
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};
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int elmc_mca_match __P((struct device *, struct cfdata *, void *));
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void elmc_mca_attach __P((struct device *, struct device *, void *));
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static void elmc_mca_copyin __P((struct ie_softc *, void *, int, size_t));
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static void elmc_mca_copyout __P((struct ie_softc *, const void *, int, size_t));
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static u_int16_t elmc_mca_read_16 __P((struct ie_softc *, int));
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static void elmc_mca_write_16 __P((struct ie_softc *, int, u_int16_t));
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static void elmc_mca_write_24 __P((struct ie_softc *, int, int));
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static void elmc_mca_attn __P((struct ie_softc *, int));
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static void elmc_mca_hwreset __P((struct ie_softc *, int));
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static int elmc_mca_intrhook __P((struct ie_softc *, int));
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int
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elmc_mca_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct mca_attach_args *ma = aux;
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switch (ma->ma_id) {
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case MCA_PRODUCT_3C523:
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return 1;
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}
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return 0;
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}
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void
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elmc_mca_attach(struct device *parent, struct device *self, void *aux)
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{
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struct elmc_mca_softc *asc = (void *) self;
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struct ie_softc *sc = &asc->sc_ie;
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struct mca_attach_args *ma = aux;
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int pos2, pos3, i, revision;
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int iobase, irq, pbram_addr;
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bus_space_handle_t ioh, memh;
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u_int8_t myaddr[ETHER_ADDR_LEN];
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pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
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pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
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/*
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* POS register 2: (adf pos0)
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*
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* 7 6 5 4 3 2 1 0
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* \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
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* \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307,
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* \ \ 10=2300-2307, 11=3300-3307
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* \ \______ Packet Buffer RAM Address Range:
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* \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
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* \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
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* \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
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*
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* POS register 3: (adf pos1)
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*
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* 7 6 5 4 3 2 1 0
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* \____/
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* \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
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*/
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iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
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/* get irq */
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switch (pos3 & 0x1f) {
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case 4: irq = 3; break;
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case 2: irq = 7; break;
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case 8: irq = 9; break;
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case 1: irq = 12; break;
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2003-10-25 22:34:14 +04:00
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default:
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printf("%s: cannot determine irq\n", sc->sc_dev.dv_xname);
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2003-10-26 00:19:01 +04:00
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return;
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2001-03-17 02:03:15 +03:00
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}
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pbram_addr = ELMC_MADDR_BASE + (((pos2 & 24) >> 3) * 0x8000);
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2001-04-23 10:10:08 +04:00
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printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n",
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ma->ma_slot + 1, irq);
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2001-03-17 02:03:15 +03:00
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/* map the pio registers */
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if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
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printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname);
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return;
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}
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/*
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* 3c523 has a 24K memory. The first 16K is the shared memory, while
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* the last 8K is for the EtherStart BIOS ROM, which we don't care
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* about. Just use the first 16K.
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*/
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if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
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printf("%s: unable to map memory space\n", sc->sc_dev.dv_xname);
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if (pbram_addr == 0xc0000) {
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printf("%s: memory space 0xc0000 may conflict with vga\n",
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sc->sc_dev.dv_xname);
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}
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bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
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return;
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}
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asc->sc_regt = ma->ma_iot;
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asc->sc_regh = ioh;
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sc->hwinit = NULL;
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sc->intrhook = elmc_mca_intrhook;
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sc->hwreset = elmc_mca_hwreset;
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sc->chan_attn = elmc_mca_attn;
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sc->ie_bus_barrier = NULL;
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sc->memcopyin = elmc_mca_copyin;
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sc->memcopyout = elmc_mca_copyout;
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sc->ie_bus_read16 = elmc_mca_read_16;
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sc->ie_bus_write16 = elmc_mca_write_16;
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sc->ie_bus_write24 = elmc_mca_write_24;
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sc->do_xmitnopchain = 0;
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sc->sc_mediachange = NULL;
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sc->sc_mediastatus = NULL;
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sc->bt = ma->ma_memt;
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sc->bh = memh;
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/* Map i/o space. */
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sc->sc_msize = ELMC_MADDR_SIZE;
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sc->sc_maddr = (void *)memh;
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sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
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/* set up pointers to important on-card control structures */
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sc->iscp = 0;
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sc->scb = IE_ISCP_SZ;
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sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
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sc->buf_area = sc->scb + IE_SCB_SZ;
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sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
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2001-03-17 19:59:29 +03:00
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/*
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* According to docs, we might need to read the interrupt number and
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* write it back to the IRQ select register, since the POST might not
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* configure the IRQ properly.
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*/
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(void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
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2001-03-17 02:03:15 +03:00
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/* reset the card first */
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elmc_mca_hwreset(sc, CARD_RESET);
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delay(1000000 / ( 1<< 5));
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/* zero card memory */
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bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
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/* set card to 16-bit bus mode */
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2001-11-27 02:30:59 +03:00
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bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp),
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IE_SYSBUS_16BIT);
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2001-03-17 02:03:15 +03:00
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/* set up pointers to key structures */
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elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
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elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
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elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
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/* flush setup of pointers, check if chip answers */
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bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
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BUS_SPACE_BARRIER_WRITE);
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if (!i82586_proberam(sc)) {
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printf("%s: can't talk to i82586!\n", sc->sc_dev.dv_xname);
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bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
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bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
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return;
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}
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/* revision is stored in the first 4 bits of the revision register */
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revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
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ELMC_REVISION) & ELMC_REVISION_MASK;
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/* dump known info */
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printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
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sc->sc_dev.dv_xname, revision,
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iobase, iobase + ELMC_IOADDR_SIZE - 1,
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pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
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(pos2 & 0x20) ? "ex" : "in");
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/*
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* Hardware ethernet address is stored in the first six bytes
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* of the IO space.
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*/
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for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
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myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
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printf("%s:", sc->sc_dev.dv_xname);
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i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0);
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/* establish interrupt handler */
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asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
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sc);
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2001-04-23 10:10:08 +04:00
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if (asc->sc_ih == NULL) {
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2001-03-17 02:03:15 +03:00
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printf("%s: couldn't establish interrupt handler\n",
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sc->sc_dev.dv_xname);
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2001-04-23 10:10:08 +04:00
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return;
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}
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2001-03-17 02:03:15 +03:00
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}
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static void
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elmc_mca_copyin (sc, dst, offset, size)
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struct ie_softc *sc;
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void *dst;
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int offset;
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size_t size;
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{
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int dribble;
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u_int8_t* bptr = dst;
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bus_space_barrier(sc->bt, sc->bh, offset, size,
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BUS_SPACE_BARRIER_READ);
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if (offset % 2) {
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*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
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offset++; bptr++; size--;
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}
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dribble = size % 2;
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bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
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size >> 1);
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if (dribble) {
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bptr += size - 1;
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offset += size - 1;
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*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
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}
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}
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static void
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elmc_mca_copyout (sc, src, offset, size)
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struct ie_softc *sc;
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const void *src;
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int offset;
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size_t size;
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{
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int dribble;
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int osize = size;
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int ooffset = offset;
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const u_int8_t* bptr = src;
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if (offset % 2) {
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bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
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|
|
offset++; bptr++; size--;
|
|
|
|
}
|
|
|
|
|
|
|
|
dribble = size % 2;
|
|
|
|
bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr,
|
|
|
|
size >> 1);
|
|
|
|
if (dribble) {
|
|
|
|
bptr += size - 1;
|
|
|
|
offset += size - 1;
|
|
|
|
bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
|
|
|
|
BUS_SPACE_BARRIER_WRITE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static u_int16_t
|
|
|
|
elmc_mca_read_16 (sc, offset)
|
|
|
|
struct ie_softc *sc;
|
|
|
|
int offset;
|
|
|
|
{
|
|
|
|
bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
|
|
|
|
return bus_space_read_2(sc->bt, sc->bh, offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
elmc_mca_write_16 (sc, offset, value)
|
|
|
|
struct ie_softc *sc;
|
|
|
|
int offset;
|
|
|
|
u_int16_t value;
|
|
|
|
{
|
|
|
|
bus_space_write_2(sc->bt, sc->bh, offset, value);
|
|
|
|
bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
elmc_mca_write_24 (sc, offset, addr)
|
|
|
|
struct ie_softc *sc;
|
|
|
|
int offset, addr;
|
|
|
|
{
|
|
|
|
bus_space_write_4(sc->bt, sc->bh, offset, addr +
|
|
|
|
(u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
|
|
|
|
bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Channel attention hook.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
elmc_mca_attn(sc, why)
|
|
|
|
struct ie_softc *sc;
|
|
|
|
int why;
|
|
|
|
{
|
|
|
|
struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
|
|
|
|
int intr = 0;
|
|
|
|
|
|
|
|
switch (why) {
|
|
|
|
case CHIP_PROBE:
|
|
|
|
intr = 0;
|
|
|
|
break;
|
|
|
|
case CARD_RESET:
|
|
|
|
intr = ELMC_CTRL_INT;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
|
|
|
|
ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
|
2001-05-03 15:17:36 +04:00
|
|
|
delay(1); /* should be > 500 ns */
|
2001-03-17 02:03:15 +03:00
|
|
|
bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
|
|
|
|
ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Do full card hardware reset.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
elmc_mca_hwreset(sc, why)
|
|
|
|
struct ie_softc *sc;
|
|
|
|
int why;
|
|
|
|
{
|
|
|
|
struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
|
|
|
|
|
|
|
|
/* toggle the RST bit low then high */
|
|
|
|
bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
|
|
|
|
ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
|
2001-05-03 15:17:36 +04:00
|
|
|
delay(1); /* should be > 500 ns */
|
2001-03-17 02:03:15 +03:00
|
|
|
bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
|
|
|
|
ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
|
|
|
|
|
|
|
|
elmc_mca_attn(sc, why);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Interrupt hook.
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
elmc_mca_intrhook(sc, why)
|
|
|
|
struct ie_softc *sc;
|
|
|
|
int why;
|
|
|
|
{
|
|
|
|
switch (why) {
|
|
|
|
case INTR_ACK:
|
|
|
|
elmc_mca_attn(sc, CHIP_PROBE);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
/* do nothing */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2002-10-01 01:31:52 +04:00
|
|
|
CFATTACH_DECL(elmc_mca, sizeof(struct elmc_mca_softc),
|
2002-10-02 20:33:28 +04:00
|
|
|
elmc_mca_match, elmc_mca_attach, NULL, NULL);
|