258 lines
7.6 KiB
ArmAsm
258 lines
7.6 KiB
ArmAsm
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1982, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: srt0.c 1.18 92/12/21$
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* from: @(#)srt0.c 8.1 (Berkeley) 6/10/93
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*
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* $Id: srt0.s,v 1.1 1994/01/26 02:39:02 brezak Exp $
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*/
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/*
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* Startup code for standalone system
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*/
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.globl begin
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.globl _end
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.globl _edata
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.globl _main
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.globl _configure
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.globl __rtt
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.globl _bootdev,_howto,_lowram,_machineid
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.globl _internalhpib
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STACK = 0xfffff000 | below the ROM page
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BOOTTYPE = 0xfffffdc0
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LOWRAM = 0xfffffdce
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SYSFLAG = 0xfffffed2 | system flags
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MSUS = 0xfffffedc | MSUS (?) structure
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VECTORS = 0xfffffee0 | beginning of jump vectors
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NMIRESET = 0xffffff9c | reset vector
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BUSERR = 0xfffffffc
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MAXADDR = 0xfffff000
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NBPG = 4096
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MMUCMD = 0x005f400c | MMU command/status register
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.data
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_bootdev:
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.long 0
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_howto:
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.long 0
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_lowram:
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.long 0
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_machineid:
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.long 0
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.text
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begin:
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movl #STACK,sp
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moveq #47,d0 | # of vectors - 1
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movl #VECTORS+2,a0 | addr part of first vector
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vecloop:
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movl #trap,a0@ | make it direct to trap
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addql #6,a0 | move to next vector addr
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dbf d0,vecloop | go til done
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movl #NMIRESET,a0 | NMI keyboard reset addr
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movl #nmi,a0@ | catch in reset routine
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/*
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* Determine our CPU type and look for internal HP-IB
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* (really only care about detecting 320 (no DIO-II) right now).
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*/
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lea _machineid,a0
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movl #0x808,d0
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movc d0,cacr | clear and disable on-chip cache(s)
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movl #0x200,d0 | data freeze bit
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movc d0,cacr | only exists on 68030
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movc cacr,d0 | read it back
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tstl d0 | zero?
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jeq not68030 | yes, we have 68020/68040
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movl #0x808,d0
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movc d0,cacr | clear data freeze bit again
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movl #0x80,MMUCMD | set magic cookie
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movl MMUCMD,d0 | read it back
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btst #7,d0 | cookie still on?
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jeq not370 | no, 360 or 375
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movl #4,a0@ | consider a 370 for now
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movl #0,MMUCMD | clear magic cookie
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movl MMUCMD,d0 | read it back
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btst #7,d0 | still on?
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jeq ihpibcheck | no, a 370
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movl #5,a0@ | yes, must be a 340
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jra ihpibcheck
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not370:
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movl #3,a0@ | type is at least a 360
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movl #0,MMUCMD | clear magic cookie2
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movl MMUCMD,d0 | read it back
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btst #16,d0 | still on?
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jeq ihpibcheck | no, a 360
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movl #6,a0@ | yes, must be a 345/375/400
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jra ihpibcheck
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not68030:
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bset #31,d0 | data cache enable bit
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movc d0,cacr | only exists on 68040
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movc cacr,d0 | read it back
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tstl d0 | zero?
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beq is68020 | yes, we have 68020
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moveq #0,d0 | now turn it back off
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movec d0,cacr | before we access any data
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.long 0x4e7b0004 | movc d0,itt0
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.long 0x4e7b0005 | movc d0,itt1
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.long 0x4e7b0006 | movc d0,dtt0
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.long 0x4e7b0007 | movc d0,dtt1
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.word 0xf4d8 | cinva bc
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movl MMUCMD,d0 | get MMU register
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lsrl #8,d0 | get apparent ID
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cmpb #6,d0 | id == 6?
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jeq is33mhz | yes, we have a 433s
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movl #7,a0@ | no, we have a 380/425t
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jra ihpibcheck
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is33mhz:
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movl #8,a0@ | 433s (XXX 425s returns same ID, ugh!)
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jra ihpibcheck
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is68020:
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movl #1,a0@ | consider a 330 for now
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movl #1,MMUCMD | a 68020, write HP MMU location
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movl MMUCMD,d0 | read it back
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btst #0,d0 | zero?
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jeq ihpibcheck | yes, a 330
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movl #0,a0@ | no, consider a 320 for now
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movl #0x80,MMUCMD | set magic cookie
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movl MMUCMD,d0 | read it back
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btst #7,d0 | cookie still on?
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jeq ihpibcheck | no, just a 320
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movl #2,a0@ | yes, a 350
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ihpibcheck:
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movl #0,MMUCMD | make sure MMU is off
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btst #5,SYSFLAG | do we have an internal HP-IB?
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jeq boottype | yes, continue
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clrl _internalhpib | no, clear the internal address
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/*
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* If this is a reboot, extract howto/bootdev stored by kernel
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*/
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boottype:
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cmpw #12,BOOTTYPE | is this a reboot (REQ_REBOOT)?
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jne notreboot | no, skip
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lea MAXADDR,a0 | find last page
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movl a0@+,d7 | and extract howto, bootdev
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movl a0@+,d6 | from where doboot() left them
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jra boot1
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/*
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* At this point we do not know which logical device the MSUS select
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* code refers to so we cannot construct bootdev. So we just punt
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* and let configure() construct it.
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*/
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notreboot:
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moveq #0,d6 | make sure bootdev is invalid
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cmpw #18,BOOTTYPE | does the user want to interact?
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jeq askme | yes, go to it
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moveq #0,d7 | default to RB_AUTOBOOT
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jra boot1
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askme:
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moveq #3,d7 | default to RB_SINGLE|RB_ASKNAME
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boot1:
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movl d6,_bootdev | save bootdev and howto
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movl d7,_howto | globally so all can access
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movl LOWRAM,d0 | read lowram value from bootrom
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addl #NBPG,d0 | must preserve this for bootrom to reboot
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andl #0xfffff000,d0 | round to next page
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movl d0,_lowram | stash that value
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start:
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movl #_edata,a2 | start of BSS
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movl #_end,a3 | end
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clr:
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clrb a2@+ | clear BSS
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cmpl a2,a3 | done?
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bne clr | no, keep going
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jsr _configure | configure critical devices
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jsr _main | lets go
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__rtt:
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movl #3,_howto | restarts get RB_SINGLE|RB_ASKNAME
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jmp start
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/*
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* probe a location and see if it causes a bus error
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*/
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.globl _badaddr
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_badaddr:
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movl BUSERR,__bsave | save ROM bus error handler address
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movl sp,__ssave | and current stack pointer
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movl #catchbad,BUSERR| plug in our handler
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movl sp@(4),a0 | address to probe
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movw a0@,d1 | do it
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movl __bsave,BUSERR | if we got here, it did not fault
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clrl d0 | return that this was not a bad addr
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rts
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catchbad:
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movl __bsave,BUSERR | got a bus error, so restore old handler
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movl __ssave,sp | manually restore stack
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moveq #1,d0 | indicate that we got a fault
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rts | return to caller of badaddr()
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__bsave:
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.long 0
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__ssave:
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.long 0
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.globl _trap
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trap:
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moveml #0xFFFF,sp@- | save registers
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movl sp,sp@- | push pointer to frame
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jsr _trap | call C routine to deal with it
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tstl d0
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jeq Lstop
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addql #4,sp
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moveml sp@+,#0x7FFF
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addql #8,sp
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rte
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Lstop:
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stop #0x2700 | stop cold
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nmi:
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movw #18,BOOTTYPE | mark as system switch
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jsr _kbdnmi | clear the interrupt
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jra begin | start over
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#ifdef ROMPRF
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.globl _romout
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_romout:
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movl sp@(4),d0 | line number
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movl sp@(8),a0 | string
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jsr 0x150 | do it
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rts
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#endif
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