1996-10-13 08:10:34 +04:00
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/* $NetBSD: dma.c,v 1.11 1996/10/13 04:10:52 christos Exp $ */
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1995-03-26 11:12:03 +04:00
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/*
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* Copyright (c) 1995 Leo Weppelman.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Leo Weppelman.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file contains special code dealing with the DMA interface
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* on the Atari ST.
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*
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* The DMA circuitry requires some special treatment for the peripheral
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* devices which make use of the ST's DMA feature (the hard disk and the
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* floppy drive).
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* All devices using DMA need mutually exclusive access and can follow some
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* standard pattern which will be provided in this file.
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*
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* The file contains the following entry points:
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*
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1995-04-23 02:18:17 +04:00
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* st_dmagrab: ensure exclusive access to the DMA circuitry
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* st_dmafree: free exclusive access to the DMA circuitry
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* st_dmawanted: somebody is queued waiting for DMA-access
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1995-03-26 11:12:03 +04:00
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* dmaint: DMA interrupt routine, switches to the current driver
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1995-05-14 19:46:17 +04:00
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* st_dmaaddr_set: specify 24 bit RAM address
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* st_dmaaddr_get: get address of last DMA-op
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1995-04-23 02:18:17 +04:00
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* st_dmacomm: program DMA, flush FIFO first
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1995-03-26 11:12:03 +04:00
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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1995-04-30 16:04:48 +04:00
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#include <sys/queue.h>
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1995-03-26 11:12:03 +04:00
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#include <machine/cpu.h>
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#include <machine/iomap.h>
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#include <machine/dma.h>
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#define NDMA_DEV 10 /* Max 2 floppy's, 8 hard-disks */
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1995-04-30 16:04:48 +04:00
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typedef struct dma_entry {
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TAILQ_ENTRY(dma_entry) entries; /* List pointers */
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1996-02-22 13:10:44 +03:00
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void (*call_func)(void *); /* Call when lock granted */
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void (*int_func)(void *); /* Call on DMA interrupt */
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void *softc; /* Arg. to int_func */
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int *lock_stat; /* status of DMA lock */
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1995-04-30 16:04:48 +04:00
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} DMA_ENTRY;
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/*
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* Preallocated entries. An allocator seem an overkill here.
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*/
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static DMA_ENTRY dmatable[NDMA_DEV]; /* preallocated entries */
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/*
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* Heads of free and active lists:
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*/
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static TAILQ_HEAD(freehead, dma_entry) dma_free;
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static TAILQ_HEAD(acthead, dma_entry) dma_active;
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static int must_init = 1; /* Must initialize */
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1995-03-26 11:12:03 +04:00
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1996-02-22 13:10:44 +03:00
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void cdmaint __P((int));
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long sr; /* sr at time of interrupt */
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1995-04-30 16:04:48 +04:00
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static void init_queues __P((void));
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1996-02-22 13:10:44 +03:00
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static void
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init_queues()
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1995-04-30 16:04:48 +04:00
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{
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int i;
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TAILQ_INIT(&dma_free);
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TAILQ_INIT(&dma_active);
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for(i = 0; i < NDMA_DEV; i++)
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TAILQ_INSERT_HEAD(&dma_free, &dmatable[i], entries);
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}
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1995-03-26 11:12:03 +04:00
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1996-02-22 13:10:44 +03:00
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int
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st_dmagrab(int_func, call_func, softc, lock_stat, rcaller)
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dma_farg int_func;
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dma_farg call_func;
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void *softc;
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int *lock_stat;
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int rcaller;
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1995-03-26 11:12:03 +04:00
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{
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int sps;
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1995-04-30 16:04:48 +04:00
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DMA_ENTRY *req;
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if(must_init) {
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init_queues();
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must_init = 0;
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}
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*lock_stat = DMA_LOCK_REQ;
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sps = splhigh();
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/*
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* Create a request...
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*/
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if(dma_free.tqh_first == NULL)
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panic("st_dmagrab: Too many outstanding requests\n");
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req = dma_free.tqh_first;
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TAILQ_REMOVE(&dma_free, dma_free.tqh_first, entries);
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req->call_func = call_func;
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req->int_func = int_func;
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req->softc = softc;
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req->lock_stat = lock_stat;
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TAILQ_INSERT_TAIL(&dma_active, req, entries);
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if(dma_active.tqh_first != req) {
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1995-03-26 11:12:03 +04:00
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splx(sps);
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1995-04-23 02:18:17 +04:00
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return(0);
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1995-03-26 11:12:03 +04:00
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}
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1995-04-30 16:04:48 +04:00
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splx(sps);
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/*
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* We're at the head of the queue, ergo: we got the lock.
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*/
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*lock_stat = DMA_LOCK_GRANT;
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1995-04-23 02:18:17 +04:00
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if(rcaller) {
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/*
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* Just return to caller immediately without going
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* through 'call_func' first.
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*/
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return(1);
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}
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1995-03-26 11:12:03 +04:00
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(*call_func)(softc); /* Call followup function */
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1995-04-23 02:18:17 +04:00
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return(0);
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1995-03-26 11:12:03 +04:00
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}
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1995-04-23 02:18:17 +04:00
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void
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1995-04-30 16:04:48 +04:00
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st_dmafree(softc, lock_stat)
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void *softc;
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int *lock_stat;
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1995-03-26 11:12:03 +04:00
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{
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int sps;
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1995-04-30 16:04:48 +04:00
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DMA_ENTRY *req;
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1995-03-26 11:12:03 +04:00
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1995-04-30 16:04:48 +04:00
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sps = splhigh();
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/*
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* Some validity checks first.
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*/
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if((req = dma_active.tqh_first) == NULL)
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panic("st_dmafree: empty active queue\n");
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if(req->softc != softc)
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1996-10-13 08:10:34 +04:00
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printf("Caller of st_dmafree is not lock-owner!\n");
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1995-04-30 16:04:48 +04:00
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/*
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* Clear lock status, move request from active to free queue.
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*/
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*lock_stat = 0;
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TAILQ_REMOVE(&dma_active, req, entries);
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TAILQ_INSERT_HEAD(&dma_free, req, entries);
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if((req = dma_active.tqh_first) != NULL) {
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/*
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* Call next request through softint handler. This avoids
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* spl-conflicts.
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*/
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*req->lock_stat = DMA_LOCK_GRANT;
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1996-04-20 00:35:31 +04:00
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add_sicallback((si_farg)req->call_func, req->softc, 0);
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1995-03-26 11:12:03 +04:00
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}
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splx(sps);
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1995-04-30 16:04:48 +04:00
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return;
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1995-03-26 11:12:03 +04:00
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}
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1995-04-23 02:18:17 +04:00
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int
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st_dmawanted()
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{
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1995-04-30 16:04:48 +04:00
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return(dma_active.tqh_first->entries.tqe_next != NULL);
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1995-04-23 02:18:17 +04:00
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}
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1996-02-22 13:10:44 +03:00
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void
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1995-03-26 11:12:03 +04:00
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cdmaint(sr)
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1996-02-22 13:10:44 +03:00
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int sr; /* sr at time of interrupt */
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1995-03-26 11:12:03 +04:00
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{
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1996-02-22 13:10:44 +03:00
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dma_farg int_func;
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void *softc;
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1995-05-14 19:46:17 +04:00
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if(dma_active.tqh_first != NULL) {
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int_func = dma_active.tqh_first->int_func;
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softc = dma_active.tqh_first->softc;
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1996-06-18 15:10:04 +04:00
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if(!BASEPRI(sr))
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add_sicallback((si_farg)int_func, softc, 0);
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else {
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spl1();
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(*int_func)(softc);
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1996-07-05 23:22:21 +04:00
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spl0();
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1996-06-18 15:10:04 +04:00
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}
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}
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1996-10-13 08:10:34 +04:00
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else printf("DMA interrupt discarded\n");
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1995-03-26 11:12:03 +04:00
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}
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1995-04-23 02:18:17 +04:00
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/*
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* Setup address for DMA-transfer.
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* Note: The order _is_ important!
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*/
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void
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1995-05-14 19:46:17 +04:00
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st_dmaaddr_set(address)
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1995-03-26 11:12:03 +04:00
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caddr_t address;
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{
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register u_long ad = (u_long)address;
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DMA->dma_addr[AD_LOW ] = (ad ) & 0xff;
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DMA->dma_addr[AD_MID ] = (ad >> 8) & 0xff;
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DMA->dma_addr[AD_HIGH] = (ad >>16) & 0xff;
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}
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1995-05-14 19:46:17 +04:00
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/*
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* Get address from DMA unit.
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*/
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u_long
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st_dmaaddr_get()
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{
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register u_long ad = 0;
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ad = (DMA->dma_addr[AD_LOW ] & 0xff);
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ad |= (DMA->dma_addr[AD_MID ] & 0xff) << 8;
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ad |= (DMA->dma_addr[AD_HIGH] & 0xff) <<16;
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return(ad);
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}
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1995-04-23 02:18:17 +04:00
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/*
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* Program the DMA-controller to transfer 'nblk' blocks of 512 bytes.
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* The DMA_WRBIT trick flushes the FIFO before doing DMA.
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*/
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void
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1995-05-14 19:46:17 +04:00
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st_dmacomm(mode, nblk)
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int mode, nblk;
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1995-03-26 11:12:03 +04:00
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{
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DMA->dma_mode = mode;
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1995-04-23 02:18:17 +04:00
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DMA->dma_mode = mode ^ DMA_WRBIT;
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1995-03-26 11:12:03 +04:00
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DMA->dma_mode = mode;
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1995-05-14 19:46:17 +04:00
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DMA->dma_data = nblk;
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1995-11-07 00:13:38 +03:00
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delay(2); /* Needed for Falcon */
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1995-05-14 19:46:17 +04:00
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DMA->dma_mode = DMA_SCREG | (mode & DMA_WRBIT);
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1995-03-26 11:12:03 +04:00
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}
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