1999-04-30 06:47:42 +04:00
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/* $NetBSD: tga_bt463.c,v 1.4 1999/04/30 02:47:42 nathanw Exp $ */
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1998-08-19 03:29:28 +04:00
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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1998-04-16 00:16:30 +04:00
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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1998-08-19 03:29:28 +04:00
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#include <sys/systm.h>
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1998-04-16 00:16:30 +04:00
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#include <sys/device.h>
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1998-08-19 03:29:28 +04:00
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#include <sys/buf.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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1998-04-16 00:16:30 +04:00
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#include <dev/pci/pcivar.h>
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#include <dev/pci/tgareg.h>
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#include <dev/pci/tgavar.h>
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1998-08-19 03:29:28 +04:00
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#include <dev/ic/bt463reg.h>
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#include <dev/wscons/wsconsio.h>
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/*
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* Functions exported via the RAMDAC configuration table.
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*/
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void tga_bt463_init __P((struct tga_devconfig *, int));
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int tga_bt463_intr __P((void *));
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int tga_bt463_set_cmap __P((struct tga_devconfig *,
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struct wsdisplay_cmap *));
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int tga_bt463_get_cmap __P((struct tga_devconfig *,
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struct wsdisplay_cmap *));
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int tga_bt463_check_curcmap __P((struct tga_devconfig *,
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struct wsdisplay_cursor *cursorp));
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void tga_bt463_set_curcmap __P((struct tga_devconfig *,
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struct wsdisplay_cursor *cursorp));
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int tga_bt463_get_curcmap __P((struct tga_devconfig *,
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struct wsdisplay_cursor *cursorp));
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1998-04-16 00:16:30 +04:00
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const struct tga_ramdac_conf tga_ramdac_bt463 = {
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"Bt463",
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1998-08-19 03:29:28 +04:00
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tga_bt463_init,
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tga_bt463_intr,
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tga_bt463_set_cmap,
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tga_bt463_get_cmap,
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1998-04-16 00:16:30 +04:00
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tga_builtin_set_cursor,
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tga_builtin_get_cursor,
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tga_builtin_set_curpos,
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tga_builtin_get_curpos,
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tga_builtin_get_curmax,
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1998-08-19 03:29:28 +04:00
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tga_bt463_check_curcmap,
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tga_bt463_set_curcmap,
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tga_bt463_get_curcmap,
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1998-04-16 00:16:30 +04:00
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};
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1998-08-19 03:29:28 +04:00
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/*
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* Private data.
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*/
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struct bt463data {
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int changed; /* what changed; see below */
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char curcmap_r[2]; /* cursor colormap */
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char curcmap_g[2];
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char curcmap_b[2];
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char cmap_r[BT463_NCMAP_ENTRIES]; /* colormap */
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char cmap_g[BT463_NCMAP_ENTRIES];
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char cmap_b[BT463_NCMAP_ENTRIES];
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1999-04-30 06:47:42 +04:00
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int window_type[16]; /* 16 24-bit window type table entries */
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1998-08-19 03:29:28 +04:00
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};
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#define DATA_CURCMAP_CHANGED 0x01 /* cursor colormap changed */
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#define DATA_CMAP_CHANGED 0x02 /* colormap changed */
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1999-04-30 06:47:42 +04:00
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#define DATA_WTYPE_CHANGED 0x04 /* window type table changed */
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#define DATA_ALL_CHANGED 0x07
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1998-08-19 03:29:28 +04:00
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/*
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* Internal functions.
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*/
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1999-04-30 06:47:42 +04:00
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inline void tga_bt463_wr_d __P((bus_space_tag_t, bus_space_handle_t,
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u_int, u_int8_t));
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inline u_int8_t tga_bt463_rd_d __P((bus_space_tag_t, bus_space_handle_t,
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u_int));
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inline void tga_bt463_wraddr __P((bus_space_tag_t, bus_space_handle_t,
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u_int16_t));
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void tga_bt463_update __P((bus_space_tag_t, bus_space_handle_t,
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struct bt463data *));
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#define tga_bt463_sched_update(tag,regs) \
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bus_space_write_4((tag), (regs), (TGA_REG_SISR*4), (0x00010000))
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1998-08-19 03:29:28 +04:00
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/*****************************************************************************/
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/*
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* Functions exported via the RAMDAC configuration table.
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*/
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void
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tga_bt463_init(dc, alloc)
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struct tga_devconfig *dc;
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int alloc;
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{
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struct bt463data tmp, *data;
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1999-04-30 06:47:42 +04:00
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bus_space_tag_t tag;
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bus_space_handle_t regs;
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1998-08-19 03:29:28 +04:00
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int i;
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/*
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* Init the BT463 for normal operation.
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*/
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1999-04-30 06:47:42 +04:00
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tag = dc->dc_memt;
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bus_space_subregion(tag, dc->dc_vaddr, TGA_MEM_CREGS, 512,
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®s);
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1998-08-19 03:29:28 +04:00
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/*
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1999-04-30 06:47:42 +04:00
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* Setup:
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* reg 0: 4:1 multiplexing, 25/75 blink.
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* reg 1: Overlay mapping: mapped to common palette,
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* 14 window type entries, 24-plane configuration mode,
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* 4 overlay planes, underlays disabled, no cursor.
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* reg 2: sync-on-green disabled, pedestal enabled.
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1998-08-19 03:29:28 +04:00
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*/
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1999-04-30 06:47:42 +04:00
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tga_bt463_wraddr(tag, regs, BT463_IREG_COMMAND_0);
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tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA, 0x40);
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tga_bt463_wraddr(tag, regs, BT463_IREG_COMMAND_1);
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tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA, 0x48);
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tga_bt463_wraddr(tag, regs, BT463_IREG_COMMAND_2);
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tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA, 0x40);
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1998-08-19 03:29:28 +04:00
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/*
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* Initialize the read mask.
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*/
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1999-04-30 06:47:42 +04:00
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tga_bt463_wraddr(tag, regs, BT463_IREG_READ_MASK_P0_P7);
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1998-08-19 03:29:28 +04:00
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for (i = 0; i < 3; i++)
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1999-04-30 06:47:42 +04:00
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tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA, 0xff);
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1998-08-19 03:29:28 +04:00
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/*
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* Initialize the blink mask.
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*/
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1999-04-30 06:47:42 +04:00
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tga_bt463_wraddr(tag, regs, BT463_IREG_BLINK_MASK_P0_P7);
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1998-08-19 03:29:28 +04:00
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for (i = 0; i < 3; i++)
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1999-04-30 06:47:42 +04:00
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tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA, 0);
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/*
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* Clear test register
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*/
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tga_bt463_wraddr(tag, regs, BT463_IREG_TEST);
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tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA, 0);
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1998-08-19 03:29:28 +04:00
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/*
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* If we should allocate a new private info struct, do so.
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* Otherwise, use the one we have (if it's there), or
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* use the temporary one on the stack.
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*/
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if (alloc) {
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if (dc->dc_ramdac_private != NULL)
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panic("tga_bt463_init: already have private struct");
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dc->dc_ramdac_private = malloc(sizeof *data, M_DEVBUF,
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M_WAITOK);
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}
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if (dc->dc_ramdac_private != NULL)
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data = dc->dc_ramdac_private;
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else
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data = &tmp;
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/*
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* Initalize the RAMDAC info struct to hold all of our
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* data, and fill it in.
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*/
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data->changed = DATA_ALL_CHANGED;
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/* initial cursor colormap: 0 is black, 1 is white */
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data->curcmap_r[0] = data->curcmap_g[0] = data->curcmap_b[0] = 0;
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data->curcmap_r[1] = data->curcmap_g[1] = data->curcmap_b[1] = 0xff;
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/* Initial colormap: 0 is black, everything else is white */
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data->cmap_r[0] = data->cmap_g[0] = data->cmap_b[0] = 0;
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for (i = 1; i < 256; i++)
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data->cmap_r[i] = data->cmap_g[i] = data->cmap_b[i] = 255;
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1999-04-30 06:47:42 +04:00
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/* Initialize the window type table:
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* Entry 0: 8-plane pseudocolor in the bottom 8 bits,
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* overlays disabled, colormap starting at 0.
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*
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* Lookup table bypass: no ( 0 << 23 & 0x800000) 0
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* Colormap address: 0x000 (0x000 << 17 & 0x7e0000) 0
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* Overlay mask: 0x0 ( 0 << 13 & 0x01e000) 0
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* Overlay location: P<27:24> ( 0 << 12 & 0x001000) 0
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* Display mode: Pseudocolor ( 1 << 9 & 0x000e00) 0x200
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* Number of planes: 8 ( 8 << 5 & 0x0001e0) 0x100
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* Plane shift: 16 ( 16 << 0 & 0x00001f) 10
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* --------
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* 0x310
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*/
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data->window_type[0] = 0x310;
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/* The colormap interface to the world only supports one colormap,
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* so having an entry for the 'alternate' colormap in the bt463
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* probably isn't useful.
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*/
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/* Entry 1: 24-plane truecolor, overlays disabled. */
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data->window_type[1] = 0x200;
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/* Fill the remaining table entries with clones of entry 0 until we
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* figure out a better use for them.
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*/
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for (i = 2; i < BT463_NWTYPE_ENTRIES; i++) {
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data->window_type[i] = 0x310;
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}
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/* The Bt463 won't accept window type table data
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* except during a blanking interval. Normally we would
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* do this by scheduling an interrupt, but this is run
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* during autoconfiguration, when interrupts are disabled.
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* So we spin on the end-of-frame interrupt bit.
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*/
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bus_space_write_4(tag, regs, TGA_REG_SISR*4, 0x00010001);
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bus_space_barrier(tag, regs, TGA_REG_SISR*4, 4, BUS_SPACE_BARRIER_WRITE);
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while ((bus_space_read_4(tag, regs, (TGA_REG_SISR * 4))& 0x00000001) == 0);
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tga_bt463_update(tag, regs, data);
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bus_space_write_4(tag, regs, TGA_REG_SISR*4, 0x00000001);
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bus_space_barrier(tag, regs, TGA_REG_SISR*4, 4, BUS_SPACE_BARRIER_WRITE);
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tga_bt463_sched_update(tag, regs);
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1998-08-19 03:29:28 +04:00
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}
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int
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tga_bt463_set_cmap(dc, cmapp)
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struct tga_devconfig *dc;
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struct wsdisplay_cmap *cmapp;
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{
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struct bt463data *data = dc->dc_ramdac_private;
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1999-04-30 06:47:42 +04:00
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bus_space_tag_t tag = dc->dc_memt;
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bus_space_handle_t regs;
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1998-08-19 03:29:28 +04:00
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int count, index, s;
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1999-04-30 06:47:42 +04:00
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bus_space_subregion(tag, dc->dc_vaddr, TGA_MEM_CREGS, 512,
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®s);
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1998-08-19 03:29:28 +04:00
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if ((u_int)cmapp->index >= BT463_NCMAP_ENTRIES ||
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((u_int)cmapp->index + (u_int)cmapp->count) > BT463_NCMAP_ENTRIES)
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return (EINVAL);
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if (!uvm_useracc(cmapp->red, cmapp->count, B_READ) ||
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!uvm_useracc(cmapp->green, cmapp->count, B_READ) ||
|
|
|
|
!uvm_useracc(cmapp->blue, cmapp->count, B_READ))
|
|
|
|
return (EFAULT);
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
|
|
|
|
index = cmapp->index;
|
|
|
|
count = cmapp->count;
|
|
|
|
copyin(cmapp->red, &data->cmap_r[index], count);
|
|
|
|
copyin(cmapp->green, &data->cmap_g[index], count);
|
|
|
|
copyin(cmapp->blue, &data->cmap_b[index], count);
|
|
|
|
|
|
|
|
data->changed |= DATA_CMAP_CHANGED;
|
|
|
|
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_sched_update(tag, regs);
|
1998-08-19 03:29:28 +04:00
|
|
|
splx(s);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
tga_bt463_get_cmap(dc, cmapp)
|
|
|
|
struct tga_devconfig *dc;
|
|
|
|
struct wsdisplay_cmap *cmapp;
|
|
|
|
{
|
|
|
|
struct bt463data *data = dc->dc_ramdac_private;
|
|
|
|
int error, count, index;
|
|
|
|
|
|
|
|
if ((u_int)cmapp->index >= BT463_NCMAP_ENTRIES ||
|
|
|
|
((u_int)cmapp->index + (u_int)cmapp->count) > BT463_NCMAP_ENTRIES)
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
count = cmapp->count;
|
|
|
|
index = cmapp->index;
|
|
|
|
|
|
|
|
error = copyout(&data->cmap_r[index], cmapp->red, count);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
error = copyout(&data->cmap_g[index], cmapp->green, count);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
error = copyout(&data->cmap_b[index], cmapp->blue, count);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
tga_bt463_check_curcmap(dc, cursorp)
|
|
|
|
struct tga_devconfig *dc;
|
|
|
|
struct wsdisplay_cursor *cursorp;
|
|
|
|
{
|
|
|
|
int count;
|
|
|
|
|
|
|
|
if ((u_int)cursorp->cmap.index > 2 ||
|
|
|
|
((u_int)cursorp->cmap.index +
|
|
|
|
(u_int)cursorp->cmap.count) > 2)
|
|
|
|
return (EINVAL);
|
|
|
|
count = cursorp->cmap.count;
|
|
|
|
if (!uvm_useracc(cursorp->cmap.red, count, B_READ) ||
|
|
|
|
!uvm_useracc(cursorp->cmap.green, count, B_READ) ||
|
|
|
|
!uvm_useracc(cursorp->cmap.blue, count, B_READ))
|
|
|
|
return (EFAULT);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
tga_bt463_set_curcmap(dc, cursorp)
|
|
|
|
struct tga_devconfig *dc;
|
|
|
|
struct wsdisplay_cursor *cursorp;
|
|
|
|
{
|
|
|
|
struct bt463data *data = dc->dc_ramdac_private;
|
|
|
|
int count, index;
|
1999-04-30 06:47:42 +04:00
|
|
|
bus_space_tag_t tag = dc->dc_memt;
|
|
|
|
bus_space_handle_t regs;
|
|
|
|
|
|
|
|
bus_space_subregion(tag, dc->dc_vaddr, TGA_MEM_CREGS, 512,
|
|
|
|
®s);
|
1998-08-19 03:29:28 +04:00
|
|
|
|
|
|
|
/* can't fail; parameters have already been checked. */
|
|
|
|
count = cursorp->cmap.count;
|
|
|
|
index = cursorp->cmap.index;
|
|
|
|
copyin(cursorp->cmap.red, &data->curcmap_r[index], count);
|
|
|
|
copyin(cursorp->cmap.green, &data->curcmap_g[index], count);
|
|
|
|
copyin(cursorp->cmap.blue, &data->curcmap_b[index], count);
|
|
|
|
data->changed |= DATA_CURCMAP_CHANGED;
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_sched_update(tag, regs);
|
1998-08-19 03:29:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
tga_bt463_get_curcmap(dc, cursorp)
|
|
|
|
struct tga_devconfig *dc;
|
|
|
|
struct wsdisplay_cursor *cursorp;
|
|
|
|
{
|
|
|
|
struct bt463data *data = dc->dc_ramdac_private;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
cursorp->cmap.index = 0; /* DOCMAP */
|
|
|
|
cursorp->cmap.count = 2;
|
|
|
|
if (cursorp->cmap.red != NULL) {
|
|
|
|
error = copyout(data->curcmap_r, cursorp->cmap.red, 2);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
if (cursorp->cmap.green != NULL) {
|
|
|
|
error = copyout(data->curcmap_g, cursorp->cmap.green, 2);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
if (cursorp->cmap.blue != NULL) {
|
|
|
|
error = copyout(data->curcmap_b, cursorp->cmap.blue, 2);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
tga_bt463_intr(v)
|
|
|
|
void *v;
|
|
|
|
{
|
|
|
|
struct tga_devconfig *dc = v;
|
1999-04-30 06:47:42 +04:00
|
|
|
bus_space_tag_t tag = dc->dc_memt;
|
|
|
|
bus_space_handle_t regs;
|
1998-08-19 03:29:28 +04:00
|
|
|
|
1999-04-30 06:47:42 +04:00
|
|
|
bus_space_subregion(tag, dc->dc_vaddr, TGA_MEM_CREGS, 512,
|
|
|
|
®s);
|
|
|
|
|
|
|
|
if ( (bus_space_read_4(tag, regs, TGA_REG_SISR*4) & 0x00010001) !=
|
|
|
|
0x00010001) {
|
|
|
|
printf("Spurious interrupt");
|
1998-08-19 03:29:28 +04:00
|
|
|
return 0;
|
1999-04-30 06:47:42 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
tga_bt463_update(tag, regs, dc->dc_ramdac_private);
|
|
|
|
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_SISR*4, 0x00000001);
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_SISR*4, 4, BUS_SPACE_BARRIER_WRITE);
|
1998-08-19 03:29:28 +04:00
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************************************************/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Internal functions.
|
|
|
|
*/
|
|
|
|
|
|
|
|
inline void
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_wr_d(tag, regs, btreg, val)
|
|
|
|
bus_space_tag_t tag;
|
|
|
|
bus_space_handle_t regs;
|
1998-08-19 03:29:28 +04:00
|
|
|
u_int btreg;
|
|
|
|
u_int8_t val;
|
|
|
|
{
|
|
|
|
|
|
|
|
if (btreg > BT463_REG_MAX)
|
|
|
|
panic("tga_bt463_wr_d: reg %d out of range\n", btreg);
|
|
|
|
|
1999-04-30 06:47:42 +04:00
|
|
|
/*
|
|
|
|
* In spite of the 21030 documentation, to set the MPU bus bits for
|
|
|
|
* a write, you set them in the upper bits of EPDR, not EPSR.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Strobe CE# (high->low->high) since status and data are latched on
|
|
|
|
* the falling and rising edges of this active-low signal.
|
|
|
|
*/
|
|
|
|
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_EPDR*4, 4, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_EPDR*4, (btreg << 10 ) | 0x100 | val);
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_EPDR*4, 4, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_EPDR*4, (btreg << 10 ) | 0x000 | val);
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_EPDR*4, 4, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_EPDR*4, (btreg << 10 ) | 0x100 | val);
|
1998-08-19 03:29:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
inline u_int8_t
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_rd_d(tag, regs, btreg)
|
|
|
|
bus_space_tag_t tag;
|
|
|
|
bus_space_handle_t regs;
|
1998-08-19 03:29:28 +04:00
|
|
|
u_int btreg;
|
|
|
|
{
|
|
|
|
tga_reg_t rdval;
|
|
|
|
|
|
|
|
if (btreg > BT463_REG_MAX)
|
|
|
|
panic("tga_bt463_rd_d: reg %d out of range\n", btreg);
|
|
|
|
|
1999-04-30 06:47:42 +04:00
|
|
|
/*
|
|
|
|
* Strobe CE# (high->low->high) since status and data are latched on
|
|
|
|
* the falling and rising edges of this active-low signal.
|
|
|
|
*/
|
|
|
|
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_EPSR*4, 4, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_EPSR*4, (btreg << 2) | 2 | 1);
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_EPSR*4, 4, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_EPSR*4, (btreg << 2) | 2 | 0);
|
|
|
|
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_EPSR*4, 4, BUS_SPACE_BARRIER_READ);
|
1998-08-19 03:29:28 +04:00
|
|
|
|
1999-04-30 06:47:42 +04:00
|
|
|
rdval = bus_space_read_4(tag, regs, TGA_REG_EPDR*4);
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_EPSR*4, 4, BUS_SPACE_BARRIER_WRITE);
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_EPSR*4, (btreg << 2) | 2 | 1);
|
|
|
|
|
|
|
|
return (rdval >> 16) & 0xff;
|
1998-08-19 03:29:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
inline void
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_wraddr(tag, regs, ireg)
|
|
|
|
bus_space_tag_t tag;
|
|
|
|
bus_space_handle_t regs;
|
1998-08-19 03:29:28 +04:00
|
|
|
u_int16_t ireg;
|
|
|
|
{
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_ADDR_LOW, ireg & 0xff);
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_ADDR_HIGH, (ireg >> 8) & 0xff);
|
1998-08-19 03:29:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_update(tag, regs, data)
|
|
|
|
bus_space_tag_t tag;
|
|
|
|
bus_space_handle_t regs;
|
1998-08-19 03:29:28 +04:00
|
|
|
struct bt463data *data;
|
|
|
|
{
|
1999-04-30 06:47:42 +04:00
|
|
|
int i, v, valid, blanked;
|
1998-08-19 03:29:28 +04:00
|
|
|
|
|
|
|
v = data->changed;
|
1999-04-30 06:47:42 +04:00
|
|
|
|
|
|
|
/* The Bt463 won't accept window type data except during a blanking
|
|
|
|
* interval. So we (1) do this early in the interrupt, in case it
|
|
|
|
* takes a long time, and (2) blank the screen while doing so, in case
|
|
|
|
* we run out normal vertical blanking.
|
|
|
|
*/
|
|
|
|
if (v & DATA_WTYPE_CHANGED) {
|
|
|
|
valid = bus_space_read_4(tag, regs, TGA_REG_VVVR*4);
|
|
|
|
blanked = valid | VVR_BLANK;
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_VVVR*4, blanked);
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_VVVR*4, 4,
|
|
|
|
BUS_SPACE_BARRIER_WRITE);
|
|
|
|
/* spit out the window type data */
|
|
|
|
for (i = 0; i < BT463_NWTYPE_ENTRIES; i++) {
|
|
|
|
tga_bt463_wraddr(tag, regs, BT463_IREG_WINDOW_TYPE_TABLE + i);
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA,
|
|
|
|
(data->window_type[i]) & 0xff); /* B0-7 */
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA,
|
|
|
|
(data->window_type[i] >> 8) & 0xff); /* B8-15 */
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA,
|
|
|
|
(data->window_type[i] >> 16) & 0xff); /* B16-23 */
|
|
|
|
|
|
|
|
}
|
|
|
|
bus_space_write_4(tag, regs, TGA_REG_VVVR*4, valid);
|
|
|
|
bus_space_barrier(tag, regs, TGA_REG_VVVR*4, 4,
|
|
|
|
BUS_SPACE_BARRIER_WRITE);
|
|
|
|
}
|
1998-08-19 03:29:28 +04:00
|
|
|
|
|
|
|
if (v & DATA_CURCMAP_CHANGED) {
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_wraddr(tag, regs, BT463_IREG_CURSOR_COLOR_0);
|
1998-08-19 03:29:28 +04:00
|
|
|
/* spit out the cursor data */
|
|
|
|
for (i = 0; i < 2; i++) {
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA,
|
|
|
|
data->curcmap_r[i]);
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA,
|
|
|
|
data->curcmap_g[i]);
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_IREG_DATA,
|
|
|
|
data->curcmap_b[i]);
|
1998-08-19 03:29:28 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (v & DATA_CMAP_CHANGED) {
|
1999-04-30 06:47:42 +04:00
|
|
|
|
|
|
|
tga_bt463_wraddr(tag, regs, BT463_IREG_CPALETTE_RAM);
|
1998-08-19 03:29:28 +04:00
|
|
|
/* spit out the colormap data */
|
|
|
|
for (i = 0; i < BT463_NCMAP_ENTRIES; i++) {
|
1999-04-30 06:47:42 +04:00
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_CMAP_DATA,
|
|
|
|
data->cmap_r[i]);
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_CMAP_DATA,
|
|
|
|
data->cmap_g[i]);
|
|
|
|
tga_bt463_wr_d(tag, regs, BT463_REG_CMAP_DATA,
|
|
|
|
data->cmap_b[i]);
|
1998-08-19 03:29:28 +04:00
|
|
|
}
|
|
|
|
}
|
1999-04-30 06:47:42 +04:00
|
|
|
|
|
|
|
data->changed = 0;
|
|
|
|
|
|
|
|
|
1998-08-19 03:29:28 +04:00
|
|
|
}
|