99 lines
3.8 KiB
C
99 lines
3.8 KiB
C
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/* $NetBSD: wdcvar.h,v 1.1 1998/01/14 23:42:04 cgd Exp $ */
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/*
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* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
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*
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* DMA and multi-sector PIO handling are derived from code contributed by
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* Onno van der Linden.
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*
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* Atapi support added by Manuel Bouyer.
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*
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* bus_space-ified by Christopher G. Demetriou.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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struct wdc_attachment_data {
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/* manadatory fields */
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int cap;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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bus_space_tag_t auxiot;
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bus_space_handle_t auxioh;
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/*
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* XXX data access (normal and 32-bit) may need to be
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* done via a separate iot/ioh on some systems. Let's
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* wait and see if that's the case before implementing
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* it.
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*/
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/* if WDC_CAPABILITY_DMA set in 'cap' */
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void *dma_arg;
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void (*dma_setup) __P((void *));
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void (*dma_start) __P((void *, void *, size_t,
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int));
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void (*dma_finish) __P((void *));
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};
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/* Capabilities supported by the controller */
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#define WDC_CAPABILITY_DATA32 0x01 /* 32-bit data access */
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#define WDC_CAPABILITY_DMA 0x02 /* DMA */
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struct wdc_softc {
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struct device sc_dev;
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const struct wdc_attachment_data *sc_adp;
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struct wd_link *d_link[2];
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struct scsipi_link *ab_link;
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TAILQ_HEAD(xferhead, wdc_xfer) sc_xfer;
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int sc_flags;
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#define WDCF_ACTIVE 0x01 /* controller is active */
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#define WDCF_SINGLE 0x02 /* sector at a time mode */
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#define WDCF_ERROR 0x04 /* processing a disk error */
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#define WDCF_WANTED 0x08 /* XXX locking for wd_get_parms() */
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#define WDCF_IRQ_WAIT 0x10 /* controller is waiting for irq */
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#define WDCF_ONESLAVE 0x20 /* ctrl. has one ATAPI slave attached */
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int sc_errors; /* errors during current transfer */
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u_char sc_status; /* copy of status register */
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u_char sc_error; /* copy of error register */
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u_char sc_drives_mask; /* bitmask for drives present/absent */
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};
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#define sc_cap sc_adp->cap
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#define sc_iot sc_adp->iot
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#define sc_ioh sc_adp->ioh
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#define sc_auxiot sc_adp->auxiot
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#define sc_auxioh sc_adp->auxioh
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#define sc_dma_arg sc_adp->dma_arg
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#define sc_dma_setup sc_adp->dma_setup
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#define sc_dma_start sc_adp->dma_start
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#define sc_dma_finish sc_adp->dma_finish
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void wdcattach(struct wdc_softc *, const struct wdc_attachment_data *);
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int wdcintr(void *);
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int wdcprobe(const struct wdc_attachment_data *);
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