2006-01-16 23:30:18 +03:00
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/* $NetBSD: wdc_upc.c,v 1.22 2006/01/16 20:30:19 bouyer Exp $ */
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2000-08-17 03:56:08 +04:00
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/*-
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* Copyright (c) 2000 Ben Harris
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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2005-02-27 03:26:58 +03:00
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*
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2000-08-17 03:56:08 +04:00
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* This file is part of NetBSD/arm26 -- a port of NetBSD to ARM2/3 machines. */
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2001-11-13 16:14:31 +03:00
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#include <sys/cdefs.h>
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2006-01-16 23:30:18 +03:00
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__KERNEL_RCSID(0, "$NetBSD: wdc_upc.c,v 1.22 2006/01/16 20:30:19 bouyer Exp $");
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2000-08-17 03:56:08 +04:00
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2001-11-13 16:14:31 +03:00
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#include <sys/param.h>
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2000-08-17 03:56:08 +04:00
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/ata/atavar.h> /* XXX needed by wdcvar.h */
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#include <dev/ic/upcvar.h>
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There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
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#include <dev/ic/wdcreg.h>
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2000-08-17 03:56:08 +04:00
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#include <dev/ic/wdcvar.h>
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static int wdc_upc_match(struct device *, struct cfdata *, void *);
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static void wdc_upc_attach(struct device *, struct device *, void *);
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struct wdc_upc_softc {
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struct wdc_softc sc_wdc;
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2004-08-14 19:08:04 +04:00
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struct ata_channel *sc_chanlist[1];
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struct ata_channel sc_channel;
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2004-01-01 20:18:53 +03:00
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struct ata_queue sc_chqueue;
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2004-08-14 19:14:35 +04:00
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struct wdc_regs sc_wdc_regs;
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2000-08-17 03:56:08 +04:00
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};
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2002-10-01 01:17:57 +04:00
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CFATTACH_DECL(wdc_upc, sizeof(struct wdc_upc_softc),
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2002-10-02 20:33:28 +04:00
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wdc_upc_match, wdc_upc_attach, NULL, NULL);
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2000-08-17 03:56:08 +04:00
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static int
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wdc_upc_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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/* upc_submatch does it all anyway */
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return 1;
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}
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static void
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wdc_upc_attach(struct device *parent, struct device *self, void *aux)
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{
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struct wdc_upc_softc *sc = (struct wdc_upc_softc *)self;
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2004-08-14 19:14:35 +04:00
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struct wdc_regs *wdr;
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2000-08-17 03:56:08 +04:00
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struct upc_attach_args *ua = aux;
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There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
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int i;
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2000-08-17 03:56:08 +04:00
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2004-08-14 19:14:35 +04:00
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sc->sc_wdc.regs = wdr = &sc->sc_wdc_regs;
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2004-08-20 10:39:37 +04:00
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sc->sc_wdc.sc_atac.atac_cap = ATAC_CAP_DATA16;
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sc->sc_wdc.sc_atac.atac_pio_cap = 1; /* XXX ??? */
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sc->sc_wdc.sc_atac.atac_dma_cap = 0;
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sc->sc_wdc.sc_atac.atac_udma_cap = 0;
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sc->sc_wdc.sc_atac.atac_nchannels = 1;
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2003-12-30 23:20:21 +03:00
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sc->sc_chanlist[0] = &sc->sc_channel;
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2004-08-20 10:39:37 +04:00
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sc->sc_wdc.sc_atac.atac_channels = sc->sc_chanlist;
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2004-08-14 19:14:35 +04:00
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wdr->cmd_iot = ua->ua_iot;
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wdr->cmd_baseioh = ua->ua_ioh;
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wdr->ctl_iot = ua->ua_iot;
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wdr->ctl_ioh = ua->ua_ioh2;
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2004-01-04 01:56:52 +03:00
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sc->sc_channel.ch_channel = 0;
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2004-08-20 10:39:37 +04:00
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sc->sc_channel.ch_atac = &sc->sc_wdc.sc_atac;
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2003-12-30 23:20:21 +03:00
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sc->sc_channel.ch_queue = &sc->sc_chqueue;
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2006-01-16 23:30:18 +03:00
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sc->sc_channel.ch_ndrive = 2;
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There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
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for (i = 0; i < WDC_NREG; i++) {
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if (bus_space_subregion(ua->ua_iot, ua->ua_ioh, i,
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2004-08-14 19:14:35 +04:00
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i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
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There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
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aprint_error("%s: can't subregion I/O space\n",
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2004-08-20 10:39:37 +04:00
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sc->sc_wdc.sc_atac.atac_dev.dv_xname);
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There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-28 02:02:40 +03:00
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return;
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}
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}
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2004-05-26 00:42:40 +04:00
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wdc_init_shadow_regs(&sc->sc_channel);
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2000-08-17 03:56:08 +04:00
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upc_intr_establish(ua->ua_irqhandle, IPL_BIO, wdcintr,
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&sc->sc_channel);
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2003-09-20 01:35:56 +04:00
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2003-11-01 00:25:09 +03:00
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aprint_normal("\n");
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aprint_naive("\n");
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2003-09-20 01:35:56 +04:00
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2003-10-08 14:58:12 +04:00
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wdcattach(&sc->sc_channel);
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2000-08-17 03:56:08 +04:00
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}
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