2001-01-05 15:49:52 +03:00
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/*
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* Copyright (c) 1997, 1999 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* isic - I4B Siemens ISDN Chipset Driver for ELSA Quickstep 1000pro PCI
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* =====================================================================
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*
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2001-02-21 01:24:31 +03:00
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* $Id: isic_pci_elsa_qs1p.c,v 1.2 2001/02/20 22:24:40 martin Exp $
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2001-01-05 15:49:52 +03:00
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*
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* last edit-date: [Fri Jan 5 11:38:58 2001]
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*
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*---------------------------------------------------------------------------*/
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#include "opt_isicpci.h"
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#ifdef ISICPCI_ELSA_QS1PCI
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#if defined(__NetBSD__) && __NetBSD_Version__ >= 104230000
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#include <sys/callout.h>
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#endif
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#ifdef __FreeBSD__
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#if __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <netisdn/i4b_debug.h>
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#include <netisdn/i4b_ioctl.h>
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#endif
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#include <netisdn/i4b_global.h>
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#include <netisdn/i4b_l1l2.h>
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#include <netisdn/i4b_mbuf.h>
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2001-02-21 01:24:31 +03:00
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#include <dev/ic/isic_l1.h>
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#include <dev/ic/isac.h>
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#include <dev/ic/hscx.h>
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#include <dev/ic/ipac.h>
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2001-01-05 15:49:52 +03:00
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#ifndef __FreeBSD__
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2001-02-18 12:37:19 +03:00
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#include <dev/pci/isic_pci.h>
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2001-01-05 15:49:52 +03:00
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#endif
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/* masks for register encoded in base addr */
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#define ELSA_BASE_MASK 0x0ffff
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#define ELSA_OFF_MASK 0xf0000
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/* register id's to be encoded in base addr */
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#define ELSA_IDISAC 0x00000
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#define ELSA_IDHSCXA 0x10000
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#define ELSA_IDHSCXB 0x20000
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#define ELSA_IDIPAC 0x40000
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/* offsets from base address */
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#define ELSA_OFF_ALE 0x00
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#define ELSA_OFF_RW 0x01
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2001-01-11 00:41:36 +03:00
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#define ELSA_PORT0_MEM_MAPOFF PCI_MAPREG_START
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#define ELSA_PORT0_IO_MAPOFF PCI_MAPREG_START+4
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2001-01-05 15:49:52 +03:00
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#define ELSA_PORT1_MAPOFF PCI_MAPREG_START+12
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/*---------------------------------------------------------------------------*
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* ELSA QuickStep 1000pro/PCI ISAC get fifo routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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eqs1pp_read_fifo(void *buf, const void *base, size_t len)
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{
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if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXB)
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, IPAC_HSCXB_OFF);
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insb((((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW), (u_char *)buf, (u_int)len);
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}
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else if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXA)
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, IPAC_HSCXA_OFF);
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insb((((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW), (u_char *)buf, (u_int)len);
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}
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else /* if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDISAC) */
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, IPAC_ISAC_OFF);
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insb((((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW), (u_char *)buf, (u_int)len);
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}
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}
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#else
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static void
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eqs1pp_read_fifo(struct l1_softc *sc, int what, void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[1].t;
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bus_space_handle_t h = sc->sc_maps[1].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_ISAC_OFF);
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bus_space_read_multi_1(t, h, ELSA_OFF_RW, buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXA_OFF);
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bus_space_read_multi_1(t, h, ELSA_OFF_RW, buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXB_OFF);
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bus_space_read_multi_1(t, h, ELSA_OFF_RW, buf, size);
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break;
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}
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}
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#endif
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/*---------------------------------------------------------------------------*
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* ELSA QuickStep 1000pro/PCI ISAC put fifo routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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eqs1pp_write_fifo(void *base, const void *buf, size_t len)
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{
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if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXB)
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, IPAC_HSCXB_OFF);
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outsb((((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW), (u_char *)buf, (u_int)len);
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}
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else if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXA)
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, IPAC_HSCXA_OFF);
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outsb((((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW), (u_char *)buf, (u_int)len);
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}
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else /* if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDISAC) */
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, IPAC_ISAC_OFF);
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outsb((((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW), (u_char *)buf, (u_int)len);
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}
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}
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#else
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static void
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eqs1pp_write_fifo(struct l1_softc *sc, int what, const void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[1].t;
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bus_space_handle_t h = sc->sc_maps[1].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_ISAC_OFF);
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bus_space_write_multi_1(t, h, ELSA_OFF_RW, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXA_OFF);
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bus_space_write_multi_1(t, h, ELSA_OFF_RW, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXB_OFF);
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bus_space_write_multi_1(t, h, ELSA_OFF_RW, (u_int8_t*)buf, size);
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break;
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}
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}
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#endif
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/*---------------------------------------------------------------------------*
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* ELSA QuickStep 1000pro/PCI ISAC put register routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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eqs1pp_write_reg(u_char *base, u_int offset, u_int v)
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{
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if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXB)
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{
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_HSCXB_OFF));
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW, (u_char)v);
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}
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else if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXA)
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{
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_HSCXA_OFF));
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW, (u_char)v);
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}
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else if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDISAC)
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{
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_ISAC_OFF));
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW, (u_char)v);
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}
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else /* IPAC */
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{
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_IPAC_OFF));
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outb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW, (u_char)v);
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}
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}
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#else
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static void
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eqs1pp_write_reg(struct l1_softc *sc, int what, bus_size_t offs, u_int8_t data)
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{
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bus_space_tag_t t = sc->sc_maps[1].t;
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bus_space_handle_t h = sc->sc_maps[1].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_ISAC_OFF+offs);
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bus_space_write_1(t, h, ELSA_OFF_RW, data);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXA_OFF+offs);
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bus_space_write_1(t, h, ELSA_OFF_RW, data);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXB_OFF+offs);
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bus_space_write_1(t, h, ELSA_OFF_RW, data);
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break;
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case ISIC_WHAT_IPAC:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_IPAC_OFF+offs);
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bus_space_write_1(t, h, ELSA_OFF_RW, data);
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break;
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}
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}
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#endif
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/*---------------------------------------------------------------------------*
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* ELSA QuickStep 1000pro/PCI ISAC get register routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static u_char
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eqs1pp_read_reg(u_char *base, u_int offset)
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{
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if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXB)
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_HSCXB_OFF));
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return(inb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW));
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}
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else if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDHSCXA)
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_HSCXA_OFF));
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return(inb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW));
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}
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else if(((u_int)base & ELSA_OFF_MASK) == ELSA_IDISAC)
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_ISAC_OFF));
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return(inb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW));
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}
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else /* IPAC */
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{
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outb((u_int)((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_ALE, (u_char)(offset+IPAC_IPAC_OFF));
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return(inb(((u_int)base & ELSA_BASE_MASK) + ELSA_OFF_RW));
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}
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}
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#else
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static u_int8_t
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eqs1pp_read_reg(struct l1_softc *sc, int what, bus_size_t offs)
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{
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bus_space_tag_t t = sc->sc_maps[1].t;
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bus_space_handle_t h = sc->sc_maps[1].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_ISAC_OFF+offs);
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return bus_space_read_1(t, h, ELSA_OFF_RW);
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXA_OFF+offs);
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return bus_space_read_1(t, h, ELSA_OFF_RW);
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_HSCXB_OFF+offs);
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return bus_space_read_1(t, h, ELSA_OFF_RW);
|
|
|
|
case ISIC_WHAT_IPAC:
|
|
|
|
{
|
|
|
|
bus_space_write_1(t, h, ELSA_OFF_ALE, IPAC_IPAC_OFF+offs);
|
|
|
|
return bus_space_read_1(t, h, ELSA_OFF_RW);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
|
|
* isic_attach_Eqs1pp - attach for ELSA QuickStep 1000pro/PCI
|
|
|
|
*---------------------------------------------------------------------------*/
|
|
|
|
#ifdef __FreeBSD__
|
|
|
|
int
|
|
|
|
isic_attach_Eqs1pp(int unit, unsigned int iobase1, unsigned int iobase2)
|
|
|
|
{
|
|
|
|
struct l1_softc *sc = &l1_sc[unit];
|
|
|
|
|
|
|
|
/* check max unit range */
|
|
|
|
|
|
|
|
if(unit >= ISIC_MAXUNIT)
|
|
|
|
{
|
|
|
|
printf("isic%d: Error, unit %d >= ISIC_MAXUNIT for ELSA QuickStep 1000pro/PCI!\n",
|
|
|
|
unit, unit);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
sc->sc_unit = unit;
|
|
|
|
|
|
|
|
/* setup iobase */
|
|
|
|
|
|
|
|
if((iobase2 <= 0) || (iobase2 > 0xffff))
|
|
|
|
{
|
|
|
|
printf("isic%d: Error, invalid iobase 0x%x specified for ELSA QuickStep 1000pro/PCI!\n",
|
|
|
|
unit, iobase2);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
sc->sc_port = iobase2;
|
|
|
|
|
|
|
|
/* setup access routines */
|
|
|
|
|
|
|
|
sc->clearirq = NULL;
|
|
|
|
sc->readreg = eqs1pp_read_reg;
|
|
|
|
sc->writereg = eqs1pp_write_reg;
|
|
|
|
|
|
|
|
sc->readfifo = eqs1pp_read_fifo;
|
|
|
|
sc->writefifo = eqs1pp_write_fifo;
|
|
|
|
|
|
|
|
/* setup card type */
|
|
|
|
|
|
|
|
sc->sc_cardtyp = CARD_TYPEP_ELSAQS1PCI;
|
|
|
|
|
|
|
|
/* setup IOM bus type */
|
|
|
|
|
|
|
|
sc->sc_bustyp = BUS_TYPE_IOM2;
|
|
|
|
|
|
|
|
/* setup chip type = IPAC ! */
|
|
|
|
|
|
|
|
sc->sc_ipac = 1;
|
|
|
|
sc->sc_bfifolen = IPAC_BFIFO_LEN;
|
|
|
|
|
|
|
|
/* setup ISAC and HSCX base addr */
|
|
|
|
|
|
|
|
ISAC_BASE = (caddr_t) ((u_int)iobase2 | ELSA_IDISAC);
|
|
|
|
HSCX_A_BASE = (caddr_t) ((u_int)iobase2 | ELSA_IDHSCXA);
|
|
|
|
HSCX_B_BASE = (caddr_t) ((u_int)iobase2 | ELSA_IDHSCXB);
|
|
|
|
IPAC_BASE = (caddr_t) ((u_int)iobase2 | ELSA_IDIPAC);
|
|
|
|
|
|
|
|
/* enable hscx/isac irq's */
|
|
|
|
IPAC_WRITE(IPAC_MASK, (IPAC_MASK_INT1 | IPAC_MASK_INT0));
|
|
|
|
|
|
|
|
IPAC_WRITE(IPAC_ACFG, 0); /* outputs are open drain */
|
|
|
|
IPAC_WRITE(IPAC_AOE, /* aux 5..2 are inputs, 7, 6 outputs */
|
|
|
|
(IPAC_AOE_OE5 | IPAC_AOE_OE4 | IPAC_AOE_OE3 | IPAC_AOE_OE2));
|
|
|
|
IPAC_WRITE(IPAC_ATX, 0xff); /* set all output lines high */
|
|
|
|
|
|
|
|
outb(iobase1 + 0x4c, 0x41); /* enable card interrupt */
|
|
|
|
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
#else /* !FreeBSD */
|
|
|
|
|
|
|
|
void
|
|
|
|
isic_attach_Eqs1pp(psc, pa)
|
|
|
|
struct pci_l1_softc *psc;
|
|
|
|
struct pci_attach_args *pa;
|
|
|
|
{
|
|
|
|
struct l1_softc *sc = &psc->sc_isic;
|
|
|
|
|
|
|
|
/* setup io mappings */
|
|
|
|
sc->sc_num_mappings = 2;
|
|
|
|
MALLOC_MAPS(sc);
|
|
|
|
sc->sc_maps[0].size = 0;
|
2001-01-11 00:41:36 +03:00
|
|
|
if (pci_mapreg_map(pa, ELSA_PORT0_MEM_MAPOFF, PCI_MAPREG_TYPE_MEM, 0,
|
|
|
|
&sc->sc_maps[0].t, &sc->sc_maps[0].h, NULL, NULL) != 0
|
|
|
|
&& pci_mapreg_map(pa, ELSA_PORT0_IO_MAPOFF, PCI_MAPREG_TYPE_IO, 0,
|
|
|
|
&sc->sc_maps[0].t, &sc->sc_maps[0].h, NULL, NULL) != 0) {
|
|
|
|
printf("%s: can't map card registers\n", sc->sc_dev.dv_xname);
|
2001-01-05 15:49:52 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
sc->sc_maps[1].size = 0;
|
|
|
|
if (pci_mapreg_map(pa, ELSA_PORT1_MAPOFF, PCI_MAPREG_TYPE_IO, 0,
|
|
|
|
&sc->sc_maps[1].t, &sc->sc_maps[1].h, NULL, NULL)) {
|
|
|
|
printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* setup access routines */
|
|
|
|
|
|
|
|
sc->clearirq = NULL;
|
|
|
|
sc->readreg = eqs1pp_read_reg;
|
|
|
|
sc->writereg = eqs1pp_write_reg;
|
|
|
|
|
|
|
|
sc->readfifo = eqs1pp_read_fifo;
|
|
|
|
sc->writefifo = eqs1pp_write_fifo;
|
|
|
|
|
|
|
|
/* setup card type */
|
|
|
|
|
|
|
|
sc->sc_cardtyp = CARD_TYPEP_ELSAQS1PCI;
|
|
|
|
|
|
|
|
/* setup IOM bus type */
|
|
|
|
|
|
|
|
sc->sc_bustyp = BUS_TYPE_IOM2;
|
|
|
|
|
|
|
|
/* setup chip type = IPAC ! */
|
|
|
|
|
|
|
|
sc->sc_ipac = 1;
|
|
|
|
sc->sc_bfifolen = IPAC_BFIFO_LEN;
|
|
|
|
|
|
|
|
/* enable hscx/isac irq's */
|
|
|
|
IPAC_WRITE(IPAC_MASK, (IPAC_MASK_INT1 | IPAC_MASK_INT0));
|
|
|
|
|
|
|
|
IPAC_WRITE(IPAC_ACFG, 0); /* outputs are open drain */
|
|
|
|
IPAC_WRITE(IPAC_AOE, /* aux 5..2 are inputs, 7, 6 outputs */
|
|
|
|
(IPAC_AOE_OE5 | IPAC_AOE_OE4 | IPAC_AOE_OE3 | IPAC_AOE_OE2));
|
|
|
|
IPAC_WRITE(IPAC_ATX, 0xff); /* set all output lines high */
|
|
|
|
|
|
|
|
bus_space_write_1(sc->sc_maps[0].t, sc->sc_maps[0].h, 0x4c, 0x41); /* enable card interrupt */
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* ISICPCI_ELSA_QS1PCI */
|