NetBSD/sys/dev/pci/if_ath_pci.c

281 lines
7.1 KiB
C
Raw Normal View History

/* $NetBSD: if_ath_pci.c,v 1.14 2006/06/20 14:38:34 perry Exp $ */
2003-10-16 03:24:36 +04:00
2003-10-07 09:27:17 +04:00
/*-
* Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
2003-10-07 09:27:17 +04:00
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
* 3. Neither the names of the above-listed copyright holders nor the names
* of any contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*/
#include <sys/cdefs.h>
#ifdef __FreeBSD__
__FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.11 2005/01/18 18:08:16 sam Exp $");
#endif
#ifdef __NetBSD__
__KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.14 2006/06/20 14:38:34 perry Exp $");
#endif
2003-10-07 09:27:17 +04:00
/*
* PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
*/
#include <sys/param.h>
2005-02-27 03:26:58 +03:00
#include <sys/systm.h>
#include <sys/mbuf.h>
2003-10-07 09:27:17 +04:00
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/lock.h>
#include <sys/socket.h>
#include <sys/sockio.h>
#include <sys/errno.h>
#include <sys/device.h>
2003-10-07 09:27:17 +04:00
#include <machine/bus.h>
2005-02-27 03:26:58 +03:00
2003-10-07 09:27:17 +04:00
#include <net/if.h>
#include <net/if_media.h>
#include <net/if_ether.h>
2003-10-07 09:27:17 +04:00
#include <net/if_llc.h>
#include <net/if_arp.h>
#include <net80211/ieee80211_netbsd.h>
2003-10-07 09:27:17 +04:00
#include <net80211/ieee80211_var.h>
#ifdef INET
2005-02-27 03:26:58 +03:00
#include <netinet/in.h>
2003-10-07 09:27:17 +04:00
#endif
#include <dev/ic/ath_netbsd.h>
#include <dev/ic/athvar.h>
#include <contrib/dev/ath/ah.h>
2003-10-07 09:27:17 +04:00
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcidevs.h>
2003-10-07 09:27:17 +04:00
#include <sys/device.h>
2003-10-07 09:27:17 +04:00
/*
* PCI glue.
*/
struct ath_pci_softc {
struct ath_softc sc_sc;
pci_chipset_tag_t sc_pc;
pcitag_t sc_pcitag;
struct pci_conf_state sc_pciconf;
void *sc_ih; /* interrupt handler */
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
2003-10-07 09:27:17 +04:00
};
#define BS_BAR 0x10
#define PCIR_RETRY_TIMEOUT_REG 0x40
#define PCIR_RETRY_TIMEOUT_MASK 0x0000ff00
2003-10-07 09:27:17 +04:00
static int ath_pci_match(struct device *, struct cfdata *, void *);
static void ath_pci_attach(struct device *, struct device *, void *);
static void ath_pci_shutdown(void *);
static void ath_pci_powerhook(int, void *);
static int ath_pci_detach(struct device *, int);
CFATTACH_DECL(ath_pci,
sizeof(struct ath_pci_softc),
ath_pci_match,
ath_pci_attach,
ath_pci_detach,
NULL);
2003-10-07 09:27:17 +04:00
static int
ath_pci_match(struct device *parent, struct cfdata *match, void *aux)
2003-10-07 09:27:17 +04:00
{
const char* devname;
struct pci_attach_args *pa = aux;
devname = ath_hal_probe(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id));
if (devname != NULL)
return 1;
return 0;
2003-10-07 09:27:17 +04:00
}
static int
ath_pci_setup(struct pci_attach_args *pa)
{
pci_chipset_tag_t pc = pa->pa_pc;
uint32_t res;
/*
* Enable memory mapping and bus mastering.
*/
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE);
res = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
if ((res & PCI_COMMAND_MEM_ENABLE) == 0) {
aprint_error("couldn't enable memory mapping\n");
return 0;
}
if ((res & PCI_COMMAND_MASTER_ENABLE) == 0) {
aprint_error("couldn't enable bus mastering\n");
return 0;
}
/*
* Disable retry timeout to keep PCI Tx retries from
* interfering with C3 CPU state.
*/
pci_conf_write(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG,
pci_conf_read(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG) &
~PCIR_RETRY_TIMEOUT_MASK);
return 1;
}
static void
ath_pci_attach(struct device *parent, struct device *self, void *aux)
2003-10-07 09:27:17 +04:00
{
struct ath_pci_softc *psc = (struct ath_pci_softc *)self;
2003-10-07 09:27:17 +04:00
struct ath_softc *sc = &psc->sc_sc;
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
pci_intr_handle_t ih;
void *shook;
void *phook;
const char *intrstr = NULL;
psc->sc_pc = pc;
psc->sc_pcitag = pa->pa_tag;
if (!ath_pci_setup(pa))
2003-10-07 09:27:17 +04:00
goto bad;
2005-02-27 03:26:58 +03:00
/*
* Setup memory-mapping of PCI registers.
*/
if (pci_mapreg_map(pa, BS_BAR, PCI_MAPREG_TYPE_MEM, 0, &psc->sc_iot,
&psc->sc_ioh, NULL, NULL)) {
aprint_error("cannot map register space\n");
2003-10-07 09:27:17 +04:00
goto bad;
}
sc->sc_st = HALTAG(psc->sc_iot);
sc->sc_sh = HALHANDLE(psc->sc_ioh);
2003-10-07 09:27:17 +04:00
sc->sc_invalid = 1;
/*
* Arrange interrupt line.
*/
if (pci_intr_map(pa, &ih)) {
aprint_error("couldn't map interrupt\n");
2003-10-07 09:27:17 +04:00
goto bad1;
}
intrstr = pci_intr_string(pc, ih);
psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc);
if (psc->sc_ih == NULL) {
aprint_error("couldn't map interrupt\n");
goto bad2;
2003-10-07 09:27:17 +04:00
}
printf("\n");
printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
2003-10-07 09:27:17 +04:00
sc->sc_dmat = pa->pa_dmat;
2003-10-07 09:27:17 +04:00
shook = shutdownhook_establish(ath_pci_shutdown, psc);
if (shook == NULL) {
aprint_error("couldn't make shutdown hook\n");
goto bad3;
}
2003-10-07 09:27:17 +04:00
phook = powerhook_establish(ath_pci_powerhook, psc);
if (phook == NULL) {
aprint_error("couldn't make power hook\n");
goto bad3;
}
if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0)
return;
2003-10-07 09:27:17 +04:00
shutdownhook_disestablish(shook);
powerhook_disestablish(phook);
2003-10-07 09:27:17 +04:00
bad3: pci_intr_disestablish(pc, psc->sc_ih);
bad2: /* XXX */
bad1: /* XXX */
bad:
return;
2003-10-07 09:27:17 +04:00
}
static int
ath_pci_detach(struct device *self, int flags)
2003-10-07 09:27:17 +04:00
{
struct ath_pci_softc *psc = (struct ath_pci_softc *)self;
2003-10-07 09:27:17 +04:00
ath_detach(&psc->sc_sc);
pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
2003-10-07 09:27:17 +04:00
return (0);
}
static void
ath_pci_shutdown(void *self)
2003-10-07 09:27:17 +04:00
{
struct ath_pci_softc *psc = (struct ath_pci_softc *)self;
2003-10-07 09:27:17 +04:00
ath_shutdown(&psc->sc_sc);
2003-10-07 09:27:17 +04:00
}
static void
ath_pci_powerhook(int why, void *arg)
{
struct ath_pci_softc *sc = arg;
pci_chipset_tag_t pc = sc->sc_pc;
pcitag_t tag = sc->sc_pcitag;
switch (why) {
case PWR_SOFTSUSPEND:
ath_pci_shutdown(sc);
break;
case PWR_SUSPEND:
pci_conf_capture(pc, tag, &sc->sc_pciconf);
break;
case PWR_RESUME:
pci_conf_restore(pc, tag, &sc->sc_pciconf);
break;
}
return;
}