1997-03-15 21:09:08 +03:00
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/* $NetBSD: icsidereg.h,v 1.2 1997/03/15 18:09:35 is Exp $ */
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1997-02-23 06:57:45 +03:00
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/*
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* Copyright (c) 1997 Mark Brinicombe
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* Copyright (c) 1997 Causality Limited
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Registers and address offsets for the ICS IDE card.
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*/
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/* IDE drive registers */
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#define DRIVE_REGISTERS_OFFSET 0x2800
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#define DRIVE_REGISTER_SPACING 64 /* Bytes */
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#define DRIVE_REGISTER_SPACE 0x200
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#define AUX_STATUS_REGISTER_OFFSET 0x2a80
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/* Other registers */
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#define ROM_PAGING_REGISTER_OFFSET 0x0000
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#define IRQ_STATUS_REGISTER_OFFSET 0x0000
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#define IRQ_STATUS_REGISTER_MASK 0x01
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/* Write to enable, Read to disable */
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#define IRQ_ENABLE_REGISTER_OFFSET 0x1004
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