145 lines
4.3 KiB
C
145 lines
4.3 KiB
C
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/* $NetBSD: alpha_cpu.h,v 1.1 1996/07/09 00:40:58 cgd Exp $ */
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#ifndef __ALPHA_ALPHA_CPU_H__
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#define __ALPHA_ALPHA_CPU_H__
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/*
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* Alpha CPU + OSF/1 PALcode definitions for use by the kernel.
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*
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* Definitions for:
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*
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* Processor Status Register
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* Virtual Memory Management
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* Translation Buffer Invalidation
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*
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* and miscellaneous PALcode operations.
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*/
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/*
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* Processor Status Register [OSF/1 PALcode Specific]
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*
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* Includes user/kernel mode bit, interrupt priority levels, etc.
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*/
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#define ALPHA_PSL_USERMODE 0x0008 /* set -> user mode */
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#define ALPHA_PSL_IPL_MASK 0x0007 /* interrupt level mask */
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#define ALPHA_PSL_IPL_0 0x0000 /* all interrupts enabled */
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#define ALPHA_PSL_IPL_SOFT 0x0001 /* software ints disabled */
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#define ALPHA_PSL_IPL_IO 0x0004 /* I/O dev ints disabled */
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#define ALPHA_PSL_IPL_CLOCK 0x0005 /* clock ints disabled */
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#define ALPHA_PSL_IPL_HIGH 0x0006 /* all but mchecks disabled */
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#define ALPHA_PSL_MUST_BE_ZERO 0xfffffffffffffff0
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/* Convenience constants: what must be set/clear in user mode */
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#define ALPHA_PSL_USERSET ALPHA_PSL_USERMODE
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#define ALPHA_PSL_USERCLR (ALPHA_PSL_MUST_BE_ZERO | ALPHA_PSL_IPL_MASK)
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typedef unsigned long alpha_psl_t;
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/*
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* Virtual Memory Management [OSF/1 PALcode Specific]
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*
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* Includes user and kernel space addresses and information,
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* page table entry definitions, etc.
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*
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* NOTE THAT THESE DEFINITIONS MAY CHANGE IN FUTURE ALPHA CPUS!
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*/
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#define ALPHA_PGSHIFT 13
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#define ALPHA_USEG_BASE 0 /* virtual */
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#define ALPHA_USEG_END 0x000003ffffffffff
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#define ALPHA_K0SEG_BASE 0xfffffc0000000000 /* direct-mapped */
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#define ALPHA_K0SEG_END 0xfffffe0000000000
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#define ALPHA_K1SEG_BASE ALPHA_K0SEG_END /* virtual */
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#define ALPHA_K1SEG_END 0xffffffffffffffff
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#define ALPHA_K0SEG_TO_PHYS(x) ((x) & 0x00000003ffffffff)
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#define ALPHA_PHYS_TO_K0SEG(x) ((x) | ALPHA_K0SEG_BASE)
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#define ALPHA_PTE_VALID 0x0001
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#define ALPHA_PTE_FAULT_ON_READ 0x0002
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#define ALPHA_PTE_FAULT_ON_WRITE 0x0004
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#define ALPHA_PTE_FAULT_ON_EXECUTE 0x0008
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#define ALPHA_PTE_ASM 0x0010 /* addr. space match */
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#define ALPHA_PTE_GRANULARITY 0x0060 /* granularity hint */
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#define ALPHA_PTE_PROT 0xff00
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#define ALPHA_PTE_KR 0x0100
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#define ALPHA_PTE_UR 0x0200
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#define ALPHA_PTE_KW 0x1000
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#define ALPHA_PTE_UW 0x2000
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#define ALPHA_PTE_WRITE (ALPHA_PTE_KW | ALPHA_PTE_KW)
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#define ALPHA_PTE_SOFTWARE 0xffff0000
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#define ALPHA_PTE_PFN 0xffffffff00000000
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#define ALPHA_PTE_TO_PFN(pte) ((pte) >> 32)
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#define ALPHA_PTE_FROM_PFN(pfn) ((pfn) << 32)
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typedef unsigned long alpha_pt_entry_t;
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/*
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* Translation Buffer Invalidation [OSF/1 PALcode Specific]
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*/
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#define TBIA() alpha_pal_tbi(-2, 0) /* all TB entries */
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#define TBIAP() alpha_pal_tbi(-1, 0) /* all per-process */
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#define TBISI(va) alpha_pal_tbi(1, (va)) /* ITB entry for va */
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#define TBISD(va) alpha_pal_tbi(2, (va)) /* DTB entry for va */
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#define TBIS(va) alpha_pal_tbi(3, (va)) /* all for va */
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/*
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* Stubs for Alpha instructions normally inaccessible from C.
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*/
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void alpha_mb __P((void));
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void alpha_wmb __P((void));
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/*
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* Stubs for OSF/1 PALcode operations.
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*/
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void alpha_pal_imb __P((void));
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alpha_psl_t alpha_pal_swpipl __P((alpha_psl_t));
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alpha_psl_t _alpha_pal_swpipl __P((alpha_psl_t)); /* for profiling */
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void alpha_pal_tbi __P((unsigned long, vm_offset_t));
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void alpha_pal_halt __P((void)) __attribute__((__noreturn__));
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#endif __ALPHA_ALPHA_CPU_H__
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