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Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
$NetBSD: miidevs,v 1.6 1999/05/14 11:37:30 drochner Exp $
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
/*-
Silicon Integrated Systems OUI and the SiS 900 PHY model number.
1999-03-25 00:07:04 +03:00
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
* List of known MII OUIs.
* For a complete list see http://standards.ieee.org/regauth/oui/
*
* XXX Vendors do obviously not agree how OUIs (18 bit) are mapped
* to the 16 bits available in the id registers. The MII_OUI() macro
* in "mii.h" reflects the most obvious way. If a vendor uses a
* different mapping, an "xx" prefixed OUI is defined here which is
* mangled accordingly to compensate.
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
*/
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
oui AMD 0x00001a Advanced Micro Devices
oui DAVICOM 0x00606e Davicom Semiconductor
oui ICS 0x00a0be Integrated Circuit Systems
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
oui INTEL 0x00aa00 Intel
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
oui LEVEL1 0x00207b Level 1
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
oui NATSEMI 0x080017 National Semiconductor
oui QUALSEMI 0x006051 Quality Semiconductor
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
oui SEEQ 0x00a07d Seeq
oui SIS 0x00e006 Silicon Integrated Systems
oui TI 0x080028 Texas Instruments
/* in the 79c873, AMD uses another OUI (which matches Davicom!) */
oui xxAMD 0x00606e Advanced Micro Devices
/* some vendors have the bits swapped within bytes
(ie, ordered as on the wire) */
oui xxICS 0x00057d Integrated Circuit Systems
oui xxSEEQ 0x0005be Seeq
oui xxSIS 0x000760 Silicon Integrated Systems
oui xxTI 0x100014 Texas Instruments
/* Level 1 is completely different - from right to left.
(Two bits get lost in the third OUI byte.) */
oui xxLEVEL1 0x1e0400 Level 1
/* Don't know what's going on here. */
oui xxDAVICOM 0x006040 Davicom Semiconductor
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
/*
* List of known models. Grouped by oui.
*/
Add AMD's OUI, and the model number for the AMD 79C873 10/100 Ethernet PHY.
1998-11-05 06:43:43 +03:00
/* Advanced Micro Devices PHYs */
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
model xxAMD 79C873 0x0000 Am79C873 10/100 media interface
model AMD 79c973phy 0x0036 Am79c973 internal PHY
Add AMD's OUI, and the model number for the AMD 79C873 10/100 Ethernet PHY.
1998-11-05 06:43:43 +03:00
Add oui for Davicom Semiconductor, and add Davicom DM9101 10/100 PHY.
1999-02-05 23:19:44 +03:00
/* Davicom Semiconductor PHYs */
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
model xxDAVICOM DM9101 0x0000 DM9101 10/100 media interface
Add oui for Davicom Semiconductor, and add Davicom DM9101 10/100 PHY.
1999-02-05 23:19:44 +03:00
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
/* Integrated Circuit Systems PHYs */
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
model xxICS 1890 0x0002 ICS1890 10/100 media interface
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
/* Intel PHYs */
model INTEL I82555 0x0015 i82555 10/100 media interface
/* Level 1 PHYs */
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
model xxLEVEL1 LXT970 0x0000 LXT970 10/100 media interface
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
/* National Semiconductor PHYs */
model NATSEMI DP83840 0x0000 DP83840 10/100 media interface
model NATSEMI DP83843 0x0001 DP83843 10/100 media interface
/* Quality Semiconductor PHYs */
model QUALSEMI QS6612 0x0000 QS6612 10/100 media interface
/* Seeq PHYs */
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
model xxSEEQ 80220 0x0003 Seeq 80220 10/100 media interface
model xxSEEQ 84220 0x0004 Seeq 84220 10/100 media interface
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
Silicon Integrated Systems OUI and the SiS 900 PHY model number.
1999-03-25 00:07:04 +03:00
/* Silicon Integrated Systems PHYs */
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
model xxSIS 900 0x0000 SiS 900 10/100 media interface
Silicon Integrated Systems OUI and the SiS 900 PHY model number.
1999-03-25 00:07:04 +03:00
Near complete rewrite of the MII layer to present an interface compatible with BSDI's MII layer to device drivers.
1998-08-11 03:55:16 +04:00
/* Texas Instruments PHYs */
Define OUIs in a more uniform way. OUIs are fixed entities registered with IEEE, so use the "real" OUIs for definitions. Now unfortunately vendors differ in how the MII ID register bits are used wrt bit and byte ordering. There is a straightforward way - bits numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count the bits as they appear on the wire, and some differ completely. Account for these cases by "xx" prefixed OUI definitions which compensate for this, so the MII_OUI() macro can still be used. Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
1999-05-14 15:37:30 +04:00
model xxTI TLAN10T 0x0001 ThunderLAN 10baseT media interface
model xxTI 100VGPMI 0x0002 ThunderLAN 100VG-AnyLan media interface