2002-10-02 20:02:08 +04:00
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/* $NetBSD: memerr.c,v 1.14 2002/10/02 16:02:26 thorpej Exp $ */
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1996-03-26 17:57:43 +03:00
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)memreg.c 8.1 (Berkeley) 6/11/93
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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1996-12-18 00:10:35 +03:00
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#include <machine/idprom.h>
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1996-03-26 17:57:43 +03:00
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#include <machine/pte.h>
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1998-02-05 07:56:24 +03:00
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#include <sun3/sun3/machdep.h>
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1996-03-26 17:57:43 +03:00
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#include <sun3/dev/memerr.h>
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/* #include <sun3/dev/eccreg.h> - not yet */
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#define ME_PRI 7 /* Interrupt level (NMI) */
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extern unsigned char cpu_machine_id;
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enum memerr_type { ME_PAR = 0, ME_ECC = 1 };
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struct memerr_softc {
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struct device sc_dev;
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struct memerr *sc_reg;
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enum memerr_type sc_type;
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char *sc_typename; /* "Parity" or "ECC" */
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char *sc_csrbits; /* how to print csr bits */
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/* XXX: counters? */
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};
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1996-12-18 00:10:35 +03:00
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static int memerr_match __P((struct device *, struct cfdata *, void *));
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1996-03-26 17:57:43 +03:00
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static void memerr_attach __P((struct device *, struct device *, void *));
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static int memerr_interrupt __P((void *));
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static void memerr_correctable __P((struct memerr_softc *));
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2002-10-01 09:32:42 +04:00
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CFATTACH_DECL(memerr, sizeof(struct memerr_softc),
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2002-10-02 20:02:08 +04:00
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memerr_match, memerr_attach, NULL, NULL);
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1996-03-26 17:57:43 +03:00
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2001-05-27 10:30:27 +04:00
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int memerr_attached;
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1996-03-26 17:57:43 +03:00
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static int
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1996-12-18 00:10:35 +03:00
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memerr_match(parent, cf, args)
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2001-05-27 10:30:27 +04:00
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struct device *parent;
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struct cfdata *cf;
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void *args;
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1996-03-26 17:57:43 +03:00
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{
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struct confargs *ca = args;
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2001-05-27 10:30:27 +04:00
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/* This driver only supports one instance. */
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if (memerr_attached)
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1996-03-26 17:57:43 +03:00
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return (0);
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1997-04-29 01:59:19 +04:00
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/* Make sure there is something there... */
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1996-10-30 03:24:32 +03:00
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if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
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1996-03-26 17:57:43 +03:00
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return (0);
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1996-10-30 03:24:32 +03:00
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/* Default interrupt priority. */
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if (ca->ca_intpri == -1)
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ca->ca_intpri = ME_PRI;
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return (1);
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1996-03-26 17:57:43 +03:00
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}
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static void
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memerr_attach(parent, self, args)
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struct device *parent;
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struct device *self;
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void *args;
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{
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struct memerr_softc *sc = (void *)self;
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struct confargs *ca = args;
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struct memerr *mer;
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/*
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* Which type of memory subsystem do we have?
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*/
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switch (cpu_machine_id) {
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case SUN3_MACH_160: /* XXX: correct? */
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case SUN3_MACH_260:
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1998-02-05 07:56:24 +03:00
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case SUN3X_MACH_470:
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1996-03-26 17:57:43 +03:00
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sc->sc_type = ME_ECC;
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sc->sc_typename = "ECC";
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sc->sc_csrbits = ME_ECC_STR;
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break;
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default:
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sc->sc_type = ME_PAR;
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sc->sc_typename = "Parity";
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sc->sc_csrbits = ME_PAR_STR;
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break;
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}
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1996-10-30 03:24:32 +03:00
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printf(": (%s memory)\n", sc->sc_typename);
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1996-03-26 17:57:43 +03:00
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1998-02-05 07:56:24 +03:00
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mer = bus_mapin(ca->ca_bustype, ca->ca_paddr, sizeof(*mer));
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1996-10-30 03:24:32 +03:00
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if (mer == NULL)
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panic("memerr: can not map register");
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sc->sc_reg = mer;
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1996-03-26 17:57:43 +03:00
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/* Install interrupt handler. */
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2001-05-27 10:30:27 +04:00
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isr_add_autovect(memerr_interrupt, sc, ca->ca_intpri);
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1996-03-26 17:57:43 +03:00
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/* Enable error interrupt (and checking). */
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if (sc->sc_type == ME_PAR)
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mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK;
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else {
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/*
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* XXX: Some day, figure out how to decode
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* correctable errors and set ME_ECC_CE_ENA
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* here so we can log them...
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*/
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1996-04-07 09:47:26 +04:00
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mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */
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1996-03-26 17:57:43 +03:00
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}
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2001-05-27 10:30:27 +04:00
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memerr_attached = 1;
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1996-03-26 17:57:43 +03:00
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}
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/*****************************************************************
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* Functions for ECC memory
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*****************************************************************/
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static int
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memerr_interrupt(arg)
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void *arg;
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{
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struct memerr_softc *sc = arg;
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volatile struct memerr *me = sc->sc_reg;
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1996-12-18 00:10:35 +03:00
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u_char csr, ctx;
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1996-03-26 17:57:43 +03:00
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u_int pa, va;
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int pte;
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1996-11-13 10:00:30 +03:00
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char bits[64];
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1996-03-26 17:57:43 +03:00
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csr = me->me_csr;
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if ((csr & ME_CSR_IPEND) == 0)
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return (0);
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va = me->me_vaddr;
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ctx = (va >> 28) & 0xF;
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va &= 0x0FFFffff;
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pte = get_pte(va);
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pa = PG_PA(pte);
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1996-10-13 07:47:25 +04:00
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printf("\nMemory error on %s cycle!\n",
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1996-03-26 17:57:43 +03:00
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(ctx & 8) ? "DVMA" : "CPU");
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1996-10-13 07:47:25 +04:00
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printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n",
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1996-03-26 17:57:43 +03:00
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(ctx & 7), va, pa);
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1996-11-13 10:00:30 +03:00
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printf(" csr=%s\n", bitmask_snprintf(csr, sc->sc_csrbits,
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bits, sizeof(bits)));
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1996-03-26 17:57:43 +03:00
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1996-04-07 09:47:26 +04:00
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/*
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* If we have parity-checked memory, there is
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* not much to be done. Any error is fatal.
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*/
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1996-03-26 17:57:43 +03:00
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if (sc->sc_type == ME_PAR) {
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1996-04-07 09:47:26 +04:00
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if (csr & ME_PAR_EMASK) {
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/* Parity errors are fatal. */
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goto die;
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}
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/* The IPEND bit was set, but no error bits. */
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goto noerror;
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1996-03-26 17:57:43 +03:00
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}
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/*
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* We have ECC memory. More complicated...
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*/
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if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) {
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1996-10-13 07:47:25 +04:00
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printf(" write-back failed, pte=0x%x\n", pte);
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1996-03-26 17:57:43 +03:00
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goto die;
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}
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if (csr & ME_ECC_UE) {
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1996-10-13 07:47:25 +04:00
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printf(" uncorrectable ECC error\n");
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1996-03-26 17:57:43 +03:00
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goto die;
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}
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1996-04-07 09:47:26 +04:00
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if (csr & ME_ECC_CE) {
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/* Just log this and continue. */
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1996-03-26 17:57:43 +03:00
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memerr_correctable(sc);
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1996-04-07 09:47:26 +04:00
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goto recover;
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}
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/* The IPEND bit was set, but no error bits. */
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goto noerror;
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1996-03-26 17:57:43 +03:00
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die:
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panic("all bets are off...");
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noerror:
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1996-10-13 07:47:25 +04:00
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printf("memerr: no error bits set?\n");
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1996-03-26 17:57:43 +03:00
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recover:
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/* Clear the error by writing the address register. */
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me->me_vaddr = 0;
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return (1);
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}
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/*
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* Announce (and log) a correctable ECC error.
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* Need to look at the ECC syndrome register on
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* the memory board that caused the error...
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*/
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void
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memerr_correctable(sc)
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struct memerr_softc *sc;
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{
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/* XXX: Not yet... */
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}
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