212 lines
6.4 KiB
C
212 lines
6.4 KiB
C
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/* $NetBSD: intr.h,v 1.1 2002/12/09 12:16:06 scw Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _EVBPPC_INTR_H_
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#define _EVBPPC_INTR_H_
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/* Interrupt priority `levels'. */
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#define IPL_NONE 9 /* nothing */
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#define IPL_SOFTCLOCK 8 /* software clock interrupt */
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#define IPL_SOFTNET 7 /* software network interrupt */
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#define IPL_BIO 6 /* block I/O */
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#define IPL_NET 5 /* network */
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#define IPL_SOFTSERIAL 4 /* software serial interrupt */
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#define IPL_TTY 3 /* terminal */
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#define IPL_IMP 3 /* memory allocation */
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#define IPL_AUDIO 2 /* audio */
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#define IPL_CLOCK 1 /* clock */
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#define IPL_HIGH 1 /* everything */
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#define IPL_SERIAL 0 /* serial */
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#define NIPL 10
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#ifndef _LOCORE
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/*
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* Interrupt handler chains. intr_establish() inserts a handler into
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* the list. The handler is called with its (single) argument.
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*/
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struct intrhand {
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int (*ih_fun)(void *);
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void *ih_arg;
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u_long ih_count;
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struct intrhand *ih_next;
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int ih_level;
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int ih_irq;
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};
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void setsoftclock(void);
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int splsoftclock(void);
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void setsoftnet(void);
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int splsoftnet(void);
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void do_pending_int(void);
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void ext_intr(void);
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void intr_md_register(void (*)(void *, int), void (*)(void *, int),
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int (*)(void *), void (*)(void *, int), void *);
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void *intr_establish(int, int, int, int (*)(void *), void *);
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void intr_disestablish(void *);
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void intr_init(void);
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static __inline int splraise(int);
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static __inline int spllower(int);
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static __inline void splx(int);
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static __inline void set_sint(int);
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extern volatile int cpl, ipending, astpending;
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extern u_long imask[];
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extern u_long intrcnt[];
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/*
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* Reorder protection in the following inline functions is
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* achived with the "eieio" instruction which the assembler
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* seems to detect and then doesn't move instructions past....
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*/
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static __inline int
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splraise(newcpl)
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int newcpl;
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{
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int oldcpl;
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__asm__ volatile("sync; eieio\n"); /* don't reorder.... */
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oldcpl = cpl;
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cpl = oldcpl | newcpl;
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__asm__ volatile("sync; eieio\n"); /* reorder protect */
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return(oldcpl);
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}
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static __inline void
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splx(newcpl)
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int newcpl;
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{
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__asm__ volatile("sync; eieio\n"); /* reorder protect */
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cpl = newcpl;
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if(ipending & ~newcpl)
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do_pending_int();
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__asm__ volatile("sync; eieio\n"); /* reorder protect */
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}
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static __inline int
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spllower(newcpl)
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int newcpl;
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{
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int oldcpl;
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__asm__ volatile("sync; eieio\n"); /* reorder protect */
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oldcpl = cpl;
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cpl = newcpl;
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if(ipending & ~newcpl)
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do_pending_int();
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__asm__ volatile("sync; eieio\n"); /* reorder protect */
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return(oldcpl);
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}
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/* Following code should be implemented with lwarx/stwcx to avoid
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* the disable/enable. i need to read the manual once more.... */
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static __inline void
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set_sint(pending)
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int pending;
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{
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int msrsave;
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__asm__ ("mfmsr %0" : "=r"(msrsave));
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__asm__ volatile ("mtmsr %0" :: "r"(msrsave & ~PSL_EE));
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ipending |= pending;
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__asm__ volatile ("mtmsr %0" :: "r"(msrsave));
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}
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#define ICU_LEN 32
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#define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN)
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#define IRQ_TO_MASK(x) (0x80000000UL >> (x))
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/*
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* Interrupt bits 0-18 and 25-31 are used by hardware. This
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* leaves us bits 19-24 for stoftware.
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*/
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#define HWINT_MASK ~0x1fc0
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/* Assign these to unused (reserved) interrupt bits: */
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#define CNT_SINT_NET 19
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#define CNT_SINT_CLOCK 20
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#define CNT_SINT_SERIAL 21
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#define CNT_CLOCK 22
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#define CNT_STATCLOCK 23
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#define SINT_NET IRQ_TO_MASK(CNT_SINT_NET)
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#define SINT_CLOCK IRQ_TO_MASK(CNT_SINT_CLOCK)
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#define SINT_SERIAL IRQ_TO_MASK(CNT_SINT_SERIAL)
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#define SPL_CLOCK IRQ_TO_MASK(CNT_CLOCK)
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#define SINT_MASK (SINT_CLOCK|SINT_NET|SINT_SERIAL)
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#define splbio() splraise(imask[IPL_BIO])
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#define splnet() splraise(imask[IPL_NET])
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#define spltty() splraise(imask[IPL_TTY])
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#define splclock() splraise(imask[IPL_CLOCK])
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#define splimp() splraise(imask[IPL_IMP])
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#define splvm() splraise(imask[IPL_IMP])
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#define splserial() splraise(imask[IPL_SERIAL])
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#define splstatclock() splclock()
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#define spllowersoftclock() spllower(imask[IPL_SOFTCLOCK])
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#define splsoftclock() splraise(imask[IPL_SOFTCLOCK])
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#define splsoftnet() splraise(imask[IPL_SOFTNET])
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#define splsoftserial() splraise(imask[IPL_SOFTSERIAL])
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#define spllpt() spltty()
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#define setsoftclock() set_sint(SINT_CLOCK);
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#define setsoftnet() set_sint(SINT_NET);
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#define setsoftserial() set_sint(SINT_SERIAL);
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#define splhigh() splraise(imask[IPL_HIGH])
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#define spl0() spllower(0)
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#define splsched() splhigh()
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#define spllock() splhigh()
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void softnet(void);
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void softserial(void);
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#endif /* !_LOCORE */
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#endif /* !_EVBPPC_INTR_H_ */
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