NetBSD/sys/dev/scsipi/scsi_message.h

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/* $NetBSD: scsi_message.h,v 1.4 2000/03/15 02:02:37 fvdl Exp $ */
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/* Messages (1 byte) */ /* I/T (M)andatory or (O)ptional */
#define MSG_CMDCOMPLETE 0x00 /* M/M */
#define MSG_EXTENDED 0x01 /* O/O */
#define MSG_SAVEDATAPOINTER 0x02 /* O/O */
#define MSG_RESTOREPOINTERS 0x03 /* O/O */
#define MSG_DISCONNECT 0x04 /* O/O */
#define MSG_INITIATOR_DET_ERR 0x05 /* M/M */
#define MSG_ABORT 0x06 /* O/M */
#define MSG_MESSAGE_REJECT 0x07 /* M/M */
#define MSG_NOOP 0x08 /* M/M */
#define MSG_PARITY_ERROR 0x09 /* M/M */
#define MSG_LINK_CMD_COMPLETE 0x0a /* O/O */
#define MSG_LINK_CMD_COMPLETEF 0x0b /* O/O */
#define MSG_BUS_DEV_RESET 0x0c /* O/M */
#define MSG_ABORT_TAG 0x0d /* O/O */
#define MSG_CLEAR_QUEUE 0x0e /* O/O */
#define MSG_INIT_RECOVERY 0x0f /* O/O */
#define MSG_REL_RECOVERY 0x10 /* O/O */
#define MSG_TERM_IO_PROC 0x11 /* O/O */
/* Messages (2 byte) */
#define MSG_SIMPLE_Q_TAG 0x20 /* O/O */
#define MSG_HEAD_OF_Q_TAG 0x21 /* O/O */
#define MSG_ORDERED_Q_TAG 0x22 /* O/O */
#define MSG_IGN_WIDE_RESIDUE 0x23 /* O/O */
dev/microcode/aic7xxx/aic7xxx.seq, dev/microcode/aic7xxx_seq.h, dev/ic/aic7xxxreg.h: Remove intrinsic knowledge about SDTR and WDTR messages and replace it with a generic message system that allows the kernel driver to handle SDTR, WDTR and any other type of extended message it chooses too. This makes the sequencer code much simpler, makes extended message handling debuggable since the bulk of the work is in the kernel driver, and saves lots of instruction space. Regen microcode header file. dev/ic/aic7xxx.c, dev/ic/aic7xxxvar.h: Add code to handle WDTR and SDTR negotiation in light of the changes in the message interface to the sequencer. Don't reject targets that negotiate async by sending an SDTR with a 0 offset. Use an sdtr message with 0,0 to negotiate async when a target suggests a period that is too long for us to handle. Some tape and cdrom drives don't like us doing the message reject that we did in the past. Fix a problem with handing the QUEUE FULL condition. Fix a race condition (most likely the cause of the SCB paging problems) that might allow the sequencer to get unpaused before the condition that caused it to be paused (a SEQINT) was handled. Race condition pointed out by Doug Ledford <dledford@dialnet.net> and by "Dan Willis" <dan@plutotech.com>. dev/pci/ahc_pci.c: Add support for the 2940AU, an aic7860 based controller. dev/pci/pcidevs.h, dev/pci/pcidevs_data.h: Add product IDs for the 2940AU, aic7860 and aic7855. Regen data file. scsi/scsi_message.h: Add MSG_EXT_SDTR_LEN and MSG_EXT_WDTR_LEN - the length of bytes in these extended messages. Thanks to Chuck Cranor <chuck@maria.wustl.edu> for testing these changes out for me.
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/* Identify message */ /* M/M */
#define MSG_IDENTIFYFLAG 0x80
#define MSG_IDENTIFY_DISCFLAG 0x40
dev/microcode/aic7xxx/aic7xxx.seq, dev/microcode/aic7xxx_seq.h, dev/ic/aic7xxxreg.h: Remove intrinsic knowledge about SDTR and WDTR messages and replace it with a generic message system that allows the kernel driver to handle SDTR, WDTR and any other type of extended message it chooses too. This makes the sequencer code much simpler, makes extended message handling debuggable since the bulk of the work is in the kernel driver, and saves lots of instruction space. Regen microcode header file. dev/ic/aic7xxx.c, dev/ic/aic7xxxvar.h: Add code to handle WDTR and SDTR negotiation in light of the changes in the message interface to the sequencer. Don't reject targets that negotiate async by sending an SDTR with a 0 offset. Use an sdtr message with 0,0 to negotiate async when a target suggests a period that is too long for us to handle. Some tape and cdrom drives don't like us doing the message reject that we did in the past. Fix a problem with handing the QUEUE FULL condition. Fix a race condition (most likely the cause of the SCB paging problems) that might allow the sequencer to get unpaused before the condition that caused it to be paused (a SEQINT) was handled. Race condition pointed out by Doug Ledford <dledford@dialnet.net> and by "Dan Willis" <dan@plutotech.com>. dev/pci/ahc_pci.c: Add support for the 2940AU, an aic7860 based controller. dev/pci/pcidevs.h, dev/pci/pcidevs_data.h: Add product IDs for the 2940AU, aic7860 and aic7855. Regen data file. scsi/scsi_message.h: Add MSG_EXT_SDTR_LEN and MSG_EXT_WDTR_LEN - the length of bytes in these extended messages. Thanks to Chuck Cranor <chuck@maria.wustl.edu> for testing these changes out for me.
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#define MSG_IDENTIFY(lun, disc) (((disc) ? 0xc0 : MSG_IDENTIFYFLAG) | (lun))
#define MSG_ISIDENTIFY(m) ((m) & MSG_IDENTIFYFLAG)
dev/microcode/aic7xxx/aic7xxx.seq, dev/microcode/aic7xxx_seq.h, dev/ic/aic7xxxreg.h: Remove intrinsic knowledge about SDTR and WDTR messages and replace it with a generic message system that allows the kernel driver to handle SDTR, WDTR and any other type of extended message it chooses too. This makes the sequencer code much simpler, makes extended message handling debuggable since the bulk of the work is in the kernel driver, and saves lots of instruction space. Regen microcode header file. dev/ic/aic7xxx.c, dev/ic/aic7xxxvar.h: Add code to handle WDTR and SDTR negotiation in light of the changes in the message interface to the sequencer. Don't reject targets that negotiate async by sending an SDTR with a 0 offset. Use an sdtr message with 0,0 to negotiate async when a target suggests a period that is too long for us to handle. Some tape and cdrom drives don't like us doing the message reject that we did in the past. Fix a problem with handing the QUEUE FULL condition. Fix a race condition (most likely the cause of the SCB paging problems) that might allow the sequencer to get unpaused before the condition that caused it to be paused (a SEQINT) was handled. Race condition pointed out by Doug Ledford <dledford@dialnet.net> and by "Dan Willis" <dan@plutotech.com>. dev/pci/ahc_pci.c: Add support for the 2940AU, an aic7860 based controller. dev/pci/pcidevs.h, dev/pci/pcidevs_data.h: Add product IDs for the 2940AU, aic7860 and aic7855. Regen data file. scsi/scsi_message.h: Add MSG_EXT_SDTR_LEN and MSG_EXT_WDTR_LEN - the length of bytes in these extended messages. Thanks to Chuck Cranor <chuck@maria.wustl.edu> for testing these changes out for me.
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/* Extended messages (opcode and length) */
#define MSG_EXT_SDTR 0x01
dev/microcode/aic7xxx/aic7xxx.seq, dev/microcode/aic7xxx_seq.h, dev/ic/aic7xxxreg.h: Remove intrinsic knowledge about SDTR and WDTR messages and replace it with a generic message system that allows the kernel driver to handle SDTR, WDTR and any other type of extended message it chooses too. This makes the sequencer code much simpler, makes extended message handling debuggable since the bulk of the work is in the kernel driver, and saves lots of instruction space. Regen microcode header file. dev/ic/aic7xxx.c, dev/ic/aic7xxxvar.h: Add code to handle WDTR and SDTR negotiation in light of the changes in the message interface to the sequencer. Don't reject targets that negotiate async by sending an SDTR with a 0 offset. Use an sdtr message with 0,0 to negotiate async when a target suggests a period that is too long for us to handle. Some tape and cdrom drives don't like us doing the message reject that we did in the past. Fix a problem with handing the QUEUE FULL condition. Fix a race condition (most likely the cause of the SCB paging problems) that might allow the sequencer to get unpaused before the condition that caused it to be paused (a SEQINT) was handled. Race condition pointed out by Doug Ledford <dledford@dialnet.net> and by "Dan Willis" <dan@plutotech.com>. dev/pci/ahc_pci.c: Add support for the 2940AU, an aic7860 based controller. dev/pci/pcidevs.h, dev/pci/pcidevs_data.h: Add product IDs for the 2940AU, aic7860 and aic7855. Regen data file. scsi/scsi_message.h: Add MSG_EXT_SDTR_LEN and MSG_EXT_WDTR_LEN - the length of bytes in these extended messages. Thanks to Chuck Cranor <chuck@maria.wustl.edu> for testing these changes out for me.
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#define MSG_EXT_SDTR_LEN 0x03
#define MSG_EXT_WDTR 0x03
#define MSG_EXT_WDTR_LEN 0x02
#define MSG_EXT_WDTR_BUS_8_BIT 0x00
#define MSG_EXT_WDTR_BUS_16_BIT 0x01
#define MSG_EXT_WDTR_BUS_32_BIT 0x02