1999-10-27 18:14:18 +04:00
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/* $NetBSD: cardbus_map.c,v 1.5 1999/10/27 14:14:18 joda Exp $ */
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1999-10-15 10:07:17 +04:00
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/*
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* Copyright (c) 1999
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* HAYAKAWA Koichi. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by HAYAKAWA Koichi.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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1999-10-15 14:59:56 +04:00
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/* #define CARDBUS_MAP_DEBUG 1 */
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1999-10-15 10:07:17 +04:00
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <dev/cardbus/cardbusvar.h>
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#include <dev/pci/pcireg.h> /* XXX */
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#if defined DEBUG && !defined CARDBUS_MAP_DEBUG
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#define CARDBUS_MAP_DEBUG
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#endif
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#if defined CARDBUS_MAP_DEBUG
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#define STATIC
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#define DPRINTF(a) printf a
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#else
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#define STATIC static
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#define DPRINTF(a)
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#endif
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static int cardbus_io_find __P((cardbus_chipset_tag_t, cardbus_function_tag_t,
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cardbustag_t, int, cardbusreg_t,
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bus_addr_t *, bus_size_t *, int *));
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static int cardbus_mem_find __P((cardbus_chipset_tag_t, cardbus_function_tag_t,
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cardbustag_t, int, cardbusreg_t,
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bus_addr_t *, bus_size_t *, int *));
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/*
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* static int cardbus_io_find(cardbus_chipset_tag_t cc,
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* cardbus_function_tag_t cf, cardbustag_t tag,
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* int reg, cardbusreg_t type, bus_addr_t *basep,
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* bus_size_t *sizep, int *flagsp)
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* This code is stallen from sys/dev/pci_map.c.
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*/
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static int
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cardbus_io_find(cc, cf, tag, reg, type, basep, sizep, flagsp)
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cardbus_chipset_tag_t cc;
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cardbus_function_tag_t cf;
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cardbustag_t tag;
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int reg;
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cardbusreg_t type;
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bus_addr_t *basep;
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bus_size_t *sizep;
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int *flagsp;
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{
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cardbusreg_t address, mask;
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int s;
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1999-10-27 18:14:18 +04:00
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if (reg != CARDBUS_ROM_REG
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&& (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))) {
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1999-10-15 10:07:17 +04:00
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panic("cardbus_io_find: bad request");
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}
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/*
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* Section 6.2.5.1, `Address Maps', tells us that:
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*
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* 1) The builtin software should have already mapped the device in a
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* reasonable way.
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*
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* 2) A device which wants 2^n bytes of memory will hardwire the bottom
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* n bits of the address to 0. As recommended, we write all 1s and see
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* what we get back.
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*/
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s = splhigh();
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address = cardbus_conf_read(cc, cf, tag, reg);
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cardbus_conf_write(cc, cf, tag, reg, 0xffffffff);
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mask = cardbus_conf_read(cc, cf, tag, reg);
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cardbus_conf_write(cc, cf, tag, reg, address);
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splx(s);
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if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_IO) {
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printf("pci_io_find: expected type i/o, found mem\n");
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return 1;
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}
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if (PCI_MAPREG_IO_SIZE(mask) == 0) {
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printf("pci_io_find: void region\n");
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return (1);
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}
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if (basep != 0) {
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*basep = PCI_MAPREG_IO_ADDR(address);
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}
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if (sizep != 0) {
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*sizep = PCI_MAPREG_IO_SIZE(mask);
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}
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if (flagsp != 0) {
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*flagsp = 0;
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}
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return 0;
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}
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/*
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* static int cardbus_mem_find(cardbus_chipset_tag_t cc,
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* cardbus_function_tag_t cf, cardbustag_t tag,
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* int reg, cardbusreg_t type, bus_addr_t *basep,
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* bus_size_t *sizep, int *flagsp)
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* This code is stallen from sys/dev/pci_map.c.
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*/
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static int
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cardbus_mem_find(cc, cf, tag, reg, type, basep, sizep, flagsp)
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cardbus_chipset_tag_t cc;
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cardbus_function_tag_t cf;
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cardbustag_t tag;
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int reg;
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cardbusreg_t type;
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bus_addr_t *basep;
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bus_size_t *sizep;
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int *flagsp;
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{
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cardbusreg_t address, mask;
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int s;
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1999-10-27 18:14:18 +04:00
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if (reg != CARDBUS_ROM_REG &&
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(reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))) {
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1999-10-15 10:07:17 +04:00
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panic("cardbus_find_mem: bad request");
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}
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/*
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* Section 6.2.5.1, `Address Maps', tells us that:
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*
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* 1) The builtin software should have already mapped the device in a
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* reasonable way.
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*
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* 2) A device which wants 2^n bytes of memory will hardwire the bottom
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* n bits of the address to 0. As recommended, we write all 1s and see
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* what we get back.
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*/
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s = splhigh();
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address = cardbus_conf_read(cc, cf, tag, reg);
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cardbus_conf_write(cc, cf, tag, reg, 0xffffffff);
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mask = cardbus_conf_read(cc, cf, tag, reg);
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cardbus_conf_write(cc, cf, tag, reg, address);
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splx(s);
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if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_MEM) {
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printf("cardbus_mem_find: expected type mem, found i/o\n");
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return 1;
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}
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if (PCI_MAPREG_MEM_TYPE(address) != PCI_MAPREG_MEM_TYPE(type)) {
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printf("cardbus_mem_find: expected mem type %08x, found %08x\n",
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PCI_MAPREG_MEM_TYPE(type),
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PCI_MAPREG_MEM_TYPE(address));
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return 1;
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}
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if (PCI_MAPREG_MEM_SIZE(mask) == 0) {
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printf("cardbus_mem_find: void region\n");
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return 1;
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}
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switch (PCI_MAPREG_MEM_TYPE(address)) {
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case PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_MEM_TYPE_32BIT_1M:
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break;
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case PCI_MAPREG_MEM_TYPE_64BIT:
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printf("pci_mem_find: 64-bit memory mapping register\n");
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return 1;
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default:
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printf("cardbus_mem_find: reserved mapping register type\n");
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return 1;
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}
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if (basep != 0) {
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*basep = PCI_MAPREG_MEM_ADDR(address);
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}
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if (sizep != 0) {
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*sizep = PCI_MAPREG_MEM_SIZE(mask);
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}
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if (flagsp != 0) {
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*flagsp = PCI_MAPREG_MEM_CACHEABLE(address) ? BUS_SPACE_MAP_CACHEABLE : 0;
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}
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return 0;
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}
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/*
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1999-10-27 14:04:41 +04:00
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* int cardbus_mapreg_map(struct cardbus_softc *, int, int, cardbusreg_t,
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1999-10-15 10:07:17 +04:00
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* int bus_space_tag_t *, bus_space_handle_t *,
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* bus_addr_t *, bus_size_t *)
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* This function maps bus-space on the value of Base Address
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* Register (BAR) indexed by the argument `reg' (the second argument).
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* When the value of the BAR is not valid, such as 0x00000000, a new
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* address should be allocated for the BAR and new address values is
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* written on the BAR.
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*/
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int
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1999-10-27 14:04:41 +04:00
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cardbus_mapreg_map(sc, func, reg, type, busflags, tagp, handlep, basep, sizep)
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struct cardbus_softc *sc;
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int func, reg, busflags;
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1999-10-15 10:07:17 +04:00
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cardbusreg_t type;
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bus_space_tag_t *tagp;
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bus_space_handle_t *handlep;
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bus_addr_t *basep;
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bus_size_t *sizep;
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{
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1999-10-27 14:04:41 +04:00
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cardbus_chipset_tag_t cc = sc->sc_cc;
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cardbus_function_tag_t cf = sc->sc_cf;
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1999-10-15 10:07:17 +04:00
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bus_space_tag_t bustag;
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#if rbus
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rbus_tag_t rbustag;
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#endif
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bus_space_handle_t handle;
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bus_addr_t base;
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bus_size_t size;
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int flags;
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int status = 0;
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1999-10-27 14:04:41 +04:00
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cardbustag_t tag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device, func);
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1999-10-15 10:07:17 +04:00
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1999-10-27 14:04:41 +04:00
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DPRINTF(("cardbus_mapreg_map called: %s %x\n", sc->sc_dev.dv_xname,
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1999-10-15 10:07:17 +04:00
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type));
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if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
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if (cardbus_io_find(cc, cf, tag, reg, type, &base, &size, &flags)) {
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status = 1;
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}
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1999-10-27 14:04:41 +04:00
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bustag = sc->sc_iot;
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1999-10-15 10:07:17 +04:00
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#if rbus
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1999-10-27 14:04:41 +04:00
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rbustag = sc->sc_rbus_iot;
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1999-10-15 10:07:17 +04:00
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#endif
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} else {
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if (cardbus_mem_find(cc, cf, tag, reg, type, &base, &size, &flags)){
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status = 1;
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}
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1999-10-27 14:04:41 +04:00
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bustag = sc->sc_memt;
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1999-10-15 10:07:17 +04:00
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#if rbus
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1999-10-27 14:04:41 +04:00
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rbustag = sc->sc_rbus_memt;
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1999-10-15 10:07:17 +04:00
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#endif
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}
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if (status == 0) {
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#if rbus
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bus_addr_t mask = size - 1;
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if (base != 0) {
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mask = 0xffffffff;
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}
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if ((*cf->cardbus_space_alloc)(cc, rbustag, base, size, mask, size,
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busflags | flags, &base, &handle)) {
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panic("io alloc");
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}
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#else
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bus_addr_t start = 0x8300;
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bus_addr_t end = 0x8400;
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if (base != 0) {
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bus_addr_t start = base;
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bus_addr_t end = base + size;
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}
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if (bus_space_alloc(bustag, start, end, size, size, 0, 0, &base, &handle)) {
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panic("io alloc");
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}
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#endif
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}
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cardbus_conf_write(cc, cf, tag, reg, base);
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DPRINTF(("cardbus_mapreg_map: physaddr %lx\n", base));
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if (tagp != 0) {
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*tagp = bustag;
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}
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if (handlep != 0) {
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*handlep = handle;
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}
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if (basep != 0) {
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*basep = base;
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}
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if (sizep != 0) {
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*sizep = size;
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}
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1999-10-27 14:04:41 +04:00
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cardbus_free_tag(cc, cf, tag);
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1999-10-15 10:07:17 +04:00
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return 0;
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}
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/*
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* int cardbus_save_bar(cardbus_devfunc_t);
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*
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* This function saves the Base Address Registers at the CardBus
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* function denoted by the argument.
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*/
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int cardbus_save_bar(ct)
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cardbus_devfunc_t ct;
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{
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cardbustag_t tag = Cardbus_make_tag(ct);
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cardbus_chipset_tag_t cc = ct->ct_cc;
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cardbus_function_tag_t cf = ct->ct_cf;
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ct->ct_bar[0] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE0_REG);
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ct->ct_bar[1] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE1_REG);
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ct->ct_bar[2] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE2_REG);
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ct->ct_bar[3] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE3_REG);
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ct->ct_bar[4] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE4_REG);
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ct->ct_bar[5] = cardbus_conf_read(cc, cf, tag, CARDBUS_BASE5_REG);
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DPRINTF(("cardbus_save_bar: %x %x\n", ct->ct_bar[0], ct->ct_bar[1]));
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Cardbus_free_tag(ct, tag);
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return 0;
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}
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/*
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* int cardbus_restore_bar(cardbus_devfunc_t);
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|
|
*
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|
* This function saves the Base Address Registers at the CardBus
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|
* function denoted by the argument.
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|
|
*/
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|
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int cardbus_restore_bar(ct)
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|
|
cardbus_devfunc_t ct;
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|
|
|
{
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|
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|
cardbustag_t tag = Cardbus_make_tag(ct);
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|
|
cardbus_chipset_tag_t cc = ct->ct_cc;
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|
|
cardbus_function_tag_t cf = ct->ct_cf;
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cardbus_conf_write(cc, cf, tag, CARDBUS_BASE0_REG, ct->ct_bar[0]);
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|
cardbus_conf_write(cc, cf, tag, CARDBUS_BASE1_REG, ct->ct_bar[1]);
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|
cardbus_conf_write(cc, cf, tag, CARDBUS_BASE2_REG, ct->ct_bar[2]);
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|
cardbus_conf_write(cc, cf, tag, CARDBUS_BASE3_REG, ct->ct_bar[3]);
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|
cardbus_conf_write(cc, cf, tag, CARDBUS_BASE4_REG, ct->ct_bar[4]);
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|
cardbus_conf_write(cc, cf, tag, CARDBUS_BASE5_REG, ct->ct_bar[5]);
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|
|
|
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|
|
|
Cardbus_free_tag(ct, tag);
|
|
|
|
return 0;
|
|
|
|
}
|