1993-10-14 08:22:57 +03:00
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/*-
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* Copyright (c) 1993 Charles Hannum.
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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1993-10-22 23:24:14 +03:00
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* $Id: dma.c,v 1.4 1993/10/22 20:24:14 mycroft Exp $
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1993-10-14 08:22:57 +03:00
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*/
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/*
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* code to deal with ISA DMA
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*/
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1993-10-17 08:34:23 +03:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/cpu.h>
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#include <machine/pio.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/isavar.h>
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#include <i386/isa/ic/i8237.h>
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1993-10-14 08:22:57 +03:00
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/*
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** Register definitions for DMA controller 1 (channels 0..3):
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*/
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#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
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#define DMA1_SR (IO_DMA1 + 1*8) /* status register */
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#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
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#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
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#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
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/*
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** Register definitions for DMA controller 2 (channels 4..7):
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*/
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#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
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#define DMA2_SR (IO_DMA2 + 2*8) /* status register */
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#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
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#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
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#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
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/* region of physical memory known to be contiguous */
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caddr_t isaphysmem;
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static caddr_t bouncebuf[8]; /* XXX */
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static caddr_t bounced[8]; /* XXX */
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static vm_size_t bouncesize[8]; /* XXX */
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/* high byte of address is stored in this port for i-th dma channel */
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static u_short dmapageport[8] =
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{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
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1993-10-22 23:24:14 +03:00
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/*
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* at_setup_dmachan(): allocate bounce buffer and check for conflicts.
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*
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* XXX
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* This sucks. We should be able to bounce more than NBPG bytes, but I
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* don't feel like writing the code to do contiguous allocation right now.
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*/
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void
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at_setup_dmachan(chan, max)
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int chan;
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u_long max;
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{
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#ifdef DIAGNOSTIC
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if (chan > 7 || chan < 0)
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panic("at_setup_dmachan: impossible request");
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if (max > NBPG)
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panic("at_setup_dmachan: what a lose");
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#endif
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/* XXX check for drq conflict? */
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bouncebuf[chan] = (caddr_t) isaphysmem + NBPG*chan;
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}
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1993-10-14 08:22:57 +03:00
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/*
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* at_dma_cascade(): program 8237 DMA controller channel to accept
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* external dma control by a board.
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*/
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void
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at_dma_cascade(chan)
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1993-10-22 23:24:14 +03:00
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int chan;
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1993-10-14 08:22:57 +03:00
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{
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1993-10-22 23:24:14 +03:00
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1993-10-14 08:22:57 +03:00
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#ifdef DIAGNOSTIC
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1993-10-22 23:24:14 +03:00
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if (chan > 7 || chan < 0)
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1993-10-14 08:22:57 +03:00
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panic("at_dma_cascade: impossible request");
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#endif
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1993-10-22 23:24:14 +03:00
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/* XXX check for drq conflict? */
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1993-10-14 08:22:57 +03:00
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0) {
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outb(DMA1_MODE, DMA37MD_CASCADE | chan);
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outb(DMA1_SMSK, chan);
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} else {
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outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
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outb(DMA2_SMSK, chan & 3);
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}
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}
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/*
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* at_dma(): program 8237 DMA controller channel, avoid page alignment
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* problems by using a bounce buffer.
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*/
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void
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at_dma(read, addr, nbytes, chan)
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int read;
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caddr_t addr;
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vm_size_t nbytes;
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1993-10-22 23:24:14 +03:00
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int chan;
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1993-10-14 08:22:57 +03:00
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{
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vm_offset_t phys;
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int waport;
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caddr_t newaddr;
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1993-10-22 23:24:14 +03:00
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#ifdef DIAGNOSTIC
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if (chan > 7 || chan < 0 ||
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1993-10-14 08:22:57 +03:00
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(chan < 4 && nbytes > (1<<16)) ||
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1993-10-16 06:55:59 +03:00
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(chan >= 4 && (nbytes > (1<<17) || nbytes & 1 || (u_int)addr & 1)))
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1993-10-14 08:22:57 +03:00
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panic("at_dma: impossible request");
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1993-10-22 23:24:14 +03:00
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#endif
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1993-10-14 08:22:57 +03:00
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if (at_dma_rangecheck((vm_offset_t)addr, nbytes, chan)) {
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if (bouncebuf[chan] == 0)
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1993-10-22 23:24:14 +03:00
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/* some twit forgot to call at_setup_dmachan() */
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panic("at_dma: no bounce buffer");
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/* XXX totally braindead; NBPG is not enough */
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if (nbytes > NBPG)
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panic("at_dma: transfer too large");
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1993-10-14 08:22:57 +03:00
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bouncesize[chan] = nbytes;
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newaddr = bouncebuf[chan];
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/* copy bounce buffer on write */
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if (!read) {
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bcopy(addr, newaddr, nbytes);
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bounced[chan] = 0;
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} else
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bounced[chan] = addr;
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addr = newaddr;
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}
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/* translate to physical */
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phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
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if ((chan & 4) == 0) {
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/*
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* Program one of DMA channels 0..3. These are
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* byte mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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if (read)
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
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outb(DMA1_FFC, 0);
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/* send start address */
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waport = DMA1_CHN(chan);
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outb(waport, phys);
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outb(waport, phys>>8);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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outb(waport + 1, --nbytes);
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outb(waport + 1, nbytes>>8);
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/* unmask channel */
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outb(DMA1_SMSK, DMA37SM_CLEAR | chan);
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} else {
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/*
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* Program one of DMA channels 4..7. These are
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* word mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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if (read)
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
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outb(DMA2_FFC, 0);
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/* send start address */
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waport = DMA2_CHN(chan & 3);
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outb(waport, phys>>1);
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outb(waport, phys>>9);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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nbytes >>= 1;
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outb(waport + 2, --nbytes);
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outb(waport + 2, nbytes>>8);
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/* unmask channel */
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outb(DMA2_SMSK, DMA37SM_CLEAR | (chan & 3));
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}
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}
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/*
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* Abort a DMA request, clearing the bounce buffer, if any.
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*/
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void
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at_dma_abort(chan)
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1993-10-22 23:24:14 +03:00
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int chan;
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1993-10-14 08:22:57 +03:00
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{
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#ifdef DIAGNOSTIC
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1993-10-22 23:24:14 +03:00
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if (chan > 7 || chan < 0)
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1993-10-14 08:22:57 +03:00
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panic("at_dma_abort: impossible request");
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#endif
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bounced[chan] = 0;
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/* mask channel */
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if ((chan & 4) == 0)
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outb(DMA1_SMSK, DMA37SM_SET | chan);
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else
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outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
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}
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/*
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* End a DMA request, copying data from the bounce buffer, if any,
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* when reading.
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*/
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void
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at_dma_terminate(chan)
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unsigned chan;
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{
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u_char tc;
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#ifdef DIAGNOSTIC
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1993-10-22 23:24:14 +03:00
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if (chan > 7 || chan < 0)
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1993-10-14 08:22:57 +03:00
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panic("at_dma_terminate: impossible request");
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#endif
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/* check that the terminal count was reached */
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if ((chan & 4) == 0)
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tc = inb(DMA1_SR) & (1 << chan);
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else
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tc = inb(DMA2_SR) & (1 << (chan & 3));
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if (tc == 0)
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/* XXX probably should panic or something */
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log(LOG_ERR, "dma channel %d not finished\n", chan);
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/* copy bounce buffer on read */
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if (bounced[chan]) {
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bcopy(bouncebuf[chan], bounced[chan], bouncesize[chan]);
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bounced[chan] = 0;
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}
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/* mask channel */
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if ((chan & 4) == 0)
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outb(DMA1_SMSK, DMA37SM_SET | chan);
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else
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outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
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}
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/*
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* Check for problems with the address range of a DMA transfer
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* (non-contiguous physical pages, outside of bus address space,
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* crossing DMA page boundaries).
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* Return true if special handling needed.
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*/
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int
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at_dma_rangecheck(va, length, chan)
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vm_offset_t va;
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1993-10-22 23:24:14 +03:00
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u_long length;
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int chan;
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1993-10-14 08:22:57 +03:00
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{
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vm_offset_t phys, priorpage = 0, endva;
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u_int dma_pgmsk = (chan&4) ? ~(128*1024-1) : ~(64*1024-1);
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endva = round_page(va + length);
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for (; va < endva ; va += NBPG) {
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phys = trunc_page(pmap_extract(pmap_kernel(), va));
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if (phys == 0)
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1993-10-22 23:24:14 +03:00
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panic("at_dma_rangecheck: no physical page present");
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1993-10-14 08:22:57 +03:00
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if (phys >= (1<<24))
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return 1;
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if (priorpage) {
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if (priorpage + NBPG != phys)
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return 1;
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/* check if crossing a DMA page boundary */
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if ((priorpage ^ phys) & dma_pgmsk)
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return 1;
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}
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priorpage = phys;
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}
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return 0;
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}
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